Added waitstates on instruction fetch from ROM.

This commit is contained in:
SarahW 2018-03-11 11:03:20 +00:00
commit 8546ce14f0
5 changed files with 38 additions and 30 deletions

View file

@ -123,7 +123,7 @@ extern uint64_t cpu_CR4_mask;
#define CPU_REQUIRES_DYNAREC 2
extern int cpu_cycles_read, cpu_cycles_read_l, cpu_cycles_write, cpu_cycles_write_l;
extern int cpu_prefetch_cycles, cpu_prefetch_width;
extern int cpu_prefetch_cycles, cpu_prefetch_width, cpu_mem_prefetch_cycles, cpu_rom_prefetch_cycles;
extern int cpu_waitstates;
extern int cpu_cache_int_enabled, cpu_cache_ext_enabled;