diff --git a/src/mem.c b/src/mem.c index 082db66..d9838a7 100644 --- a/src/mem.c +++ b/src/mem.c @@ -35,7 +35,7 @@ static mem_mapping_t *_mem_mapping_w[0x40000]; static int _mem_state[0x40000]; static mem_mapping_t base_mapping; -static mem_mapping_t ram_low_mapping; +mem_mapping_t ram_low_mapping; static mem_mapping_t ram_high_mapping; static mem_mapping_t ram_mid_mapping; mem_mapping_t bios_mapping[8]; diff --git a/src/mem.h b/src/mem.h index 3ea4de3..b6a926d 100644 --- a/src/mem.h +++ b/src/mem.h @@ -144,3 +144,5 @@ void mem_write_ramw_page(uint32_t addr, uint16_t val, page_t *p); void mem_write_raml_page(uint32_t addr, uint32_t val, page_t *p); void mem_reset_page_blocks(); + +extern mem_mapping_t ram_low_mapping; diff --git a/src/model.c b/src/model.c index ebde313..fcbcb53 100644 --- a/src/model.c +++ b/src/model.c @@ -71,42 +71,42 @@ int AMSTRAD, AT, PCI, TANDY; MODEL models[] = { - {"IBM PC", ROM_IBMPC, { "", cpus_8088, "", NULL, "", NULL}, 0, 0, 64, 640, xt_init}, - {"IBM XT", ROM_IBMXT, { "", cpus_8088, "", NULL, "", NULL}, 0, 0, 128, 640, xt_init}, - {"IBM PCjr", ROM_IBMPCJR, { "", cpus_pcjr, "", NULL, "", NULL}, 1, 0, 128, 640, pcjr_init}, - {"Generic XT clone", ROM_GENXT, { "", cpus_8088, "", NULL, "", NULL}, 0, 0, 128, 640, xt_init}, - {"AMI XT clone", ROM_AMIXT, { "", cpus_8088, "", NULL, "", NULL}, 0, 0, 128, 640, xt_init}, - {"DTK XT clone", ROM_DTKXT, { "", cpus_8088, "", NULL, "", NULL}, 0, 0, 128, 640, xt_init}, - {"VTech Laser Turbo XT",ROM_LTXT, { "", cpus_8088, "", NULL, "", NULL}, 0, 0, 128, 640, xt_init}, - {"VTech Laser XT3", ROM_LXT3, { "", cpus_8088, "", NULL, "", NULL}, 0, 0, 128, 640, xt_init}, - {"Phoenix XT clone", ROM_PXXT, { "", cpus_8088, "", NULL, "", NULL}, 0, 0, 128, 640, xt_init}, - {"Juko XT clone", ROM_JUKOPC, { "", cpus_8088, "", NULL, "", NULL}, 0, 0, 128, 640, xt_init}, - {"Tandy 1000", ROM_TANDY, { "", cpus_8088, "", NULL, "", NULL}, 1, 0, 128, 640, tandy1k_init}, - {"Amstrad PC1512", ROM_PC1512, { "", cpus_pc1512, "", NULL, "", NULL}, 1, 0, 512, 640, ams_init}, - {"Sinclair PC200", ROM_PC200, { "", cpus_8086, "", NULL, "", NULL}, 1, 0, 512, 640, ams_init}, - {"Euro PC", ROM_EUROPC, { "", cpus_8086, "", NULL, "", NULL}, 0, 0, 512, 640, europc_init}, - {"Olivetti M24", ROM_OLIM24, { "", cpus_8086, "", NULL, "", NULL}, 1, 0, 128, 640, olim24_init}, - {"Amstrad PC1640", ROM_PC1640, { "", cpus_8086, "", NULL, "", NULL}, 1, 0, 640, 640, ams_init}, - {"Amstrad PC2086", ROM_PC2086, { "", cpus_8086, "", NULL, "", NULL}, 1, 0, 640, 640, ams_init}, - {"Amstrad PC3086", ROM_PC3086, { "", cpus_8086, "", NULL, "", NULL}, 1, 0, 640, 640, ams_init}, - {"IBM AT", ROM_IBMAT, { "", cpus_ibmat, "", NULL, "", NULL}, 0, 1, 1, 16, at_init}, - {"Commodore PC 30 III", ROM_CMDPC30, { "", cpus_286, "", NULL, "", NULL}, 0, 1, 1, 16, at_init}, - {"AMI 286 clone", ROM_AMI286, { "", cpus_286, "", NULL, "", NULL}, 0, 1, 1, 16, at_neat_init}, - {"DELL System 200", ROM_DELL200, { "", cpus_286, "", NULL, "", NULL}, 0, 1, 1, 16, at_init}, - {"IBM PS/1 model 2011", ROM_IBMPS1_2011, { "", cpus_286, "", NULL, "", NULL}, 1, 1, 1, 16, ps1_init}, - {"Compaq Deskpro 386", ROM_DESKPRO_386, { "Intel", cpus_i386, "AMD", cpus_Am386, "Cyrix", cpus_486SDLC}, 0, 1, 1, 15, deskpro386_init}, - {"Acer 386SX25/N", ROM_ACER386, { "Intel", cpus_acer, "", NULL, "", NULL}, 1, 1, 1, 16, at_acer386sx_init}, - {"DTK 386SX clone", ROM_DTK386, { "Intel", cpus_i386, "AMD", cpus_Am386, "Cyrix", cpus_486SDLC}, 0, 1, 1, 16, at_neat_init}, - {"Phoenix 386 clone", ROM_PX386, { "Intel", cpus_i386, "AMD", cpus_Am386, "Cyrix", cpus_486SDLC}, 0, 1, 1, 16, at_init}, - {"Amstrad MegaPC", ROM_MEGAPC, { "Intel", cpus_i386, "AMD", cpus_Am386, "Cyrix", cpus_486SDLC}, 1, 1, 1, 16, at_wd76c10_init}, - {"AMI 386 clone", ROM_AMI386, { "Intel", cpus_i386, "AMD", cpus_Am386, "Cyrix", cpus_486SDLC}, 0, 1, 1, 256, at_headland_init}, - {"AMI 486 clone", ROM_AMI486, { "Intel", cpus_i486, "AMD", cpus_Am486, "Cyrix", cpus_Cx486}, 0, 1, 1, 256, at_ali1429_init}, - {"AMI WinBIOS 486", ROM_WIN486, { "Intel", cpus_i486, "AMD", cpus_Am486, "Cyrix", cpus_Cx486}, 0, 1, 1, 256, at_ali1429_init}, -/* {"AMI WinBIOS 486 PCI", ROM_PCI486, { "Intel", cpus_i486, "AMD", cpus_Am486, "Cyrix", cpus_Cx486}, 0, 1, 1, 256, at_um8881f_init},*/ - {"Award SiS 496/497", ROM_SIS496, { "Intel", cpus_i486, "AMD", cpus_Am486, "Cyrix", cpus_Cx486}, 0, 1, 1, 256, at_sis496_init}, - {"Intel Premiere/PCI", ROM_REVENGE, { "Intel", cpus_Pentium5V, "", NULL, "", NULL}, 0, 1, 1, 128, at_batman_init}, - {"Intel Advanced/EV", ROM_ENDEAVOR, { "Intel", cpus_Pentium, "IDT", cpus_WinChip, "", NULL}, 0, 1, 1, 128, at_endeavor_init}, - {"Award 430VX PCI", ROM_430VX, { "Intel", cpus_Pentium, "IDT", cpus_WinChip, "", NULL}, 0, 1, 1, 256, at_i430vx_init}, + {"IBM PC", ROM_IBMPC, { "", cpus_8088, "", NULL, "", NULL}, 0, 0, 64, 640, 64, xt_init}, + {"IBM XT", ROM_IBMXT, { "", cpus_8088, "", NULL, "", NULL}, 0, 0, 128, 640, 64, xt_init}, + {"IBM PCjr", ROM_IBMPCJR, { "", cpus_pcjr, "", NULL, "", NULL}, 1, 0, 128, 640, 128, pcjr_init}, + {"Generic XT clone", ROM_GENXT, { "", cpus_8088, "", NULL, "", NULL}, 0, 0, 128, 640, 64, xt_init}, + {"AMI XT clone", ROM_AMIXT, { "", cpus_8088, "", NULL, "", NULL}, 0, 0, 128, 640, 64, xt_init}, + {"DTK XT clone", ROM_DTKXT, { "", cpus_8088, "", NULL, "", NULL}, 0, 0, 128, 640, 64, xt_init}, + {"VTech Laser Turbo XT",ROM_LTXT, { "", cpus_8088, "", NULL, "", NULL}, 0, 0, 128, 640, 64, xt_init}, + {"VTech Laser XT3", ROM_LXT3, { "", cpus_8088, "", NULL, "", NULL}, 0, 0, 128, 640, 64, xt_init}, + {"Phoenix XT clone", ROM_PXXT, { "", cpus_8088, "", NULL, "", NULL}, 0, 0, 128, 640, 64, xt_init}, + {"Juko XT clone", ROM_JUKOPC, { "", cpus_8088, "", NULL, "", NULL}, 0, 0, 128, 640, 64, xt_init}, + {"Tandy 1000", ROM_TANDY, { "", cpus_8088, "", NULL, "", NULL}, 1, 0, 128, 640, 128, tandy1k_init}, + {"Amstrad PC1512", ROM_PC1512, { "", cpus_pc1512, "", NULL, "", NULL}, 1, 0, 512, 640, 128, ams_init}, + {"Sinclair PC200", ROM_PC200, { "", cpus_8086, "", NULL, "", NULL}, 1, 0, 512, 640, 128, ams_init}, + {"Euro PC", ROM_EUROPC, { "", cpus_8086, "", NULL, "", NULL}, 0, 0, 512, 640, 128, europc_init}, + {"Olivetti M24", ROM_OLIM24, { "", cpus_8086, "", NULL, "", NULL}, 1, 0, 128, 640, 128, olim24_init}, + {"Amstrad PC1640", ROM_PC1640, { "", cpus_8086, "", NULL, "", NULL}, 1, 0, 640, 640, 0, ams_init}, + {"Amstrad PC2086", ROM_PC2086, { "", cpus_8086, "", NULL, "", NULL}, 1, 0, 640, 640, 0, ams_init}, + {"Amstrad PC3086", ROM_PC3086, { "", cpus_8086, "", NULL, "", NULL}, 1, 0, 640, 640, 0, ams_init}, + {"IBM AT", ROM_IBMAT, { "", cpus_ibmat, "", NULL, "", NULL}, 0, 1, 1, 16, 1, at_init}, + {"Commodore PC 30 III", ROM_CMDPC30, { "", cpus_286, "", NULL, "", NULL}, 0, 1, 1, 16, 1, at_init}, + {"AMI 286 clone", ROM_AMI286, { "", cpus_286, "", NULL, "", NULL}, 0, 1, 1, 16, 1, at_neat_init}, + {"DELL System 200", ROM_DELL200, { "", cpus_286, "", NULL, "", NULL}, 0, 1, 1, 16, 1, at_init}, + {"IBM PS/1 model 2011", ROM_IBMPS1_2011, { "", cpus_286, "", NULL, "", NULL}, 1, 1, 1, 16, 1, ps1_init}, + {"Compaq Deskpro 386", ROM_DESKPRO_386, { "Intel", cpus_i386, "AMD", cpus_Am386, "Cyrix", cpus_486SDLC}, 0, 1, 1, 15, 1, deskpro386_init}, + {"Acer 386SX25/N", ROM_ACER386, { "Intel", cpus_acer, "", NULL, "", NULL}, 1, 1, 1, 16, 1, at_acer386sx_init}, + {"DTK 386SX clone", ROM_DTK386, { "Intel", cpus_i386, "AMD", cpus_Am386, "Cyrix", cpus_486SDLC}, 0, 1, 1, 16, 1, at_neat_init}, + {"Phoenix 386 clone", ROM_PX386, { "Intel", cpus_i386, "AMD", cpus_Am386, "Cyrix", cpus_486SDLC}, 0, 1, 1, 16, 1, at_init}, + {"Amstrad MegaPC", ROM_MEGAPC, { "Intel", cpus_i386, "AMD", cpus_Am386, "Cyrix", cpus_486SDLC}, 1, 1, 1, 16, 1, at_wd76c10_init}, + {"AMI 386 clone", ROM_AMI386, { "Intel", cpus_i386, "AMD", cpus_Am386, "Cyrix", cpus_486SDLC}, 0, 1, 1, 256, 1, at_headland_init}, + {"AMI 486 clone", ROM_AMI486, { "Intel", cpus_i486, "AMD", cpus_Am486, "Cyrix", cpus_Cx486}, 0, 1, 1, 256, 1, at_ali1429_init}, + {"AMI WinBIOS 486", ROM_WIN486, { "Intel", cpus_i486, "AMD", cpus_Am486, "Cyrix", cpus_Cx486}, 0, 1, 1, 256, 1, at_ali1429_init}, +/* {"AMI WinBIOS 486 PCI", ROM_PCI486, { "Intel", cpus_i486, "AMD", cpus_Am486, "Cyrix", cpus_Cx486}, 0, 1, 1, 256, 1, at_um8881f_init},*/ + {"Award SiS 496/497", ROM_SIS496, { "Intel", cpus_i486, "AMD", cpus_Am486, "Cyrix", cpus_Cx486}, 0, 1, 1, 256, 1, at_sis496_init}, + {"Intel Premiere/PCI", ROM_REVENGE, { "Intel", cpus_Pentium5V, "", NULL, "", NULL}, 0, 1, 1, 128, 1, at_batman_init}, + {"Intel Advanced/EV", ROM_ENDEAVOR, { "Intel", cpus_Pentium, "IDT", cpus_WinChip, "", NULL}, 0, 1, 1, 128, 1, at_endeavor_init}, + {"Award 430VX PCI", ROM_430VX, { "Intel", cpus_Pentium, "IDT", cpus_WinChip, "", NULL}, 0, 1, 1, 256, 1, at_i430vx_init}, {"", -1, {"", 0, "", 0, "", 0}, 0,0,0, 0} }; diff --git a/src/model.h b/src/model.h index b2ae3ce..e575b82 100644 --- a/src/model.h +++ b/src/model.h @@ -10,6 +10,7 @@ typedef struct int fixed_gfxcard; int is_at; int min_ram, max_ram; + int ram_granularity; void (*init)(); } MODEL; diff --git a/src/vid_tandy.c b/src/vid_tandy.c index d7ed474..282c050 100644 --- a/src/vid_tandy.c +++ b/src/vid_tandy.c @@ -13,6 +13,7 @@ static int i_filt[8],q_filt[8]; typedef struct tandy_t { mem_mapping_t mapping; + mem_mapping_t ram_mapping; uint8_t crtc[32]; int crtcreg; @@ -87,7 +88,7 @@ void tandy_out(uint16_t addr, uint8_t val, void *p) tandy_recalcaddress(tandy); break; case 0xa0: - tandy->base = ((val >> 1) & 7) * 128 * 1024; + mem_mapping_set_addr(&tandy->ram_mapping, ((val >> 1) & 7) * 128 * 1024, 0x20000); tandy_recalcaddress(tandy); break; } @@ -125,6 +126,20 @@ void tandy_recalcaddress(tandy_t *tandy) } } +void tandy_ram_write(uint32_t addr, uint8_t val, void *p) +{ + tandy_t *tandy = (tandy_t *)p; +// pclog("Tandy RAM write %05X %02X %04X:%04X\n",addr,val,CS,pc); + ram[tandy->base + (addr & 0x1ffff)] = val; +} + +uint8_t tandy_ram_read(uint32_t addr, void *p) +{ + tandy_t *tandy = (tandy_t *)p; +// pclog("Tandy RAM read %05X %02X %04X:%04X\n",addr,ram[tandy->base + (addr & 0x1ffff)],CS,pc); + return ram[tandy->base + (addr & 0x1ffff)]; +} + void tandy_write(uint32_t addr, uint8_t val, void *p) { tandy_t *tandy = (tandy_t *)p; @@ -660,6 +675,7 @@ void *tandy_init() memset(tandy, 0, sizeof(tandy_t)); tandy->memctrl = -1; + tandy->base = (mem_size - 128) * 1024; for (c = 0; c < 8; c++) { @@ -668,6 +684,9 @@ void *tandy_init() } timer_add(tandy_poll, &tandy->vidtime, TIMER_ALWAYS_ENABLED, tandy); mem_mapping_add(&tandy->mapping, 0xb8000, 0x08000, tandy_read, NULL, NULL, tandy_write, NULL, NULL, NULL, 0, tandy); + mem_mapping_add(&tandy->ram_mapping, 0x80000, 0x20000, tandy_ram_read, NULL, NULL, tandy_ram_write, NULL, NULL, NULL, 0, tandy); + /*Base 128k mapping is controlled via port 0xA0, so we remove it from the main mapping*/ + mem_mapping_set_addr(&ram_low_mapping, 0, (mem_size - 128) * 1024); io_sethandler(0x03d0, 0x0010, tandy_in, NULL, NULL, tandy_out, NULL, NULL, tandy); io_sethandler(0x00a0, 0x0001, tandy_in, NULL, NULL, tandy_out, NULL, NULL, tandy); return tandy; diff --git a/src/win-config.c b/src/win-config.c index ce5efcc..caf6787 100644 --- a/src/win-config.c +++ b/src/win-config.c @@ -168,19 +168,13 @@ static BOOL CALLBACK config_dlgproc(HWND hdlg, UINT message, WPARAM wParam, LPAR h = GetDlgItem(hdlg, IDC_MEMSPIN); SendMessage(h, UDM_SETBUDDY, (WPARAM)GetDlgItem(hdlg, IDC_MEMTEXT), 0); - accel.nSec = 0; + SendMessage(h, UDM_SETRANGE, 0, (models[romstomodel[romset]].min_ram << 16) | models[romstomodel[romset]].max_ram); if (!models[model].is_at) - { - SendMessage(h, UDM_SETRANGE, 0, (64 << 16) | 640); SendMessage(h, UDM_SETPOS, 0, mem_size); - accel.nInc = 64; - } else - { - SendMessage(h, UDM_SETRANGE, 0, (1 << 16) | 256); SendMessage(h, UDM_SETPOS, 0, mem_size / 1024); - accel.nInc = 1; - } + accel.nSec = 0; + accel.nInc = models[temp_model].ram_granularity; SendMessage(h, UDM_SETACCEL, 1, (LPARAM)&accel); h = GetDlgItem(hdlg, IDC_CONFIGUREVID); @@ -221,6 +215,11 @@ static BOOL CALLBACK config_dlgproc(HWND hdlg, UINT message, WPARAM wParam, LPAR h = GetDlgItem(hdlg, IDC_MEMTEXT); SendMessage(h, WM_GETTEXT, 255, (LPARAM)temp_str); sscanf(temp_str, "%i", &mem); + mem &= ~(models[temp_model].ram_granularity - 1); + if (mem < models[temp_model].min_ram) + mem = models[temp_model].min_ram; + else if (mem > models[temp_model].max_ram) + mem = models[temp_model].max_ram; if ((models[temp_model].is_at && (mem < 1 || mem > 256)) || (!models[temp_model].is_at && (mem < 64 || mem > 640))) { @@ -397,23 +396,15 @@ static BOOL CALLBACK config_dlgproc(HWND hdlg, UINT message, WPARAM wParam, LPAR sscanf(temp_str, "%i", &mem); h = GetDlgItem(hdlg, IDC_MEMSPIN); - accel.nSec = 0; - if (!models[temp_model].is_at) - { - SendMessage(h, UDM_SETRANGE, 0, (models[temp_model].min_ram << 16) | models[temp_model].max_ram); - accel.nInc = 64; - mem &= ~0x3f; - } - else - { - SendMessage(h, UDM_SETRANGE, 0, (models[temp_model].min_ram << 16) | models[temp_model].max_ram); - accel.nInc = 1; - } + SendMessage(h, UDM_SETRANGE, 0, (models[temp_model].min_ram << 16) | models[temp_model].max_ram); + mem &= ~(models[temp_model].ram_granularity - 1); if (mem < models[temp_model].min_ram) mem = models[temp_model].min_ram; else if (mem > models[temp_model].max_ram) mem = models[temp_model].max_ram; SendMessage(h, UDM_SETPOS, 0, mem); + accel.nSec = 0; + accel.nInc = models[temp_model].ram_granularity; SendMessage(h, UDM_SETACCEL, 1, (LPARAM)&accel); } break;