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Fixed some ARM64 build warnings.

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This commit is contained in:
SarahW 2019-03-31 18:23:34 +01:00
commit 7a68bca85f
3 changed files with 18 additions and 14 deletions
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26
src/codegen_backend_arm64.c
View file

@ -68,7 +68,7 @@ int codegen_host_fp_reg_list[CODEGEN_HOST_FP_REGS] =
static void build_load_routine(codeblock_t *block, int size, int is_float) static void build_load_routine(codeblock_t *block, int size, int is_float)
{ {
uint32_t *branch_offset; uint32_t *branch_offset;
uint8_t *misaligned_offset; uint32_t *misaligned_offset;
int offset; int offset;
/*In - W0 = address /*In - W0 = address
@ -116,13 +116,13 @@ static void build_load_routine(codeblock_t *block, int size, int is_float)
host_arm64_branch_set_offset(misaligned_offset, &block_write_data[block_pos]); host_arm64_branch_set_offset(misaligned_offset, &block_write_data[block_pos]);
host_arm64_STP_PREIDX_X(block, REG_X29, REG_X30, REG_XSP, -16); host_arm64_STP_PREIDX_X(block, REG_X29, REG_X30, REG_XSP, -16);
if (size == 1) if (size == 1)
host_arm64_call(block, (uintptr_t)readmembl); host_arm64_call(block, (void *)readmembl);
else if (size == 2) else if (size == 2)
host_arm64_call(block, (uintptr_t)readmemwl); host_arm64_call(block, (void *)readmemwl);
else if (size == 4) else if (size == 4)
host_arm64_call(block, (uintptr_t)readmemll); host_arm64_call(block, (void *)readmemll);
else if (size == 8) else if (size == 8)
host_arm64_call(block, (uintptr_t)readmemql); host_arm64_call(block, (void *)readmemql);
else else
fatal("build_load_routine - unknown size %i\n", size); fatal("build_load_routine - unknown size %i\n", size);
codegen_direct_read_8(block, REG_W1, &cpu_state.abrt); codegen_direct_read_8(block, REG_W1, &cpu_state.abrt);
@ -136,8 +136,8 @@ static void build_load_routine(codeblock_t *block, int size, int is_float)
static void build_store_routine(codeblock_t *block, int size, int is_float) static void build_store_routine(codeblock_t *block, int size, int is_float)
{ {
uint8_t *branch_offset; uint32_t *branch_offset;
uint8_t *misaligned_offset; uint32_t *misaligned_offset;
int offset; int offset;
/*In - R0 = address, R1 = data /*In - R0 = address, R1 = data
@ -189,13 +189,13 @@ static void build_store_routine(codeblock_t *block, int size, int is_float)
else if (size == 8) else if (size == 8)
host_arm64_FMOV_Q_D(block, REG_X1, REG_V_TEMP); host_arm64_FMOV_Q_D(block, REG_X1, REG_V_TEMP);
if (size == 1) if (size == 1)
host_arm64_call(block, (uintptr_t)writemembl); host_arm64_call(block, (void *)writemembl);
else if (size == 2) else if (size == 2)
host_arm64_call(block, (uintptr_t)writememwl); host_arm64_call(block, (void *)writememwl);
else if (size == 4) else if (size == 4)
host_arm64_call(block, (uintptr_t)writememll); host_arm64_call(block, (void *)writememll);
else if (size == 8) else if (size == 8)
host_arm64_call(block, (uintptr_t)writememql); host_arm64_call(block, (void *)writememql);
else else
fatal("build_store_routine - unknown size %i\n", size); fatal("build_store_routine - unknown size %i\n", size);
codegen_direct_read_8(block, REG_W1, &cpu_state.abrt); codegen_direct_read_8(block, REG_W1, &cpu_state.abrt);
@ -242,7 +242,7 @@ static void build_fp_round_routine(codeblock_t *block, int is_quad)
host_arm64_LDR_REG_X(block, REG_TEMP2, REG_TEMP2, REG_TEMP); host_arm64_LDR_REG_X(block, REG_TEMP2, REG_TEMP2, REG_TEMP);
host_arm64_BR(block, REG_TEMP2); host_arm64_BR(block, REG_TEMP2);
jump_table = &block_write_data[block_pos]; jump_table = (uint64_t *)&block_write_data[block_pos];
block_pos += 4*8; block_pos += 4*8;
jump_table[X87_ROUNDING_NEAREST] = (uint64_t)(uintptr_t)&block_write_data[block_pos]; //tie even jump_table[X87_ROUNDING_NEAREST] = (uint64_t)(uintptr_t)&block_write_data[block_pos]; //tie even
@ -315,7 +315,7 @@ void codegen_backend_init()
codegen_gpf_rout = &block_write_data[block_pos]; codegen_gpf_rout = &block_write_data[block_pos];
host_arm64_mov_imm(block, REG_ARG0, 0); host_arm64_mov_imm(block, REG_ARG0, 0);
host_arm64_mov_imm(block, REG_ARG1, 0); host_arm64_mov_imm(block, REG_ARG1, 0);
host_arm64_call(block, x86gpf); host_arm64_call(block, (void *)x86gpf);
codegen_exit_rout = &block_write_data[block_pos]; codegen_exit_rout = &block_write_data[block_pos];
host_arm64_LDP_POSTIDX_X(block, REG_X19, REG_X20, REG_XSP, 64); host_arm64_LDP_POSTIDX_X(block, REG_X19, REG_X20, REG_XSP, 64);

4
src/codegen_backend_arm64_ops.h
View file

@ -82,6 +82,8 @@ void host_arm64_FABS_D(codeblock_t *block, int dst_reg, int src_reg);
void host_arm64_FADD_D(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg); void host_arm64_FADD_D(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
void host_arm64_FADD_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg); void host_arm64_FADD_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
void host_arm64_FCMEQ_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg); void host_arm64_FCMEQ_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
void host_arm64_FCMGE_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
void host_arm64_FCMGT_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
void host_arm64_FCMP_D(codeblock_t *block, int src_n_reg, int src_m_reg); void host_arm64_FCMP_D(codeblock_t *block, int src_n_reg, int src_m_reg);
void host_arm64_FDIV_D(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg); void host_arm64_FDIV_D(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
void host_arm64_FDIV_S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg); void host_arm64_FDIV_S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
@ -112,6 +114,8 @@ void host_arm64_FMOV_S_W(codeblock_t *block, int dst_reg, int src_reg);
void host_arm64_FMOV_W_S(codeblock_t *block, int dst_reg, int src_reg); void host_arm64_FMOV_W_S(codeblock_t *block, int dst_reg, int src_reg);
void host_arm64_FMOV_S_ONE(codeblock_t *block, int dst_reg); void host_arm64_FMOV_S_ONE(codeblock_t *block, int dst_reg);
void host_arm64_FNEG_D(codeblock_t *block, int dst_reg, int src_reg);
void host_arm64_FRINTX_D(codeblock_t *block, int dst_reg, int src_reg); void host_arm64_FRINTX_D(codeblock_t *block, int dst_reg, int src_reg);
void host_arm64_FSQRT_D(codeblock_t *block, int dst_reg, int src_reg); void host_arm64_FSQRT_D(codeblock_t *block, int dst_reg, int src_reg);

2
src/codegen_backend_arm64_uops.c
View file

@ -1396,7 +1396,7 @@ static int codegen_MOV_INT_DOUBLE_64(codeblock_t *block, uop_t *uop)
if (REG_IS_Q(dest_size) && REG_IS_D(src_size) && REG_IS_Q(src_64_size)) if (REG_IS_Q(dest_size) && REG_IS_D(src_size) && REG_IS_Q(src_64_size))
{ {
uint8_t *branch_offset; uint32_t *branch_offset;
/*If TAG_UINT64 is set then the source is MM[]. Otherwise it is a double in ST()*/ /*If TAG_UINT64 is set then the source is MM[]. Otherwise it is a double in ST()*/
host_arm64_FMOV_D_D(block, dest_reg, src_64_reg); host_arm64_FMOV_D_D(block, dest_reg, src_64_reg);