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Changed timer base frequency on XT models to 14.318MHz - PIT, CGA and 4.77MHz CPU should now stay in perfect sync.

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This commit is contained in:
TomW 2015-11-25 21:50:38 +00:00
commit 79202cc5c0
10 changed files with 49 additions and 29 deletions
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8
src/cpu.c
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@ -109,7 +109,7 @@ static struct
CPU cpus_8088[] =
{
/*8088 standard*/
{"8088/4.77", CPU_8088, 0, 4772727, 1, 0, 0, 0, 0, 0},
{"8088/4.77", CPU_8088, 0, 4772728, 1, 0, 0, 0, 0, 0},
{"8088/8", CPU_8088, 1, 8000000, 1, 0, 0, 0, 0, 0},
{"8088/10", CPU_8088, 2, 10000000, 1, 0, 0, 0, 0, 0},
{"8088/12", CPU_8088, 3, 12000000, 1, 0, 0, 0, 0, 0},
@ -120,16 +120,16 @@ CPU cpus_8088[] =
CPU cpus_pcjr[] =
{
/*8088 PCjr*/
{"8088/4.77", CPU_8088, 0, 4772727, 1, 0, 0, 0, 0, 0},
{"8088/4.77", CPU_8088, 0, 4772728, 1, 0, 0, 0, 0, 0},
{"", -1, 0, 0, 0, 0}
};
CPU cpus_8086[] =
{
/*8086 standard*/
{"8086/7.16", CPU_8086, 1, 3579545*2, 1, 0, 0, 0, 0, 0},
{"8086/7.16", CPU_8086, 1, 14318184/2, 1, 0, 0, 0, 0, 0},
{"8086/8", CPU_8086, 1, 8000000, 1, 0, 0, 0, 0, 0},
{"8086/9.54", CPU_8086, 1, (3579545*8)/3, 1, 0, 0, 0, 0, 0},
{"8086/9.54", CPU_8086, 1, 4772728*2, 1, 0, 0, 0, 0, 0},
{"8086/10", CPU_8086, 2, 10000000, 1, 0, 0, 0, 0, 0},
{"8086/12", CPU_8086, 3, 12000000, 1, 0, 0, 0, 0, 0},
{"8086/16", CPU_8086, 4, 16000000, 1, 0, 0, 0, 0, 0},