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Changed timer base frequency on XT models to 14.318MHz - PIT, CGA and 4.77MHz CPU should now stay in perfect sync.

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TomW 2015-11-25 21:50:38 +00:00
commit 79202cc5c0
10 changed files with 49 additions and 29 deletions
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4
src/386.c
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@ -227,7 +227,7 @@ void exec386(int cycs)
{
cycdiff=0;
oldcyc=cycles;
timer_start_period(cycles);
timer_start_period(cycles << TIMER_SHIFT);
// pclog("%i %02X\n", ins, ram[8]);
while (cycdiff<100)
{
@ -375,6 +375,6 @@ opcodestart:
tsc += cycdiff;
timer_end_period(cycles);
timer_end_period(cycles << TIMER_SHIFT);
}
}