Added recompiled register versions of FADD, FDIV, FDIVR, FMUL, FSUB and FSUBR.

src/codegen_backend_arm64_defs.h

@@ -64,6 +64,39 @@
 #define REG_X30 30
 #define REG_XZR 31
 
+#define REG_V0   0
+#define REG_V1   1
+#define REG_V2   2
+#define REG_V3   3
+#define REG_V4   4
+#define REG_V5   5
+#define REG_V6   6
+#define REG_V7   7
+#define REG_V8   8
+#define REG_V9   9
+#define REG_V10 10
+#define REG_V11 11
+#define REG_V12 12
+#define REG_V13 13
+#define REG_V14 14
+#define REG_V15 15
+#define REG_V16 16
+#define REG_V17 17
+#define REG_V18 18
+#define REG_V19 19
+#define REG_V20 20
+#define REG_V21 21
+#define REG_V22 22
+#define REG_V23 23
+#define REG_V24 24
+#define REG_V25 25
+#define REG_V26 26
+#define REG_V27 27
+#define REG_V28 28
+#define REG_V29 29
+#define REG_V30 30
+#define REG_V31 31
+
 #define REG_SP  31
 
 #define REG_ARG0 REG_X0
@@ -73,9 +106,11 @@
 
 #define REG_CPUSTATE REG_X29
 
-#define REG_TEMP REG_X7
+#define REG_TEMP  REG_X7
+#define REG_TEMP2 REG_X6
 
 #define CODEGEN_HOST_REGS 10
+#define CODEGEN_HOST_FP_REGS 8
 
 extern void *codegen_mem_load_byte;
 extern void *codegen_mem_load_word;