Fixed A20 reset issues. Patch from Greatpsycho.

src/intel.c

@@ -4,9 +4,12 @@
 #include "mem.h"
 #include "pit.h"
 #include "timer.h"
+#include "x86.h"
 
 #include "intel.h"
 
+static uint8_t batman_port_92;
+
 uint8_t batman_brdconfig(uint16_t port, void *p)
 {
 //        pclog("batman_brdconfig read port=%04x\n", port);
@@ -16,12 +19,34 @@ uint8_t batman_brdconfig(uint16_t port, void *p)
                 return 0xff;
                 case 0x75:
                 return 0xdf;
+                case 0x92:
+                return batman_port_92;
         }
         return 0;
 }
 
+void batman_brdconfig_write(uint16_t port, uint8_t val, void *p)
+{
+        switch (port)
+        {
+                case 0x92:
+                if ((mem_a20_alt ^ val) & 2)
+                {
+                         mem_a20_alt = val & 2;
+                         mem_a20_recalc();
+                }
+                if ((~batman_port_92 & val) & 1)
+                {
+                         softresetx86();
+                        cpu_set_edx();
+                }
+                batman_port_92 = val;
+        }
+}
+
 static uint16_t batman_timer_latch;
 static int batman_timer = 0;
+
 static void batman_timer_over(void *p)
 {
         batman_timer = 0;
@@ -60,6 +85,8 @@ void intel_batman_init()
         io_sethandler(0x0075, 0x0001, batman_brdconfig, NULL, NULL, NULL, NULL, NULL, NULL);
 
         io_sethandler(0x0078, 0x0002, batman_timer_read, NULL, NULL, batman_timer_write, NULL, NULL, NULL);
+        io_sethandler(0x0092, 0x0001, batman_brdconfig, NULL, NULL, batman_brdconfig_write, NULL, NULL, NULL);
+        batman_port_92 = 0;
         timer_add(batman_timer_over, &batman_timer, &batman_timer, NULL);
 }
 

src/model.c

@@ -308,6 +308,7 @@ void xt_laserxt_init()
 void at_init()
 {
         AT = 1;
+        mem_a20_key = mem_a20_alt = 0;
         common_init();
         mem_add_bios();
         pit_set_out_func(&pit, 1, pit_refresh_timer_at);

src/ps1.c

@@ -289,6 +289,7 @@ void ps1mb_m2121_init()
                                 0x3ffff,
                                 0,
                                 MEM_MAPPING_EXTERNAL);
+        ps1_92 = 0;
         ps1_190 = 0;
         
         lpt1_remove();

src/ps2.c

@@ -124,7 +124,8 @@ void ps2board_init()
         io_sethandler(0x0320, 0x0001, ps2_read, NULL, NULL, ps2_write, NULL, NULL, NULL);
         io_sethandler(0x0322, 0x0001, ps2_read, NULL, NULL, ps2_write, NULL, NULL, NULL);
         io_sethandler(0x0324, 0x0001, ps2_read, NULL, NULL, ps2_write, NULL, NULL, NULL);
-        
+
+        ps2_92 = 0;
         ps2_190 = 0;
         
         lpt1_remove();

src/scat.c

@@ -5,7 +5,6 @@
 #include "mem.h"
 #include "scat.h"
 #include "x86.h"
-#include "cpu.h"
 
 static uint8_t scat_regs[256];
 static int scat_index;
@@ -510,6 +509,7 @@ void scat_init()
         scat_regs[SCAT_DRAM_CONFIGURATION] = cpu_waitstates == 1 ? 2 : 0x12;
         scat_regs[SCAT_EXTENDED_BOUNDARY] = 0;
         scat_regs[SCAT_EMS_CONTROL] = 0;
+        scat_port_92 = 0;
 
         mem_mapping_set_addr(&ram_low_mapping, 0, 0x40000);