Several 286/386SX models can now have less than 1MB of RAM.
Memory remapping code restructured. Patch from Greatpsycho.
This commit is contained in:
parent
fb4e1f0715
commit
7234e2c3be
6 changed files with 100 additions and 64 deletions
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@ -290,7 +290,7 @@ static DIALOG configure_dialog[] =
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{d_list_proc, 70*2, 132, 152*2, 20, 0, 0xffffff, 0, 0, 0, 0, list_proc_vidspeed, 0, 0}, //7
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{list_proc, 70*2, 152, 152*2, 20, 0, 0xffffff, 0, 0, 0, 0, list_proc_sound, 0, 0}, //8
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{d_edit_proc, 70*2, 276, 40, 14, 0, 0xffffff, 0, 0, 4, 0, mem_size_str, 0, 0},
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{d_edit_proc, 70*2, 276, 48, 14, 0, 0xffffff, 0, 0, 5, 0, mem_size_str, 0, 0},
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{d_text_proc, 98*2, 276, 40, 10, 0, 0xffffff, 0, 0, 0, 0, mem_size_units, 0, 0},
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@ -472,7 +472,7 @@ static int list_proc(int msg, DIALOG *d, int c)
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new_mem_size = models[new_model].max_ram;
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sprintf(mem_size_str, "%i", new_mem_size);
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if (models[new_model].flags & MODEL_AT)
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if ((models[new_model].flags & MODEL_AT) && models[new_model].ram_granularity < 128)
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sprintf(mem_size_units, "MB");
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else
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sprintf(mem_size_units, "kB");
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@ -714,12 +714,12 @@ pclog("video_card_available : %i\n", c);
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else
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configure_dialog[14].flags &= ~D_SELECTED;
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if (models[model].flags & MODEL_AT)
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if ((models[model].flags & MODEL_AT) && models[model].ram_granularity < 128)
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sprintf(mem_size_str, "%i", mem_size / 1024);
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else
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sprintf(mem_size_str, "%i", mem_size);
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if (models[model].flags & MODEL_AT)
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if ((models[model].flags & MODEL_AT) && models[model].ram_granularity < 128)
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sprintf(mem_size_units, "MB");
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else
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sprintf(mem_size_units, "kB");
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@ -770,7 +770,7 @@ pclog("video_card_available : %i\n", c);
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new_mem_size = models[new_model].min_ram;
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else if (new_mem_size > models[new_model].max_ram)
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new_mem_size = models[new_model].max_ram;
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if (models[new_model].flags & MODEL_AT)
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if ((models[new_model].flags & MODEL_AT) && models[new_model].ram_granularity < 128)
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new_mem_size *= 1024;
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if (new_model != model || new_gfxcard != gfxcard || new_mem_size != mem_size ||
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114
src/mem.c
114
src/mem.c
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@ -1561,6 +1561,50 @@ void mem_write_raml(uint32_t addr, uint32_t val, void *priv)
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mem_write_raml_page(addr, val, &pages[addr >> 12]);
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}
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static uint32_t remap_start_addr;
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uint8_t mem_read_remapped(uint32_t addr, void *priv)
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{
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addr = 0xA0000 + (addr - remap_start_addr);
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addreadlookup(mem_logical_addr, addr);
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return ram[addr];
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}
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uint16_t mem_read_remappedw(uint32_t addr, void *priv)
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{
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addr = 0xA0000 + (addr - remap_start_addr);
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addreadlookup(mem_logical_addr, addr);
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return *(uint16_t *)&ram[addr];
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}
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uint32_t mem_read_remappedl(uint32_t addr, void *priv)
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{
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addr = 0xA0000 + (addr - remap_start_addr);
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addreadlookup(mem_logical_addr, addr);
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return *(uint32_t *)&ram[addr];
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}
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void mem_write_remapped(uint32_t addr, uint8_t val, void *priv)
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{
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uint32_t oldaddr = addr;
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addr = 0xA0000 + (addr - remap_start_addr);
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addwritelookup(mem_logical_addr, addr);
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mem_write_ramb_page(addr, val, &pages[oldaddr >> 12]);
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}
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void mem_write_remappedw(uint32_t addr, uint16_t val, void *priv)
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{
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uint32_t oldaddr = addr;
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addr = 0xA0000 + (addr - remap_start_addr);
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addwritelookup(mem_logical_addr, addr);
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mem_write_ramw_page(addr, val, &pages[oldaddr >> 12]);
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}
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void mem_write_remappedl(uint32_t addr, uint32_t val, void *priv)
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{
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uint32_t oldaddr = addr;
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addr = 0xA0000 + (addr - remap_start_addr);
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addwritelookup(mem_logical_addr, addr);
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mem_write_raml_page(addr, val, &pages[oldaddr >> 12]);
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}
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uint8_t mem_read_bios(uint32_t addr, void *priv)
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{
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if (AMIBIOS && (addr&0xFFFFF)==0xF8281) /*This is read constantly during AMIBIOS POST, but is never written to. It's clearly a status register of some kind, but for what?*/
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@ -1858,7 +1902,7 @@ void mem_init()
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{
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int c;
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ram = malloc((mem_size + 384) * 1024);
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ram = malloc(mem_size * 1024);
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// rom = malloc(0x20000);
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readlookup2 = malloc(1024 * 1024 * sizeof(uintptr_t));
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writelookup2 = malloc(1024 * 1024 * sizeof(uintptr_t));
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@ -1866,12 +1910,12 @@ void mem_init()
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pages = malloc((((mem_size + 384) * 1024) >> 12) * sizeof(page_t));
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page_lookup = malloc((1 << 20) * sizeof(page_t *));
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memset(ram, 0, (mem_size + 384) * 1024);
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memset(ram, 0, mem_size * 1024);
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memset(pages, 0, (((mem_size + 384) * 1024) >> 12) * sizeof(page_t));
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memset(page_lookup, 0, (1 << 20) * sizeof(page_t *));
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for (c = 0; c < ((mem_size * 1024) >> 12); c++)
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for (c = 0; c < (((mem_size + 384) * 1024) >> 12); c++)
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{
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pages[c].mem = &ram[c << 12];
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pages[c].write_b = mem_write_ramb_page;
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@ -1880,7 +1924,7 @@ void mem_init()
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}
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memset(isram, 0, sizeof(isram));
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for (c = 0; c < (mem_size / 256); c++)
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for (c = 0; c < (mem_size / 64); c++)
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{
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isram[c] = 1;
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if (c >= 0xa && c <= 0xf)
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@ -1916,49 +1960,39 @@ void mem_init()
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// pclog("Mem resize %i %i\n",mem_size,c);
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}
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void mem_remap_top_256k()
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static void mem_remap_top(int max_size)
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{
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int c;
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for (c = ((mem_size * 1024) >> 12); c < (((mem_size + 256) * 1024) >> 12); c++)
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if (mem_size > 640)
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{
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pages[c].mem = &ram[c << 12];
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pages[c].write_b = mem_write_ramb_page;
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pages[c].write_w = mem_write_ramw_page;
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pages[c].write_l = mem_write_raml_page;
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}
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uint32_t start = (mem_size >= 1024) ? mem_size : 1024;
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int size = mem_size - 640;
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if (size > max_size)
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size = max_size;
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remap_start_addr = start * 1024;
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for (c = ((start * 1024) >> 12); c < (((start + size) * 1024) >> 12); c++)
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{
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pages[c].mem = &ram[0xA0000 + ((c - ((start * 1024) >> 12)) << 12)];
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pages[c].write_b = mem_write_ramb_page;
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pages[c].write_w = mem_write_ramw_page;
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pages[c].write_l = mem_write_raml_page;
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}
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for (c = (mem_size / 256); c < ((mem_size + 256) / 256); c++)
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{
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isram[c] = 1;
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if (c >= 0xa && c <= 0xd)
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isram[c] = 0;
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mem_set_mem_state(start * 1024, size * 1024, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
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mem_mapping_add(&ram_remapped_mapping, start * 1024, size * 1024, mem_read_remapped, mem_read_remappedw, mem_read_remappedl, mem_write_remapped, mem_write_remappedw, mem_write_remappedl, ram + 0xA0000, MEM_MAPPING_INTERNAL, NULL);
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}
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}
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mem_set_mem_state(mem_size * 1024, 256 * 1024, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
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mem_mapping_add(&ram_remapped_mapping, mem_size * 1024, 256 * 1024, mem_read_ram, mem_read_ramw, mem_read_raml, mem_write_ram, mem_write_ramw, mem_write_raml, ram + (mem_size * 1024), MEM_MAPPING_INTERNAL, NULL);
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void mem_remap_top_256k()
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{
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mem_remap_top(256);
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}
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void mem_remap_top_384k()
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{
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int c;
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for (c = ((mem_size * 1024) >> 12); c < (((mem_size + 384) * 1024) >> 12); c++)
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{
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pages[c].mem = &ram[c << 12];
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pages[c].write_b = mem_write_ramb_page;
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pages[c].write_w = mem_write_ramw_page;
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pages[c].write_l = mem_write_raml_page;
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}
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for (c = (mem_size / 256); c < ((mem_size + 384) / 256); c++)
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{
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isram[c] = 1;
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if (c >= 0xa && c <= 0xf)
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isram[c] = 0;
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}
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mem_set_mem_state(mem_size * 1024, 384 * 1024, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
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mem_mapping_add(&ram_remapped_mapping, mem_size * 1024, 384 * 1024, mem_read_ram, mem_read_ramw, mem_read_raml, mem_write_ram, mem_write_ramw, mem_write_raml, ram + (mem_size * 1024), MEM_MAPPING_INTERNAL, NULL);
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mem_remap_top(384);
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}
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void mem_resize()
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@ -1966,8 +2000,8 @@ void mem_resize()
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int c;
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free(ram);
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ram = malloc((mem_size + 384) * 1024);
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memset(ram, 0, (mem_size + 384) * 1024);
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ram = malloc(mem_size * 1024);
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memset(ram, 0, mem_size * 1024);
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free(pages);
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pages = malloc((((mem_size + 384) * 1024) >> 12) * sizeof(page_t));
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@ -1981,7 +2015,7 @@ void mem_resize()
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}
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memset(isram, 0, sizeof(isram));
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for (c = 0; c < (mem_size / 256); c++)
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for (c = 0; c < (mem_size / 64); c++)
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{
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isram[c] = 1;
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if (c >= 0xa && c <= 0xf)
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20
src/model.c
20
src/model.c
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@ -93,7 +93,7 @@ int AMSTRAD, AT, PCI, TANDY;
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MODEL models[] =
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{
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{"IBM PC", ROM_IBMPC, "ibmpc", { {"", cpus_8088}, {"", NULL}, {"", NULL}}, 0, 0, 64, 640, 64, xt_init, NULL},
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{"IBM PC", ROM_IBMPC, "ibmpc", { {"", cpus_8088}, {"", NULL}, {"", NULL}}, 0, 0, 64, 640, 32, xt_init, NULL},
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{"IBM XT", ROM_IBMXT, "ibmxt", { {"", cpus_8088}, {"", NULL}, {"", NULL}}, 0, 0, 64, 640, 64, xt_init, NULL},
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{"IBM PCjr", ROM_IBMPCJR, "ibmpcjr", { {"", cpus_pcjr}, {"", NULL}, {"", NULL}}, 1, 0, 128, 640, 64, pcjr_init, &pcjr_device},
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{"Generic XT clone", ROM_GENXT, "genxt", { {"", cpus_8088}, {"", NULL}, {"", NULL}}, 0, 0, 64, 640, 64, xt_init, NULL},
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@ -113,22 +113,22 @@ MODEL models[] =
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{"Amstrad PC1640", ROM_PC1640, "pc1640", { {"", cpus_8086}, {"", NULL}, {"", NULL}}, 1, MODEL_AMSTRAD, 640, 640, 0, ams_init, NULL},
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{"Amstrad PC2086", ROM_PC2086, "pc2086", { {"", cpus_8086}, {"", NULL}, {"", NULL}}, 1, MODEL_AMSTRAD, 640, 640, 0, ams_init, NULL},
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{"Amstrad PC3086", ROM_PC3086, "pc3086", { {"", cpus_8086}, {"", NULL}, {"", NULL}}, 1, MODEL_AMSTRAD, 640, 640, 0, ams_init, NULL},
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{"IBM AT", ROM_IBMAT, "ibmat", { {"", cpus_ibmat}, {"", NULL}, {"", NULL}}, 0, MODEL_AT, 1, 16, 1, ibm_at_init, NULL},
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{"Commodore PC 30 III", ROM_CMDPC30, "cmdpc30", { {"", cpus_286}, {"", NULL}, {"", NULL}}, 0, MODEL_AT|MODEL_HAS_IDE, 1, 16, 1, at_ide_init, NULL},
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{"AMI 286 clone", ROM_AMI286, "ami286", { {"", cpus_286}, {"", NULL}, {"", NULL}}, 0, MODEL_AT|MODEL_HAS_IDE, 1, 16, 1, at_neat_init, NULL},
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{"Award 286 clone", ROM_AWARD286, "award286", { {"", cpus_286}, {"", NULL}, {"", NULL}}, 0, MODEL_AT|MODEL_HAS_IDE, 1, 16, 1, at_scat_init, NULL},
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{"DELL System 200", ROM_DELL200, "dells200", { {"", cpus_286}, {"", NULL}, {"", NULL}}, 0, MODEL_AT, 1, 16, 1, dells200_init, NULL},
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{"IBM PS/1 model 2011", ROM_IBMPS1_2011, "ibmps1es", { {"", cpus_ps1_m2011}, {"", NULL}, {"", NULL}}, 1, MODEL_AT|MODEL_PS2, 1, 16, 1, ps1_m2011_init, NULL},
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{"IBM AT", ROM_IBMAT, "ibmat", { {"", cpus_ibmat}, {"", NULL}, {"", NULL}}, 0, MODEL_AT, 256,15872,128, ibm_at_init, NULL},
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{"Commodore PC 30 III", ROM_CMDPC30, "cmdpc30", { {"", cpus_286}, {"", NULL}, {"", NULL}}, 0, MODEL_AT|MODEL_HAS_IDE, 640,16384,128, at_ide_init, NULL},
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{"AMI 286 clone", ROM_AMI286, "ami286", { {"", cpus_286}, {"", NULL}, {"", NULL}}, 0, MODEL_AT|MODEL_HAS_IDE, 512,16384,128, at_neat_init, NULL},
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{"Award 286 clone", ROM_AWARD286, "award286", { {"", cpus_286}, {"", NULL}, {"", NULL}}, 0, MODEL_AT|MODEL_HAS_IDE, 512,16384,128, at_scat_init, NULL},
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{"DELL System 200", ROM_DELL200, "dells200", { {"", cpus_286}, {"", NULL}, {"", NULL}}, 0, MODEL_AT, 640,16384,128, dells200_init, NULL},
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{"IBM PS/1 model 2011", ROM_IBMPS1_2011, "ibmps1es", { {"", cpus_ps1_m2011}, {"", NULL}, {"", NULL}}, 1, MODEL_AT|MODEL_PS2, 512,16384,512, ps1_m2011_init, NULL},
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{"IBM PS/2 Model 30-286", ROM_IBMPS2_M30_286, "ibmps2_m30_286", { {"", cpus_ps2_m30_286}, {"", NULL}, {"", NULL}}, 1, MODEL_AT|MODEL_PS2, 1, 16, 1, ps2_m30_286_init, NULL},
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{"IBM PS/2 Model 50", ROM_IBMPS2_M50, "ibmps2_m50", { {"", cpus_ps2_m30_286}, {"", NULL}, {"", NULL}}, 1, MODEL_AT|MODEL_PS2|MODEL_MCA, 1, 16, 1, ps2_model_50_init, NULL},
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{"IBM PS/1 model 2121", ROM_IBMPS1_2121, "ibmps1_2121", { {"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}}, 1, MODEL_AT|MODEL_PS2|MODEL_HAS_IDE, 1, 16, 1, ps1_m2121_init, NULL},
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{"Compaq Deskpro 386", ROM_DESKPRO_386, "deskpro386", { {"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}}, 0, MODEL_AT, 1, 15, 1, deskpro386_init, NULL},
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{"IBM PS/2 Model 55SX", ROM_IBMPS2_M55SX, "ibmps2_m55sx", { {"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}}, 1, MODEL_AT|MODEL_PS2|MODEL_MCA, 1, 8, 1, ps2_model_55sx_init, NULL},
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{"Acer 386SX25/N", ROM_ACER386, "acer386", { {"Intel", cpus_acer}, {"", NULL}, {"", NULL}}, 1, MODEL_AT|MODEL_PS2|MODEL_HAS_IDE, 1, 16, 1, at_acer386sx_init, NULL},
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{"DTK 386SX clone", ROM_DTK386, "dtk386", { {"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}}, 0, MODEL_AT|MODEL_HAS_IDE, 1, 16, 1, at_neat_init, NULL},
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{"DTK 386SX clone", ROM_DTK386, "dtk386", { {"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}}, 0, MODEL_AT|MODEL_HAS_IDE, 512,16384,128, at_neat_init, NULL},
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/* {"Phoenix 386 clone", ROM_PX386, { "Intel", cpus_i386SX, "AMD", cpus_Am386SX, "Cyrix", cpus_486SLC}, 0, MODEL_AT, 1, 16, 1, at_init, NULL},*/
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{"Amstrad MegaPC", ROM_MEGAPC, "megapc", { {"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}}, 1, MODEL_AT|MODEL_PS2|MODEL_HAS_IDE, 1, 16, 1, at_wd76c10_init, NULL},
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{"AMI 386SX clone", ROM_AMI386SX, "ami386", { {"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}}, 0, MODEL_AT|MODEL_HAS_IDE, 1, 256, 1, at_headland_init, NULL},
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{"AMI 386SX clone", ROM_AMI386SX, "ami386", { {"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}}, 0, MODEL_AT|MODEL_HAS_IDE, 512,16384,128, at_headland_init, NULL},
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{"IBM PS/2 Model 80", ROM_IBMPS2_M80, "ibmps2_m80", { {"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}}, 1, MODEL_AT|MODEL_PS2|MODEL_MCA, 1, 12, 1, ps2_model_80_init, NULL},
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{"MR 386DX clone", ROM_MR386DX_OPTI495, "mr386dx", { {"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}}, 0, MODEL_AT|MODEL_HAS_IDE, 1, 256, 1, at_opti495_init, NULL},
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{"AMI 386DX clone", ROM_AMI386DX_OPTI495, "ami386dx", { {"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}}, 0, MODEL_AT|MODEL_HAS_IDE, 1, 256, 1, at_opti495_init, NULL},
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@ -319,6 +319,7 @@ void at_ide_init()
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{
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at_init();
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ide_init();
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mem_remap_top_384k();
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}
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void deskpro386_init()
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@ -354,6 +355,7 @@ void ps1_m2011_init()
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{
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ps1_common_init();
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ps1mb_init();
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mem_remap_top_384k();
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}
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void ps1_m2121_init()
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4
src/pc.c
4
src/pc.c
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@ -684,8 +684,8 @@ void loadconfig(char *fn)
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strncpy(hdd_controller_name, "none", sizeof(hdd_controller_name)-1);
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mem_size = config_get_int(CFG_MACHINE, NULL, "mem_size", 4096);
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if (mem_size < ((models[model].flags & MODEL_AT) ? models[model].min_ram*1024 : models[model].min_ram))
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mem_size = ((models[model].flags & MODEL_AT) ? models[model].min_ram*1024 : models[model].min_ram);
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if (mem_size < (((models[model].flags & MODEL_AT) && models[model].ram_granularity < 128) ? models[model].min_ram*1024 : models[model].min_ram))
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mem_size = (((models[model].flags & MODEL_AT) && models[model].ram_granularity < 128) ? models[model].min_ram*1024 : models[model].min_ram);
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cdrom_drive = config_get_int(CFG_MACHINE, NULL, "cdrom_drive", 0);
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cdrom_enabled = config_get_int(CFG_MACHINE, NULL, "cdrom_enabled", 0);
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|
|
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@ -285,7 +285,7 @@ static BOOL CALLBACK config_dlgproc(HWND hdlg, UINT message, WPARAM wParam, LPAR
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h = GetDlgItem(hdlg, IDC_MEMSPIN);
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SendMessage(h, UDM_SETBUDDY, (WPARAM)GetDlgItem(hdlg, IDC_MEMTEXT), 0);
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SendMessage(h, UDM_SETRANGE, 0, (models[romstomodel[romset]].min_ram << 16) | models[romstomodel[romset]].max_ram);
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if (!models[model].flags & MODEL_AT)
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if (!((models[model].flags & MODEL_AT) && models[model].ram_granularity < 128))
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SendMessage(h, UDM_SETPOS, 0, mem_size);
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else
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SendMessage(h, UDM_SETPOS, 0, mem_size / 1024);
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||||
|
|
@ -333,7 +333,7 @@ static BOOL CALLBACK config_dlgproc(HWND hdlg, UINT message, WPARAM wParam, LPAR
|
|||
SendMessage(h, CB_SETCURSEL, fdd_get_type(1), 0);
|
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h = GetDlgItem(hdlg, IDC_TEXT_MB);
|
||||
if (models[model].flags & MODEL_AT)
|
||||
if ((models[model].flags & MODEL_AT) && models[model].ram_granularity < 128)
|
||||
SendMessage(h, WM_SETTEXT, 0, (LPARAM)(LPCSTR)"MB");
|
||||
else
|
||||
SendMessage(h, WM_SETTEXT, 0, (LPARAM)(LPCSTR)"KB");
|
||||
|
|
@ -417,7 +417,7 @@ static BOOL CALLBACK config_dlgproc(HWND hdlg, UINT message, WPARAM wParam, LPAR
|
|||
mem = models[temp_model].min_ram;
|
||||
else if (mem > models[temp_model].max_ram)
|
||||
mem = models[temp_model].max_ram;
|
||||
if (models[temp_model].flags & MODEL_AT)
|
||||
if ((models[temp_model].flags & MODEL_AT) && models[temp_model].ram_granularity < 128)
|
||||
mem *= 1024;
|
||||
|
||||
h = GetDlgItem(hdlg, IDC_COMBOVID);
|
||||
|
|
@ -582,7 +582,7 @@ static BOOL CALLBACK config_dlgproc(HWND hdlg, UINT message, WPARAM wParam, LPAR
|
|||
SendMessage(h, BM_SETCHECK, ((cpu_flags & CPU_SUPPORTS_DYNAREC) && temp_dynarec) || (cpu_flags & CPU_REQUIRES_DYNAREC), 0);
|
||||
|
||||
h = GetDlgItem(hdlg, IDC_TEXT_MB);
|
||||
if (models[temp_model].flags & MODEL_AT)
|
||||
if ((models[temp_model].flags & MODEL_AT) && models[temp_model].ram_granularity < 128)
|
||||
SendMessage(h, WM_SETTEXT, 0, (LPARAM)(LPCSTR)"MB");
|
||||
else
|
||||
SendMessage(h, WM_SETTEXT, 0, (LPARAM)(LPCSTR)"KB");
|
||||
|
|
|
|||
|
|
@ -298,7 +298,7 @@ int config_dlgproc(void* hdlg, int message, INT_PARAM wParam, LONG_PARAM lParam)
|
|||
(models[romstomodel[romset]].min_ram << 16)
|
||||
| models[romstomodel[romset]].max_ram);
|
||||
wx_sendmessage(h, WX_UDM_SETINCR, 0, models[model].ram_granularity);
|
||||
if (!(models[model].flags & MODEL_AT))
|
||||
if (!((models[model].flags & MODEL_AT) && models[model].ram_granularity < 128))
|
||||
wx_sendmessage(h, WX_UDM_SETPOS, 0, mem_size);
|
||||
else
|
||||
wx_sendmessage(h, WX_UDM_SETPOS, 0, mem_size / 1024);
|
||||
|
|
@ -343,7 +343,7 @@ int config_dlgproc(void* hdlg, int message, INT_PARAM wParam, LONG_PARAM lParam)
|
|||
wx_sendmessage(h, WX_CB_SETCURSEL, fdd_get_type(1), 0);
|
||||
|
||||
h = wx_getdlgitem(hdlg, WX_ID("IDC_TEXT_MB"));
|
||||
if (models[model].flags & MODEL_AT)
|
||||
if ((models[model].flags & MODEL_AT) && models[model].ram_granularity < 128))
|
||||
wx_sendmessage(h, WX_WM_SETTEXT, 0, (LONG_PARAM) "MB");
|
||||
else
|
||||
wx_sendmessage(h, WX_WM_SETTEXT, 0, (LONG_PARAM) "KB");
|
||||
|
|
@ -429,7 +429,7 @@ int config_dlgproc(void* hdlg, int message, INT_PARAM wParam, LONG_PARAM lParam)
|
|||
mem = models[temp_model].min_ram;
|
||||
else if (mem > models[temp_model].max_ram)
|
||||
mem = models[temp_model].max_ram;
|
||||
if (models[temp_model].flags & MODEL_AT)
|
||||
if ((models[temp_model].flags & MODEL_AT) && models[temp_model].ram_granularity < 128)
|
||||
mem *= 1024;
|
||||
|
||||
h = wx_getdlgitem(hdlg, WX_ID("IDC_COMBOVID"));
|
||||
|
|
@ -609,7 +609,7 @@ int config_dlgproc(void* hdlg, int message, INT_PARAM wParam, LONG_PARAM lParam)
|
|||
|| (cpu_flags & CPU_REQUIRES_DYNAREC), 0);
|
||||
|
||||
h = wx_getdlgitem(hdlg, WX_ID("IDC_TEXT_MB"));
|
||||
if (models[temp_model].flags & MODEL_AT)
|
||||
if ((models[temp_model].flags & MODEL_AT) && models[temp_model].ram_granularity < 128)
|
||||
wx_sendmessage(h, WX_WM_SETTEXT, 0, (LONG_PARAM) "MB");
|
||||
else
|
||||
wx_sendmessage(h, WX_WM_SETTEXT, 0, (LONG_PARAM) "KB");
|
||||
|
|
|
|||
Loading…
Reference in a new issue