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When compiling with CODEBLOCK_STATIC_TOP, update TOP register with immediate moves rather than add/sub.

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This commit is contained in:
SarahW 2019-01-28 17:40:28 +00:00
commit 6e5336ae56
5 changed files with 43 additions and 32 deletions
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26
src/codegen_ops_fpu_arith.c
View file

@ -38,7 +38,7 @@ uint32_t ropFADDP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fe
uop_FP_ENTER(ir); uop_FP_ENTER(ir);
uop_FADD(ir, IREG_ST(dest_reg), IREG_ST(dest_reg), IREG_ST(0)); uop_FADD(ir, IREG_ST(dest_reg), IREG_ST(dest_reg), IREG_ST(0));
uop_MOV_IMM(ir, IREG_tag(dest_reg), TAG_VALID); uop_MOV_IMM(ir, IREG_tag(dest_reg), TAG_VALID);
fpu_POP(ir); fpu_POP(block, ir);
return op_pc; return op_pc;
} }
@ -62,7 +62,7 @@ uint32_t ropFCOMP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fe
uop_FCOM(ir, IREG_temp0_W, IREG_ST(0), IREG_ST(src_reg)); uop_FCOM(ir, IREG_temp0_W, IREG_ST(0), IREG_ST(src_reg));
uop_AND_IMM(ir, IREG_NPXS, IREG_NPXS, ~(C0|C2|C3)); uop_AND_IMM(ir, IREG_NPXS, IREG_NPXS, ~(C0|C2|C3));
uop_OR(ir, IREG_NPXS, IREG_NPXS, IREG_temp0_W); uop_OR(ir, IREG_NPXS, IREG_NPXS, IREG_temp0_W);
fpu_POP(ir); fpu_POP(block, ir);
return op_pc; return op_pc;
} }
@ -72,8 +72,7 @@ uint32_t ropFCOMPP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t f
uop_FCOM(ir, IREG_temp0_W, IREG_ST(0), IREG_ST(1)); uop_FCOM(ir, IREG_temp0_W, IREG_ST(0), IREG_ST(1));
uop_AND_IMM(ir, IREG_NPXS, IREG_NPXS, ~(C0|C2|C3)); uop_AND_IMM(ir, IREG_NPXS, IREG_NPXS, ~(C0|C2|C3));
uop_OR(ir, IREG_NPXS, IREG_NPXS, IREG_temp0_W); uop_OR(ir, IREG_NPXS, IREG_NPXS, IREG_temp0_W);
fpu_POP(ir); fpu_POP2(block, ir);
fpu_POP(ir);
return op_pc; return op_pc;
} }
@ -125,7 +124,7 @@ uint32_t ropFDIVP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fe
uop_FP_ENTER(ir); uop_FP_ENTER(ir);
uop_FDIV(ir, IREG_ST(dest_reg), IREG_ST(dest_reg), IREG_ST(0)); uop_FDIV(ir, IREG_ST(dest_reg), IREG_ST(dest_reg), IREG_ST(0));
uop_MOV_IMM(ir, IREG_tag(dest_reg), TAG_VALID); uop_MOV_IMM(ir, IREG_tag(dest_reg), TAG_VALID);
fpu_POP(ir); fpu_POP(block, ir);
return op_pc; return op_pc;
} }
@ -136,7 +135,7 @@ uint32_t ropFDIVRP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t f
uop_FP_ENTER(ir); uop_FP_ENTER(ir);
uop_FDIV(ir, IREG_ST(dest_reg), IREG_ST(0), IREG_ST(dest_reg)); uop_FDIV(ir, IREG_ST(dest_reg), IREG_ST(0), IREG_ST(dest_reg));
uop_MOV_IMM(ir, IREG_tag(dest_reg), TAG_VALID); uop_MOV_IMM(ir, IREG_tag(dest_reg), TAG_VALID);
fpu_POP(ir); fpu_POP(block, ir);
return op_pc; return op_pc;
} }
@ -168,7 +167,7 @@ uint32_t ropFMULP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fe
uop_FP_ENTER(ir); uop_FP_ENTER(ir);
uop_FMUL(ir, IREG_ST(dest_reg), IREG_ST(dest_reg), IREG_ST(0)); uop_FMUL(ir, IREG_ST(dest_reg), IREG_ST(dest_reg), IREG_ST(0));
uop_MOV_IMM(ir, IREG_tag(dest_reg), TAG_VALID); uop_MOV_IMM(ir, IREG_tag(dest_reg), TAG_VALID);
fpu_POP(ir); fpu_POP(block, ir);
return op_pc; return op_pc;
} }
@ -220,7 +219,7 @@ uint32_t ropFSUBP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fe
uop_FP_ENTER(ir); uop_FP_ENTER(ir);
uop_FSUB(ir, IREG_ST(dest_reg), IREG_ST(dest_reg), IREG_ST(0)); uop_FSUB(ir, IREG_ST(dest_reg), IREG_ST(dest_reg), IREG_ST(0));
uop_MOV_IMM(ir, IREG_tag(dest_reg), TAG_VALID); uop_MOV_IMM(ir, IREG_tag(dest_reg), TAG_VALID);
fpu_POP(ir); fpu_POP(block, ir);
return op_pc; return op_pc;
} }
@ -231,7 +230,7 @@ uint32_t ropFSUBRP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t f
uop_FP_ENTER(ir); uop_FP_ENTER(ir);
uop_FSUB(ir, IREG_ST(dest_reg), IREG_ST(0), IREG_ST(dest_reg)); uop_FSUB(ir, IREG_ST(dest_reg), IREG_ST(0), IREG_ST(dest_reg));
uop_MOV_IMM(ir, IREG_tag(dest_reg), TAG_VALID); uop_MOV_IMM(ir, IREG_tag(dest_reg), TAG_VALID);
fpu_POP(ir); fpu_POP(block, ir);
return op_pc; return op_pc;
} }
@ -255,7 +254,7 @@ uint32_t ropFUCOMP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t f
uop_FCOM(ir, IREG_temp0_W, IREG_ST(0), IREG_ST(src_reg)); uop_FCOM(ir, IREG_temp0_W, IREG_ST(0), IREG_ST(src_reg));
uop_AND_IMM(ir, IREG_NPXS, IREG_NPXS, ~(C0|C2|C3)); uop_AND_IMM(ir, IREG_NPXS, IREG_NPXS, ~(C0|C2|C3));
uop_OR(ir, IREG_NPXS, IREG_NPXS, IREG_temp0_W); uop_OR(ir, IREG_NPXS, IREG_NPXS, IREG_temp0_W);
fpu_POP(ir); fpu_POP(block, ir);
return op_pc; return op_pc;
} }
@ -265,8 +264,7 @@ uint32_t ropFUCOMPP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t
uop_FCOM(ir, IREG_temp0_W, IREG_ST(0), IREG_ST(1)); uop_FCOM(ir, IREG_temp0_W, IREG_ST(0), IREG_ST(1));
uop_AND_IMM(ir, IREG_NPXS, IREG_NPXS, ~(C0|C2|C3)); uop_AND_IMM(ir, IREG_NPXS, IREG_NPXS, ~(C0|C2|C3));
uop_OR(ir, IREG_NPXS, IREG_NPXS, IREG_temp0_W); uop_OR(ir, IREG_NPXS, IREG_NPXS, IREG_temp0_W);
fpu_POP(ir); fpu_POP2(block, ir);
fpu_POP(ir);
return op_pc; return op_pc;
} }
@ -316,7 +314,7 @@ uint32_t ropFCOMP ## name(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uin
uop_FCOM(ir, IREG_temp1_W, IREG_ST(0), IREG_temp0_D); \ uop_FCOM(ir, IREG_temp1_W, IREG_ST(0), IREG_temp0_D); \
uop_AND_IMM(ir, IREG_NPXS, IREG_NPXS, ~(C0|C2|C3)); \ uop_AND_IMM(ir, IREG_NPXS, IREG_NPXS, ~(C0|C2|C3)); \
uop_OR(ir, IREG_NPXS, IREG_NPXS, IREG_temp1_W); \ uop_OR(ir, IREG_NPXS, IREG_NPXS, IREG_temp1_W); \
fpu_POP(ir); \ fpu_POP(block, ir); \
\ \
return op_pc+1; \ return op_pc+1; \
} \ } \
@ -447,7 +445,7 @@ uint32_t ropFICOMP ## name(codeblock_t *block, ir_data_t *ir, uint8_t opcode, ui
uop_FCOM(ir, IREG_temp1_W, IREG_ST(0), IREG_temp0_D); \ uop_FCOM(ir, IREG_temp1_W, IREG_ST(0), IREG_temp0_D); \
uop_AND_IMM(ir, IREG_NPXS, IREG_NPXS, ~(C0|C2|C3)); \ uop_AND_IMM(ir, IREG_NPXS, IREG_NPXS, ~(C0|C2|C3)); \
uop_OR(ir, IREG_NPXS, IREG_NPXS, IREG_temp1_W); \ uop_OR(ir, IREG_NPXS, IREG_NPXS, IREG_temp1_W); \
fpu_POP(ir); \ fpu_POP(block, ir); \
\ \
return op_pc+1; \ return op_pc+1; \
} \ } \

4
src/codegen_ops_fpu_constant.c
View file

@ -17,7 +17,7 @@ uint32_t ropFLD1(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fet
uop_MOV_IMM(ir, IREG_temp0, 1); uop_MOV_IMM(ir, IREG_temp0, 1);
uop_MOV_DOUBLE_INT(ir, IREG_ST(-1), IREG_temp0); uop_MOV_DOUBLE_INT(ir, IREG_ST(-1), IREG_temp0);
uop_MOV_IMM(ir, IREG_tag(-1), TAG_VALID); uop_MOV_IMM(ir, IREG_tag(-1), TAG_VALID);
fpu_PUSH(ir); fpu_PUSH(block, ir);
return op_pc; return op_pc;
} }
@ -27,7 +27,7 @@ uint32_t ropFLDZ(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fet
uop_MOV_IMM(ir, IREG_temp0, 0); uop_MOV_IMM(ir, IREG_temp0, 0);
uop_MOV_DOUBLE_INT(ir, IREG_ST(-1), IREG_temp0); uop_MOV_DOUBLE_INT(ir, IREG_ST(-1), IREG_temp0);
uop_MOV_IMM(ir, IREG_tag(-1), TAG_VALID); uop_MOV_IMM(ir, IREG_tag(-1), TAG_VALID);
fpu_PUSH(ir); fpu_PUSH(block, ir);
return op_pc; return op_pc;
} }

20
src/codegen_ops_fpu_loadstore.c
View file

@ -22,7 +22,7 @@ uint32_t ropFLDs(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fet
codegen_check_seg_read(block, ir, target_seg); codegen_check_seg_read(block, ir, target_seg);
uop_MEM_LOAD_SINGLE(ir, IREG_ST(-1), ireg_seg_base(target_seg), IREG_eaaddr); uop_MEM_LOAD_SINGLE(ir, IREG_ST(-1), ireg_seg_base(target_seg), IREG_eaaddr);
uop_MOV_IMM(ir, IREG_tag(-1), TAG_VALID); uop_MOV_IMM(ir, IREG_tag(-1), TAG_VALID);
fpu_PUSH(ir); fpu_PUSH(block, ir);
return op_pc+1; return op_pc+1;
} }
@ -37,7 +37,7 @@ uint32_t ropFLDd(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fet
codegen_check_seg_read(block, ir, target_seg); codegen_check_seg_read(block, ir, target_seg);
uop_MEM_LOAD_DOUBLE(ir, IREG_ST(-1), ireg_seg_base(target_seg), IREG_eaaddr); uop_MEM_LOAD_DOUBLE(ir, IREG_ST(-1), ireg_seg_base(target_seg), IREG_eaaddr);
uop_MOV_IMM(ir, IREG_tag(-1), TAG_VALID); uop_MOV_IMM(ir, IREG_tag(-1), TAG_VALID);
fpu_PUSH(ir); fpu_PUSH(block, ir);
return op_pc+1; return op_pc+1;
} }
@ -66,7 +66,7 @@ uint32_t ropFSTPs(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fe
codegen_check_seg_write(block, ir, target_seg); codegen_check_seg_write(block, ir, target_seg);
uop_MEM_STORE_SINGLE(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_ST(0)); uop_MEM_STORE_SINGLE(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_ST(0));
uop_MOV_IMM(ir, IREG_tag(0), TAG_EMPTY); uop_MOV_IMM(ir, IREG_tag(0), TAG_EMPTY);
fpu_POP(ir); fpu_POP(block, ir);
return op_pc+1; return op_pc+1;
} }
@ -94,7 +94,7 @@ uint32_t ropFSTPd(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fe
codegen_check_seg_write(block, ir, target_seg); codegen_check_seg_write(block, ir, target_seg);
uop_MEM_STORE_DOUBLE(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_ST(0)); uop_MEM_STORE_DOUBLE(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_ST(0));
uop_MOV_IMM(ir, IREG_tag(0), TAG_EMPTY); uop_MOV_IMM(ir, IREG_tag(0), TAG_EMPTY);
fpu_POP(ir); fpu_POP(block, ir);
return op_pc+1; return op_pc+1;
} }
@ -112,7 +112,7 @@ uint32_t ropFILDw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fe
uop_MEM_LOAD_REG(ir, IREG_temp0_W, ireg_seg_base(target_seg), IREG_eaaddr); uop_MEM_LOAD_REG(ir, IREG_temp0_W, ireg_seg_base(target_seg), IREG_eaaddr);
uop_MOV_DOUBLE_INT(ir, IREG_ST(-1), IREG_temp0_W); uop_MOV_DOUBLE_INT(ir, IREG_ST(-1), IREG_temp0_W);
uop_MOV_IMM(ir, IREG_tag(-1), TAG_VALID); uop_MOV_IMM(ir, IREG_tag(-1), TAG_VALID);
fpu_PUSH(ir); fpu_PUSH(block, ir);
return op_pc+1; return op_pc+1;
} }
@ -128,7 +128,7 @@ uint32_t ropFILDl(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fe
uop_MEM_LOAD_REG(ir, IREG_temp0, ireg_seg_base(target_seg), IREG_eaaddr); uop_MEM_LOAD_REG(ir, IREG_temp0, ireg_seg_base(target_seg), IREG_eaaddr);
uop_MOV_DOUBLE_INT(ir, IREG_ST(-1), IREG_temp0); uop_MOV_DOUBLE_INT(ir, IREG_ST(-1), IREG_temp0);
uop_MOV_IMM(ir, IREG_tag(-1), TAG_VALID); uop_MOV_IMM(ir, IREG_tag(-1), TAG_VALID);
fpu_PUSH(ir); fpu_PUSH(block, ir);
return op_pc+1; return op_pc+1;
} }
@ -144,7 +144,7 @@ uint32_t ropFILDq(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fe
uop_MEM_LOAD_REG(ir, IREG_ST_i64(-1), ireg_seg_base(target_seg), IREG_eaaddr); uop_MEM_LOAD_REG(ir, IREG_ST_i64(-1), ireg_seg_base(target_seg), IREG_eaaddr);
uop_MOV_DOUBLE_INT(ir, IREG_ST(-1), IREG_ST_i64(-1)); uop_MOV_DOUBLE_INT(ir, IREG_ST(-1), IREG_ST_i64(-1));
uop_MOV_IMM(ir, IREG_tag(-1), TAG_VALID | TAG_UINT64); uop_MOV_IMM(ir, IREG_tag(-1), TAG_VALID | TAG_UINT64);
fpu_PUSH(ir); fpu_PUSH(block, ir);
return op_pc+1; return op_pc+1;
} }
@ -176,7 +176,7 @@ uint32_t ropFISTPw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t f
uop_MOV_INT_DOUBLE(ir, IREG_temp0_W, IREG_ST(0)); uop_MOV_INT_DOUBLE(ir, IREG_temp0_W, IREG_ST(0));
uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0_W); uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0_W);
uop_MOV_IMM(ir, IREG_tag(0), TAG_EMPTY); uop_MOV_IMM(ir, IREG_tag(0), TAG_EMPTY);
fpu_POP(ir); fpu_POP(block, ir);
return op_pc+1; return op_pc+1;
} }
@ -207,7 +207,7 @@ uint32_t ropFISTPl(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t f
uop_MOV_INT_DOUBLE(ir, IREG_temp0, IREG_ST(0)); uop_MOV_INT_DOUBLE(ir, IREG_temp0, IREG_ST(0));
uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0); uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0);
uop_MOV_IMM(ir, IREG_tag(0), TAG_EMPTY); uop_MOV_IMM(ir, IREG_tag(0), TAG_EMPTY);
fpu_POP(ir); fpu_POP(block, ir);
return op_pc+1; return op_pc+1;
} }
@ -223,7 +223,7 @@ uint32_t ropFISTPq(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t f
uop_MOV_INT_DOUBLE_64(ir, IREG_temp0_Q, IREG_ST(0), IREG_ST_i64(0), IREG_tag(0)); uop_MOV_INT_DOUBLE_64(ir, IREG_temp0_Q, IREG_ST(0), IREG_ST_i64(0), IREG_tag(0));
uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0_Q); uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0_Q);
uop_MOV_IMM(ir, IREG_tag(0), TAG_EMPTY); uop_MOV_IMM(ir, IREG_tag(0), TAG_EMPTY);
fpu_POP(ir); fpu_POP(block, ir);
return op_pc+1; return op_pc+1;
} }

4
src/codegen_ops_fpu_misc.c
View file

@ -29,7 +29,7 @@ uint32_t ropFLD(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetc
uop_MOV(ir, IREG_ST(-1), IREG_ST(src_reg)); uop_MOV(ir, IREG_ST(-1), IREG_ST(src_reg));
uop_MOV(ir, IREG_ST_i64(-1), IREG_ST_i64(src_reg)); uop_MOV(ir, IREG_ST_i64(-1), IREG_ST_i64(src_reg));
uop_MOV(ir, IREG_tag(-1), IREG_tag(src_reg)); uop_MOV(ir, IREG_tag(-1), IREG_tag(src_reg));
fpu_PUSH(ir); fpu_PUSH(block, ir);
return op_pc; return op_pc;
} }
@ -53,7 +53,7 @@ uint32_t ropFSTP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fet
uop_MOV(ir, IREG_ST(dest_reg), IREG_ST(0)); uop_MOV(ir, IREG_ST(dest_reg), IREG_ST(0));
uop_MOV(ir, IREG_ST_i64(dest_reg), IREG_ST_i64(0)); uop_MOV(ir, IREG_ST_i64(dest_reg), IREG_ST_i64(0));
uop_MOV(ir, IREG_tag(dest_reg), IREG_tag(0)); uop_MOV(ir, IREG_tag(dest_reg), IREG_tag(0));
fpu_POP(ir); fpu_POP(block, ir);
return op_pc; return op_pc;
} }

17
src/codegen_ops_helpers.h
View file

@ -46,11 +46,24 @@ static inline void SUB_SP(ir_data_t *ir, int offset)
uop_SUB_IMM(ir, IREG_SP, IREG_SP, offset); uop_SUB_IMM(ir, IREG_SP, IREG_SP, offset);
} }
static inline void fpu_POP(ir_data_t *ir) static inline void fpu_POP(codeblock_t *block, ir_data_t *ir)
{ {
if (block->flags & CODEBLOCK_STATIC_TOP)
uop_MOV_IMM(ir, IREG_FPU_TOP, cpu_state.TOP + 1);
else
uop_ADD_IMM(ir, IREG_FPU_TOP, IREG_FPU_TOP, 1); uop_ADD_IMM(ir, IREG_FPU_TOP, IREG_FPU_TOP, 1);
} }
static inline void fpu_PUSH(ir_data_t *ir) static inline void fpu_POP2(codeblock_t *block, ir_data_t *ir)
{ {
if (block->flags & CODEBLOCK_STATIC_TOP)
uop_MOV_IMM(ir, IREG_FPU_TOP, cpu_state.TOP + 2);
else
uop_ADD_IMM(ir, IREG_FPU_TOP, IREG_FPU_TOP, 2);
}
static inline void fpu_PUSH(codeblock_t *block, ir_data_t *ir)
{
if (block->flags & CODEBLOCK_STATIC_TOP)
uop_MOV_IMM(ir, IREG_FPU_TOP, cpu_state.TOP - 1);
else
uop_SUB_IMM(ir, IREG_FPU_TOP, IREG_FPU_TOP, 1); uop_SUB_IMM(ir, IREG_FPU_TOP, IREG_FPU_TOP, 1);
} }