Retro/pcem
Watch
1
0
Fork
You've already forked pcem
 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

Added recompiled versions of memory variants of F[I]ADD, F[I]DIV, F[I]DIVR, F[I]MUL, F[I]SUB and F[I]SUBR.

Browse source
This commit is contained in:
SarahW 2018-10-20 20:03:28 +01:00
commit 6d8af5df4a
16 changed files with 495 additions and 93 deletions
Download patch file Download diff file Expand all files Collapse all files

196
src/codegen_ops_fpu_arith.c
View file

@ -200,3 +200,199 @@ uint32_t ropFSUBRP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t f
return op_pc;
}
#define ropF_arith_mem(name, load_uop) \
uint32_t ropFADD ## name(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
{ \
x86seg *target_seg; \
\
uop_FP_ENTER(ir); \
uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
op_pc--; \
target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0); \
codegen_check_seg_read(block, ir, target_seg); \
load_uop(ir, IREG_temp0_D, ireg_seg_base(target_seg), IREG_eaaddr); \
uop_FADD(ir, IREG_ST(0), IREG_ST(0), IREG_temp0_D); \
uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID); \
\
return op_pc+1; \
} \
uint32_t ropFDIV ## name(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
{ \
x86seg *target_seg; \
\
uop_FP_ENTER(ir); \
uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
op_pc--; \
target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0); \
codegen_check_seg_read(block, ir, target_seg); \
load_uop(ir, IREG_temp0_D, ireg_seg_base(target_seg), IREG_eaaddr); \
uop_FDIV(ir, IREG_ST(0), IREG_ST(0), IREG_temp0_D); \
uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID); \
\
return op_pc+1; \
} \
uint32_t ropFDIVR ## name(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
{ \
x86seg *target_seg; \
\
uop_FP_ENTER(ir); \
uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
op_pc--; \
target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0); \
codegen_check_seg_read(block, ir, target_seg); \
load_uop(ir, IREG_temp0_D, ireg_seg_base(target_seg), IREG_eaaddr); \
uop_FDIV(ir, IREG_ST(0), IREG_temp0_D, IREG_ST(0)); \
uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID); \
\
return op_pc+1; \
} \
uint32_t ropFMUL ## name(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
{ \
x86seg *target_seg; \
\
uop_FP_ENTER(ir); \
uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
op_pc--; \
target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0); \
codegen_check_seg_read(block, ir, target_seg); \
load_uop(ir, IREG_temp0_D, ireg_seg_base(target_seg), IREG_eaaddr); \
uop_FMUL(ir, IREG_ST(0), IREG_ST(0), IREG_temp0_D); \
uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID); \
\
return op_pc+1; \
} \
uint32_t ropFSUB ## name(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
{ \
x86seg *target_seg; \
\
uop_FP_ENTER(ir); \
uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
op_pc--; \
target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0); \
codegen_check_seg_read(block, ir, target_seg); \
load_uop(ir, IREG_temp0_D, ireg_seg_base(target_seg), IREG_eaaddr); \
uop_FSUB(ir, IREG_ST(0), IREG_ST(0), IREG_temp0_D); \
uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID); \
\
return op_pc+1; \
} \
uint32_t ropFSUBR ## name(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
{ \
x86seg *target_seg; \
\
uop_FP_ENTER(ir); \
uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
op_pc--; \
target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0); \
codegen_check_seg_read(block, ir, target_seg); \
load_uop(ir, IREG_temp0_D, ireg_seg_base(target_seg), IREG_eaaddr); \
uop_FSUB(ir, IREG_ST(0), IREG_temp0_D, IREG_ST(0)); \
uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID); \
\
return op_pc+1; \
}
ropF_arith_mem(s, uop_MEM_LOAD_SINGLE)
ropF_arith_mem(d, uop_MEM_LOAD_DOUBLE)
#define ropFI_arith_mem(name, temp_reg) \
uint32_t ropFIADD ## name(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
{ \
x86seg *target_seg; \
\
uop_FP_ENTER(ir); \
uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
op_pc--; \
target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0); \
codegen_check_seg_read(block, ir, target_seg); \
uop_MEM_LOAD_REG(ir, temp_reg, ireg_seg_base(target_seg), IREG_eaaddr); \
uop_MOV_DOUBLE_INT(ir, IREG_temp0_D, temp_reg); \
uop_FADD(ir, IREG_ST(0), IREG_ST(0), IREG_temp0_D); \
uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID); \
\
return op_pc+1; \
} \
uint32_t ropFIDIV ## name(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
{ \
x86seg *target_seg; \
\
uop_FP_ENTER(ir); \
uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
op_pc--; \
target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0); \
codegen_check_seg_read(block, ir, target_seg); \
uop_MEM_LOAD_REG(ir, temp_reg, ireg_seg_base(target_seg), IREG_eaaddr); \
uop_MOV_DOUBLE_INT(ir, IREG_temp0_D, temp_reg); \
uop_FDIV(ir, IREG_ST(0), IREG_ST(0), IREG_temp0_D); \
uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID); \
\
return op_pc+1; \
} \
uint32_t ropFIDIVR ## name(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)\
{ \
x86seg *target_seg; \
\
uop_FP_ENTER(ir); \
uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
op_pc--; \
target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0); \
codegen_check_seg_read(block, ir, target_seg); \
uop_MEM_LOAD_REG(ir, temp_reg, ireg_seg_base(target_seg), IREG_eaaddr); \
uop_MOV_DOUBLE_INT(ir, IREG_temp0_D, temp_reg); \
uop_FDIV(ir, IREG_ST(0), IREG_temp0_D, IREG_ST(0)); \
uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID); \
\
return op_pc+1; \
} \
uint32_t ropFIMUL ## name(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
{ \
x86seg *target_seg; \
\
uop_FP_ENTER(ir); \
uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
op_pc--; \
target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0); \
codegen_check_seg_read(block, ir, target_seg); \
uop_MEM_LOAD_REG(ir, temp_reg, ireg_seg_base(target_seg), IREG_eaaddr); \
uop_MOV_DOUBLE_INT(ir, IREG_temp0_D, temp_reg); \
uop_FMUL(ir, IREG_ST(0), IREG_ST(0), IREG_temp0_D); \
uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID); \
\
return op_pc+1; \
} \
uint32_t ropFISUB ## name(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
{ \
x86seg *target_seg; \
\
uop_FP_ENTER(ir); \
uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
op_pc--; \
target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0); \
codegen_check_seg_read(block, ir, target_seg); \
uop_MEM_LOAD_REG(ir, temp_reg, ireg_seg_base(target_seg), IREG_eaaddr); \
uop_MOV_DOUBLE_INT(ir, IREG_temp0_D, temp_reg); \
uop_FSUB(ir, IREG_ST(0), IREG_ST(0), IREG_temp0_D); \
uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID); \
\
return op_pc+1; \
} \
uint32_t ropFISUBR ## name(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)\
{ \
x86seg *target_seg; \
\
uop_FP_ENTER(ir); \
uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
op_pc--; \
target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0); \
codegen_check_seg_read(block, ir, target_seg); \
uop_MEM_LOAD_REG(ir, temp_reg, ireg_seg_base(target_seg), IREG_eaaddr); \
uop_MOV_DOUBLE_INT(ir, IREG_temp0_D, temp_reg); \
uop_FSUB(ir, IREG_ST(0), IREG_temp0_D, IREG_ST(0)); \
uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID); \
\
return op_pc+1; \
}
ropFI_arith_mem(l, IREG_temp0)
ropFI_arith_mem(w, IREG_temp0_W)