Added emulation of Commodore SL386SX-25 (PC Player II).
As part of this, added emulation of the onboard AVGA2, and fixed a couple of bugs in the Cirrus Logic extended write modes. Currently chipset (VLSI SCAMP) is missing EMS emulation.
This commit is contained in:
SarahW
parent
f56f5e76e6
commit
5c8e1aecc2
12 changed files with 499 additions and 37 deletions
262
src/vid_cl5429.c
262
src/vid_cl5429.c
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@ -15,7 +15,8 @@
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enum
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{
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CL_TYPE_GD5429 = 0,
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CL_TYPE_AVGA2 = 0,
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CL_TYPE_GD5429,
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CL_TYPE_GD5430,
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CL_TYPE_GD5434
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};
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@ -73,8 +74,14 @@ typedef struct gd5429_t
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int mmio_vram_overlap;
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uint8_t sr10_read, sr11_read;
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uint8_t latch_ext[4];
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} gd5429_t;
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#define GRB_X8_ADDRESSING (1 << 1)
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#define GRB_WRITEMODE_EXT (1 << 2)
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#define GRB_8B_LATCHES (1 << 3)
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static void gd5429_mmio_write(uint32_t addr, uint8_t val, void *p);
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static void gd5429_mmio_writew(uint32_t addr, uint16_t val, void *p);
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static void gd5429_mmio_writel(uint32_t addr, uint32_t val, void *p);
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@ -88,13 +95,15 @@ void gd5429_blt_write_l(uint32_t addr, uint32_t val, void *p);
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void gd5429_recalc_banking(gd5429_t *gd5429);
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void gd5429_recalc_mapping(gd5429_t *gd5429);
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uint8_t gd5429_read_linear(uint32_t addr, void *p);
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void gd5429_out(uint16_t addr, uint8_t val, void *p)
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{
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gd5429_t *gd5429 = (gd5429_t *)p;
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svga_t *svga = &gd5429->svga;
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uint8_t old;
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if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1))
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if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1))
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addr ^= 0x60;
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// pclog("gd5429 out %04X %02X\n", addr, val);
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@ -143,7 +152,8 @@ void gd5429_out(uint16_t addr, uint8_t val, void *p)
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case 0x07:
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svga->set_reset_disabled = svga->seqregs[7] & 1;
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case 0x17:
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gd5429_recalc_mapping(gd5429);
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if (gd5429->type >= CL_TYPE_GD5429)
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gd5429_recalc_mapping(gd5429);
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break;
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}
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return;
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@ -196,6 +206,8 @@ void gd5429_out(uint16_t addr, uint8_t val, void *p)
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if (svga->gdcaddr > 8)
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{
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svga->gdcreg[svga->gdcaddr & 0x3f] = val;
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if (gd5429->type < CL_TYPE_GD5429 && (svga->gdcaddr > 0xb))
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return;
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switch (svga->gdcaddr)
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{
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case 0x09: case 0x0a: case 0x0b:
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@ -318,7 +330,7 @@ uint8_t gd5429_in(uint16_t addr, void *p)
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gd5429_t *gd5429 = (gd5429_t *)p;
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svga_t *svga = &gd5429->svga;
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if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3d0) && !(svga->miscout & 1))
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if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1))
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addr ^= 0x60;
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// if (addr != 0x3da) pclog("IN gd5429 %04X\n", addr);
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@ -343,6 +355,8 @@ uint8_t gd5429_in(uint16_t addr, void *p)
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return ((svga->seqregs[6] & 0x17) == 0x12) ? 0x12 : 0x0f;
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case 0x17:
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if (gd5429->type < CL_TYPE_GD5429)
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break;
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temp = svga->seqregs[0x17];
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temp &= ~(7 << 3);
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if (gd5429->type == CL_TYPE_GD5429)
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@ -395,6 +409,8 @@ uint8_t gd5429_in(uint16_t addr, void *p)
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case 0x27: /*ID*/
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switch (gd5429->type)
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{
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case CL_TYPE_AVGA2:
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return 0x18; /*AVGA2*/
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case CL_TYPE_GD5429:
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return 0x9c; /*GD5429*/
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case CL_TYPE_GD5430:
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@ -654,10 +670,10 @@ static void gd5429_write(uint32_t addr, uint8_t val, void *p)
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{
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gd5429_t *gd5429 = (gd5429_t *)p;
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svga_t *svga = &gd5429->svga;
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// pclog("gd5429_write : %05X %02X ", addr, val);
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addr &= svga->banked_mask;
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addr = (addr & 0x7fff) + gd5429->bank[(addr >> 15) & 1];
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// pclog("%08X\n", addr);
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gd5429_write_linear(addr, val, p);
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}
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static void gd5429_writew(uint32_t addr, uint16_t val, void *p)
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@ -668,7 +684,7 @@ static void gd5429_writew(uint32_t addr, uint16_t val, void *p)
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addr &= svga->banked_mask;
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addr = (addr & 0x7fff) + gd5429->bank[(addr >> 15) & 1];
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if (svga->writemode < 4)
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if ((svga->writemode < 4) && !(svga->gdcreg[0xb] & (GRB_X8_ADDRESSING | GRB_8B_LATCHES)))
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svga_writew_linear(addr, val, svga);
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else
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{
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@ -684,7 +700,7 @@ static void gd5429_writel(uint32_t addr, uint32_t val, void *p)
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addr &= svga->banked_mask;
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addr = (addr & 0x7fff) + gd5429->bank[(addr >> 15) & 1];
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if (svga->writemode < 4)
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if ((svga->writemode < 4) && !(svga->gdcreg[0xb] & (GRB_X8_ADDRESSING | GRB_8B_LATCHES)))
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svga_writel_linear(addr, val, svga);
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else
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{
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@ -699,13 +715,10 @@ static uint8_t gd5429_read(uint32_t addr, void *p)
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{
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gd5429_t *gd5429 = (gd5429_t *)p;
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svga_t *svga = &gd5429->svga;
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uint8_t ret;
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// pclog("gd5429_read : %05X ", addr);
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addr &= svga->banked_mask;
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addr = (addr & 0x7fff) + gd5429->bank[(addr >> 15) & 1];
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ret = svga_read_linear(addr, &gd5429->svga);
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// pclog("%08X %02X\n", addr, ret);
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return ret;
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return gd5429_read_linear(addr, gd5429);
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}
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static uint16_t gd5429_readw(uint32_t addr, void *p)
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{
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@ -714,7 +727,10 @@ static uint16_t gd5429_readw(uint32_t addr, void *p)
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addr &= svga->banked_mask;
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addr = (addr & 0x7fff) + gd5429->bank[(addr >> 15) & 1];
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return svga_readw_linear(addr, &gd5429->svga);
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if (!(svga->gdcreg[0xb] & (GRB_X8_ADDRESSING | GRB_8B_LATCHES)))
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return svga_readw_linear(addr, &gd5429->svga);
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return gd5429_read_linear(addr, gd5429) | (gd5429_read_linear(addr+1, gd5429) << 8);
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}
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static uint32_t gd5429_readl(uint32_t addr, void *p)
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{
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@ -723,7 +739,11 @@ static uint32_t gd5429_readl(uint32_t addr, void *p)
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addr &= svga->banked_mask;
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addr = (addr & 0x7fff) + gd5429->bank[(addr >> 15) & 1];
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return svga_readl_linear(addr, &gd5429->svga);
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if (!(svga->gdcreg[0xb] & (GRB_X8_ADDRESSING | GRB_8B_LATCHES)))
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return svga_readl_linear(addr, &gd5429->svga);
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return gd5429_read_linear(addr, gd5429) | (gd5429_read_linear(addr+1, gd5429) << 8) |
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(gd5429_read_linear(addr+2, gd5429) << 16) | (gd5429_read_linear(addr+3, gd5429) << 24);
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}
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void gd5429_write_linear(uint32_t addr, uint8_t val, void *p)
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@ -731,7 +751,7 @@ void gd5429_write_linear(uint32_t addr, uint8_t val, void *p)
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gd5429_t *gd5429 = (gd5429_t *)p;
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svga_t *svga = &gd5429->svga;
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uint8_t vala, valb, valc, vald, wm = svga->writemask;
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int writemask2 = svga->writemask;
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int writemask2 = svga->seqregs[2];
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cycles -= video_timing_write_b;
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cycles_lost += video_timing_write_b;
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@ -741,7 +761,9 @@ void gd5429_write_linear(uint32_t addr, uint8_t val, void *p)
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// if (svga_output) pclog("Write LFB %08X %02X ", addr, val);
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if (!(svga->gdcreg[6] & 1))
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svga->fullchange = 2;
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if ((svga->chain4 || svga->fb_only) && (svga->writemode < 4))
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if (svga->gdcreg[0xb] & GRB_X8_ADDRESSING)
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addr <<= 3;
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else if ((svga->chain4 || svga->fb_only) && (svga->writemode < 4))
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{
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writemask2 = 1 << (addr & 3);
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addr &= ~3;
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@ -818,7 +840,6 @@ void gd5429_write_linear(uint32_t addr, uint8_t val, void *p)
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else
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{
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// pclog("Writemode 4 : %X ", addr);
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addr <<= 1;
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svga->changedvram[addr >> 12] = changeframecount;
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// pclog("%X %X %02x\n", addr, val, svga->gdcreg[0xb]);
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if (val & svga->seqregs[2] & 0x80)
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@ -891,7 +912,6 @@ void gd5429_write_linear(uint32_t addr, uint8_t val, void *p)
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else
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{
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// pclog("Writemode 5 : %X ", addr);
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addr <<= 1;
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svga->changedvram[addr >> 12] = changeframecount;
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// pclog("%X %X %02x\n", addr, val, svga->gdcreg[0xb]);
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if (svga->seqregs[2] & 0x80)
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@ -914,10 +934,27 @@ void gd5429_write_linear(uint32_t addr, uint8_t val, void *p)
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break;
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case 1:
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if (writemask2 & 1) svga->vram[addr] = svga->la;
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if (writemask2 & 2) svga->vram[addr | 0x1] = svga->lb;
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if (writemask2 & 4) svga->vram[addr | 0x2] = svga->lc;
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if (writemask2 & 8) svga->vram[addr | 0x3] = svga->ld;
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if (svga->gdcreg[0xb] & GRB_WRITEMODE_EXT)
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{
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if (writemask2 & 0x80) svga->vram[addr] = svga->la;
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if (writemask2 & 0x40) svga->vram[addr | 0x1] = svga->lb;
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if (writemask2 & 0x20) svga->vram[addr | 0x2] = svga->lc;
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if (writemask2 & 0x10) svga->vram[addr | 0x3] = svga->ld;
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if (svga->gdcreg[0xb] & GRB_8B_LATCHES)
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{
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if (writemask2 & 0x08) svga->vram[addr | 0x4] = gd5429->latch_ext[0];
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if (writemask2 & 0x04) svga->vram[addr | 0x5] = gd5429->latch_ext[1];
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if (writemask2 & 0x02) svga->vram[addr | 0x6] = gd5429->latch_ext[2];
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if (writemask2 & 0x01) svga->vram[addr | 0x7] = gd5429->latch_ext[3];
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}
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}
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else
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{
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if (writemask2 & 1) svga->vram[addr] = svga->la;
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if (writemask2 & 2) svga->vram[addr | 0x1] = svga->lb;
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if (writemask2 & 4) svga->vram[addr | 0x2] = svga->lc;
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if (writemask2 & 8) svga->vram[addr | 0x3] = svga->ld;
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}
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break;
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case 0:
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if (svga->gdcreg[3] & 7)
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@ -1055,13 +1092,92 @@ void gd5429_write_linear(uint32_t addr, uint8_t val, void *p)
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}
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}
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uint8_t gd5429_read_linear(uint32_t addr, void *p)
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{
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gd5429_t *gd5429 = (gd5429_t *)p;
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svga_t *svga = &gd5429->svga;
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uint8_t temp, temp2, temp3, temp4;
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int readplane = svga->readplane;
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uint32_t latch_addr = (addr << 2) & svga->decode_mask;
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cycles -= video_timing_read_b;
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cycles_lost += video_timing_read_b;
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egareads++;
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if (svga->gdcreg[0xb] & GRB_X8_ADDRESSING)
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addr <<= 3;
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else if (svga->chain4 || svga->fb_only)
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{
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addr &= svga->decode_mask;
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if (addr >= svga->vram_max)
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return 0xff;
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return svga->vram[addr & svga->vram_mask];
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}
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else if (svga->chain2_read)
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{
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readplane = (readplane & 2) | (addr & 1);
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addr &= ~1;
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addr <<= 2;
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}
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else
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addr<<=2;
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addr &= svga->decode_mask;
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if (latch_addr >= svga->vram_max)
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{
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svga->la = svga->lb = svga->lc = svga->ld = 0xff;
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if (svga->gdcreg[0xb] & GRB_8B_LATCHES)
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gd5429->latch_ext[0] = gd5429->latch_ext[1] = gd5429->latch_ext[2] = gd5429->latch_ext[3] = 0xff;
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}
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else
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{
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latch_addr &= svga->vram_mask;
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svga->la = svga->vram[latch_addr];
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svga->lb = svga->vram[latch_addr | 0x1];
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svga->lc = svga->vram[latch_addr | 0x2];
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svga->ld = svga->vram[latch_addr | 0x3];
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if (svga->gdcreg[0xb] & GRB_8B_LATCHES)
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{
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gd5429->latch_ext[0] = svga->vram[latch_addr | 0x4];
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gd5429->latch_ext[1] = svga->vram[latch_addr | 0x5];
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gd5429->latch_ext[2] = svga->vram[latch_addr | 0x6];
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gd5429->latch_ext[3] = svga->vram[latch_addr | 0x7];
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}
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}
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if (addr >= svga->vram_max)
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return 0xff;
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addr &= svga->vram_mask;
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if (svga->readmode)
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{
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temp = svga->la;
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temp ^= (svga->colourcompare & 1) ? 0xff : 0;
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temp &= (svga->colournocare & 1) ? 0xff : 0;
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temp2 = svga->lb;
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temp2 ^= (svga->colourcompare & 2) ? 0xff : 0;
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temp2 &= (svga->colournocare & 2) ? 0xff : 0;
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temp3 = svga->lc;
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temp3 ^= (svga->colourcompare & 4) ? 0xff : 0;
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temp3 &= (svga->colournocare & 4) ? 0xff : 0;
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temp4 = svga->ld;
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temp4 ^= (svga->colourcompare & 8) ? 0xff : 0;
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temp4 &= (svga->colournocare & 8) ? 0xff : 0;
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return ~(temp | temp2 | temp3 | temp4);
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}
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//printf("Read %02X %04X %04X\n",vram[addr|svga->readplane],addr,svga->readplane);
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return svga->vram[addr | readplane];
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}
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static void gd5429_writeb_linear(uint32_t addr, uint8_t val, void *p)
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{
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svga_t *svga = (svga_t *)p;
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gd5429_t *gd5429 = (gd5429_t *)svga->p;
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// pclog("gd5429_writeb : %08X %02X\n", addr, val);
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if (svga->writemode < 4)
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if ((svga->writemode < 4) && !(svga->gdcreg[0xb] & (GRB_X8_ADDRESSING | GRB_8B_LATCHES)))
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svga_write_linear(addr, val, svga);
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else
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gd5429_write_linear(addr, val & 0xff, gd5429);
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@ -1071,8 +1187,7 @@ static void gd5429_writew_linear(uint32_t addr, uint16_t val, void *p)
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svga_t *svga = (svga_t *)p;
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gd5429_t *gd5429 = (gd5429_t *)svga->p;
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// pclog("gd5429_writew : %08X %04X\n", addr, val);
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if (svga->writemode < 4)
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if ((svga->writemode < 4) && !(svga->gdcreg[0xb] & (GRB_X8_ADDRESSING | GRB_8B_LATCHES)))
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svga_writew_linear(addr, val, svga);
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else
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{
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@ -1085,8 +1200,7 @@ static void gd5429_writel_linear(uint32_t addr, uint32_t val, void *p)
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svga_t *svga = (svga_t *)p;
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gd5429_t *gd5429 = (gd5429_t *)svga->p;
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// pclog("gd5429_writel : %08X %08X %i\n", addr, val, svga->writemode);
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if (svga->writemode < 4)
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if ((svga->writemode < 4) && !(svga->gdcreg[0xb] & (GRB_X8_ADDRESSING | GRB_8B_LATCHES)))
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svga_writel_linear(addr, val, svga);
|
||||
else
|
||||
{
|
||||
|
|
@ -1096,7 +1210,36 @@ static void gd5429_writel_linear(uint32_t addr, uint32_t val, void *p)
|
|||
gd5429_write_linear(addr+3, val >> 24, gd5429);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
static uint8_t gd5429_readb_linear(uint32_t addr, void *p)
|
||||
{
|
||||
gd5429_t *gd5429 = (gd5429_t *)p;
|
||||
svga_t *svga = &gd5429->svga;
|
||||
|
||||
if (!(svga->gdcreg[0xb] & (GRB_X8_ADDRESSING | GRB_8B_LATCHES)))
|
||||
return svga_read_linear(addr, &gd5429->svga);
|
||||
return gd5429_read_linear(addr, gd5429);
|
||||
}
|
||||
static uint16_t gd5429_readw_linear(uint32_t addr, void *p)
|
||||
{
|
||||
gd5429_t *gd5429 = (gd5429_t *)p;
|
||||
svga_t *svga = &gd5429->svga;
|
||||
|
||||
if (!(svga->gdcreg[0xb] & (GRB_X8_ADDRESSING | GRB_8B_LATCHES)))
|
||||
return svga_readw_linear(addr, &gd5429->svga);
|
||||
return gd5429_read_linear(addr, gd5429) | (gd5429_read_linear(addr+1, gd5429) << 8);
|
||||
}
|
||||
static uint32_t gd5429_readl_linear(uint32_t addr, void *p)
|
||||
{
|
||||
gd5429_t *gd5429 = (gd5429_t *)p;
|
||||
svga_t *svga = &gd5429->svga;
|
||||
|
||||
if (!(svga->gdcreg[0xb] & (GRB_X8_ADDRESSING | GRB_8B_LATCHES)))
|
||||
return svga_readl_linear(addr, &gd5429->svga);
|
||||
return gd5429_read_linear(addr, gd5429) | (gd5429_read_linear(addr+1, gd5429) << 8) |
|
||||
(gd5429_read_linear(addr+2, gd5429) << 16) | (gd5429_read_linear(addr+3, gd5429) << 24);
|
||||
}
|
||||
|
||||
|
||||
void gd5429_start_blit(uint32_t cpu_dat, int count, void *p)
|
||||
{
|
||||
|
|
@ -1685,13 +1828,16 @@ static void *cl_init(int type, char *fn, int pci_card)
|
|||
memset(gd5429, 0, sizeof(gd5429_t));
|
||||
|
||||
vram_size = device_get_config_int("memory");
|
||||
gd5429->vram_mask = (vram_size << 20) - 1;
|
||||
if (vram_size >= 256)
|
||||
gd5429->vram_mask = (vram_size << 10) - 1;
|
||||
else
|
||||
gd5429->vram_mask = (vram_size << 20) - 1;
|
||||
|
||||
gd5429->type = type;
|
||||
|
||||
rom_init(&gd5429->bios_rom, fn, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
|
||||
|
||||
svga_init(&gd5429->svga, gd5429, vram_size << 20,
|
||||
svga_init(&gd5429->svga, gd5429, (vram_size >= 256) ? (vram_size << 10) : (vram_size << 20),
|
||||
gd5429_recalctimings,
|
||||
gd5429_in, gd5429_out,
|
||||
gd5429_hwcursor_draw,
|
||||
|
|
@ -1701,9 +1847,15 @@ static void *cl_init(int type, char *fn, int pci_card)
|
|||
mem_mapping_set_p(&gd5429->svga.mapping, gd5429);
|
||||
|
||||
mem_mapping_add(&gd5429->mmio_mapping, 0, 0, gd5429_mmio_read, gd5429_mmio_readw, gd5429_mmio_readl, gd5429_mmio_write, gd5429_mmio_writew, gd5429_mmio_writel, NULL, 0, gd5429);
|
||||
mem_mapping_add(&gd5429->linear_mapping, 0, 0, svga_read_linear, svga_readw_linear, svga_readl_linear, gd5429_writeb_linear, gd5429_writew_linear, gd5429_writel_linear, NULL, 0, svga);
|
||||
mem_mapping_add(&gd5429->linear_mapping, 0, 0, gd5429_readb_linear, gd5429_readw_linear, gd5429_readl_linear, gd5429_writeb_linear, gd5429_writew_linear, gd5429_writel_linear, NULL, 0, svga);
|
||||
|
||||
io_sethandler(0x03c0, 0x0020, gd5429_in, NULL, NULL, gd5429_out, NULL, NULL, gd5429);
|
||||
if (type == CL_TYPE_AVGA2)
|
||||
{
|
||||
io_sethandler(0x0102, 0x0001, gd5429_in, NULL, NULL, gd5429_out, NULL, NULL, gd5429);
|
||||
io_sethandler(0x46e8, 0x0002, gd5429_in, NULL, NULL, gd5429_out, NULL, NULL, gd5429);
|
||||
svga->decode_mask = svga->vram_mask;
|
||||
}
|
||||
|
||||
svga->hwcursor.yoff = 32;
|
||||
svga->hwcursor.xoff = 0;
|
||||
|
|
@ -1741,6 +1893,10 @@ static void *cl_init(int type, char *fn, int pci_card)
|
|||
}
|
||||
|
||||
|
||||
static void *avga2_cbm_sl386sx_init()
|
||||
{
|
||||
return cl_init(CL_TYPE_AVGA2, "cbm_sl386sx25/c000.rom", -1);
|
||||
}
|
||||
static void *gd5429_init()
|
||||
{
|
||||
return cl_init(CL_TYPE_GD5429, "5429.vbi", -1);
|
||||
|
|
@ -1805,6 +1961,33 @@ void gd5429_add_status_info(char *s, int max_len, void *p)
|
|||
svga_add_status_info(s, max_len, &gd5429->svga);
|
||||
}
|
||||
|
||||
static device_config_t avga2_config[] =
|
||||
{
|
||||
{
|
||||
.name = "memory",
|
||||
.description = "Memory size",
|
||||
.type = CONFIG_SELECTION,
|
||||
.selection =
|
||||
{
|
||||
{
|
||||
.description = "256 kB",
|
||||
.value = 256
|
||||
},
|
||||
{
|
||||
.description = "512 kB",
|
||||
.value = 512
|
||||
},
|
||||
{
|
||||
.description = ""
|
||||
}
|
||||
},
|
||||
.default_int = 512
|
||||
},
|
||||
{
|
||||
.type = -1
|
||||
}
|
||||
};
|
||||
|
||||
static device_config_t gd5429_config[] =
|
||||
{
|
||||
{
|
||||
|
|
@ -1858,6 +2041,19 @@ static device_config_t gd5434_config[] =
|
|||
}
|
||||
};
|
||||
|
||||
device_t avga2_cbm_sl386sx_device =
|
||||
{
|
||||
"AVGA2 (Commodore SL386SX-25)",
|
||||
0,
|
||||
avga2_cbm_sl386sx_init,
|
||||
gd5429_close,
|
||||
gd5430_available,
|
||||
gd5429_speed_changed,
|
||||
gd5429_force_redraw,
|
||||
gd5429_add_status_info,
|
||||
avga2_config
|
||||
};
|
||||
|
||||
device_t gd5429_device =
|
||||
{
|
||||
"Cirrus Logic GD5429",
|
||||
|
|
|
|||
Loading…
Reference in a new issue