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Re-organisation of video emulation.

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This commit is contained in:
TomW 2013-06-24 20:42:35 +01:00
commit 58085bcc87
86 changed files with 8087 additions and 7229 deletions
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126
src/vid_sdac_ramdac.c
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@ -5,17 +5,7 @@
#include "vid_svga.h"
#include "vid_sdac_ramdac.h"
struct
{
int magic_count;
uint8_t command;
int windex, rindex;
uint16_t regs[256];
int reg_ff;
int rs2;
} sdac_ramdac;
void sdac_ramdac_out(uint16_t addr, uint8_t val, void *priv)
void sdac_ramdac_out(uint16_t addr, uint8_t val, sdac_ramdac_t *ramdac, svga_t *svga)
{
// /*if (CS!=0xC000) */pclog("OUT RAMDAC %04X %02X %i %04X:%04X %i\n",addr,val,sdac_ramdac.magic_count,CS,pc, sdac_ramdac.rs2);
switch (addr)
@ -23,125 +13,125 @@ void sdac_ramdac_out(uint16_t addr, uint8_t val, void *priv)
case 0x3C6:
if (val == 0xff)
{
sdac_ramdac.rs2 = 0;
sdac_ramdac.magic_count = 0;
ramdac->rs2 = 0;
ramdac->magic_count = 0;
break;
}
if (sdac_ramdac.magic_count < 4) break;
if (sdac_ramdac.magic_count == 4)
if (ramdac->magic_count < 4) break;
if (ramdac->magic_count == 4)
{
sdac_ramdac.command = val;
ramdac->command = val;
// pclog("RAMDAC command reg now %02X\n", val);
switch (val >> 4)
{
case 2: case 3: case 0xa: bpp = 15; break;
case 4: case 0xe: bpp = 24; break;
case 5: case 6: case 0xc: bpp = 16; break;
case 7: bpp = 32; break;
case 0x2: case 0x3: case 0xa: svga->bpp = 15; break;
case 0x4: case 0xe: svga->bpp = 24; break;
case 0x5: case 0x6: case 0xc: svga->bpp = 16; break;
case 0x7: svga->bpp = 32; break;
case 0: case 1: default: bpp = 8; break;
case 0: case 1: default: svga->bpp = 8; break;
}
}
//sdac_ramdac.magic_count = 0;
//ramdac->magic_count = 0;
break;
case 0x3C7:
sdac_ramdac.magic_count = 0;
if (sdac_ramdac.rs2)
sdac_ramdac.rindex = val;
ramdac->magic_count = 0;
if (ramdac->rs2)
ramdac->rindex = val;
break;
case 0x3C8:
sdac_ramdac.magic_count = 0;
if (sdac_ramdac.rs2)
sdac_ramdac.windex = val;
ramdac->magic_count = 0;
if (ramdac->rs2)
ramdac->windex = val;
break;
case 0x3C9:
sdac_ramdac.magic_count = 0;
if (sdac_ramdac.rs2)
ramdac->magic_count = 0;
if (ramdac->rs2)
{
if (!sdac_ramdac.reg_ff) sdac_ramdac.regs[sdac_ramdac.windex] = (sdac_ramdac.regs[sdac_ramdac.windex] & 0xff00) | val;
else sdac_ramdac.regs[sdac_ramdac.windex] = (sdac_ramdac.regs[sdac_ramdac.windex] & 0x00ff) | (val << 8);
sdac_ramdac.reg_ff = !sdac_ramdac.reg_ff;
// pclog("RAMDAC reg %02X now %04X\n", sdac_ramdac.windex, sdac_ramdac.regs[sdac_ramdac.windex]);
if (!sdac_ramdac.reg_ff) sdac_ramdac.windex++;
if (!ramdac->reg_ff) ramdac->regs[ramdac->windex] = (ramdac->regs[ramdac->windex] & 0xff00) | val;
else ramdac->regs[ramdac->windex] = (ramdac->regs[ramdac->windex] & 0x00ff) | (val << 8);
ramdac->reg_ff = !ramdac->reg_ff;
// pclog("RAMDAC reg %02X now %04X\n", ramdac->windex, ramdac->regs[ramdac->windex]);
if (!ramdac->reg_ff) ramdac->windex++;
}
break;
}
svga_out(addr, val, NULL);
svga_out(addr, val, svga);
}
uint8_t sdac_ramdac_in(uint16_t addr, void *priv)
uint8_t sdac_ramdac_in(uint16_t addr, sdac_ramdac_t *ramdac, svga_t *svga)
{
uint8_t temp;
// /*if (CS!=0xC000) */pclog("IN RAMDAC %04X %04X:%04X %i\n",addr,CS,pc, sdac_ramdac.rs2);
// /*if (CS!=0xC000) */pclog("IN RAMDAC %04X %04X:%04X %i\n",addr,CS,pc, ramdac->rs2);
switch (addr)
{
case 0x3C6:
sdac_ramdac.reg_ff = 0;
if (sdac_ramdac.magic_count < 5)
sdac_ramdac.magic_count++;
if (sdac_ramdac.magic_count == 4)
ramdac->reg_ff = 0;
if (ramdac->magic_count < 5)
ramdac->magic_count++;
if (ramdac->magic_count == 4)
{
temp = 0x70; /*SDAC ID*/
sdac_ramdac.rs2 = 1;
ramdac->rs2 = 1;
}
if (sdac_ramdac.magic_count == 5)
if (ramdac->magic_count == 5)
{
temp = sdac_ramdac.command;
sdac_ramdac.magic_count = 0;
temp = ramdac->command;
ramdac->magic_count = 0;
}
return temp;
case 0x3C7:
// if (sdac_ramdac.magic_count < 4)
// if (ramdac->magic_count < 4)
// {
sdac_ramdac.magic_count=0;
ramdac->magic_count=0;
// break;
// }
if (sdac_ramdac.rs2) return sdac_ramdac.rindex;
if (ramdac->rs2) return ramdac->rindex;
break;
case 0x3C8:
// if (sdac_ramdac.magic_count < 4)
// if (ramdac->magic_count < 4)
// {
sdac_ramdac.magic_count=0;
ramdac->magic_count=0;
// break;
// }
if (sdac_ramdac.rs2) return sdac_ramdac.windex;
if (ramdac->rs2) return ramdac->windex;
break;
case 0x3C9:
// if (sdac_ramdac.magic_count < 4)
// if (ramdac->magic_count < 4)
// {
sdac_ramdac.magic_count=0;
ramdac->magic_count=0;
// break;
// }
if (sdac_ramdac.rs2)
if (ramdac->rs2)
{
if (!sdac_ramdac.reg_ff) temp = sdac_ramdac.regs[sdac_ramdac.rindex] & 0xff;
else temp = sdac_ramdac.regs[sdac_ramdac.rindex] >> 8;
sdac_ramdac.reg_ff = !sdac_ramdac.reg_ff;
if (!sdac_ramdac.reg_ff)
if (!ramdac->reg_ff) temp = ramdac->regs[ramdac->rindex] & 0xff;
else temp = ramdac->regs[ramdac->rindex] >> 8;
ramdac->reg_ff = !ramdac->reg_ff;
if (!ramdac->reg_ff)
{
sdac_ramdac.rindex++;
sdac_ramdac.magic_count = 0;
ramdac->rindex++;
ramdac->magic_count = 0;
}
return temp;
}
break;
}
return svga_in(addr, NULL);
return svga_in(addr, svga);
}
float sdac_getclock(int clock)
float sdac_getclock(int clock, sdac_ramdac_t *ramdac)
{
float t;
int m, n1, n2;
// pclog("SDAC_Getclock %i %04X\n", clock, sdac_ramdac.regs[clock]);
// pclog("SDAC_Getclock %i %04X\n", clock, ramdac->regs[clock]);
if (clock == 0) return 25175000.0;
if (clock == 1) return 28322000.0;
clock ^= 1; /*Clocks 2 and 3 seem to be reversed*/
m = (sdac_ramdac.regs[clock] & 0x7f) + 2;
n1 = ((sdac_ramdac.regs[clock] >> 8) & 0x1f) + 2;
n2 = ((sdac_ramdac.regs[clock] >> 13) & 0x07);
m = (ramdac->regs[clock] & 0x7f) + 2;
n1 = ((ramdac->regs[clock] >> 8) & 0x1f) + 2;
n2 = ((ramdac->regs[clock] >> 13) & 0x07);
t = (14318184.0 * ((float)m / (float)n1)) / (float)(1 << n2);
// pclog("SDAC clock %i %i %i %f %04X %f %i\n", m, n1, n2, t, sdac_ramdac.regs[2], 14318184.0 * ((float)m / (float)n1), 1 << n2);
// pclog("SDAC clock %i %i %i %f %04X %f %i\n", m, n1, n2, t, ramdac->regs[2], 14318184.0 * ((float)m / (float)n1), 1 << n2);
return t;
}