Re-organisation of video emulation.
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TomW
parent
b9062a1d0c
commit
58085bcc87
86 changed files with 8087 additions and 7229 deletions
167
src/vid_et4000.c
167
src/vid_et4000.c
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@ -1,141 +1,156 @@
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/*ET4000 emulation*/
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#include <stdlib.h>
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#include "ibm.h"
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#include "device.h"
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#include "io.h"
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#include "video.h"
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#include "vid_svga.h"
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#include "vid_unk_ramdac.h"
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int et4k_b8000;
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#include "vid_et4000.h"
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void et4000_out(uint16_t addr, uint8_t val, void *priv)
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typedef struct et4000_t
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{
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svga_t svga;
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unk_ramdac_t ramdac;
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uint8_t banking;
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} et4000_t;
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void et4000_out(uint16_t addr, uint8_t val, void *p)
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{
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et4000_t *et4000 = (et4000_t *)p;
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svga_t *svga = &et4000->svga;
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uint8_t old;
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if (((addr&0xFFF0) == 0x3D0 || (addr&0xFFF0) == 0x3B0) && !(svga_miscout&1)) addr ^= 0x60;
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if (((addr&0xFFF0) == 0x3D0 || (addr&0xFFF0) == 0x3B0) && !(svga->miscout & 1))
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addr ^= 0x60;
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pclog("ET4000 out %04X %02X\n", addr, val);
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switch (addr)
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{
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case 0x3C6: case 0x3C7: case 0x3C8: case 0x3C9:
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unk_ramdac_out(addr, val, NULL);
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unk_ramdac_out(addr, val, &et4000->ramdac, svga);
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return;
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case 0x3CD: /*Banking*/
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svgawbank=(val&0xF)*65536;
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svgarbank=((val>>4)&0xF)*65536;
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svgaseg=val;
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pclog("Banking write %08X %08X %02X\n", svgawbank, svgarbank, val);
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svga->write_bank = (val & 0xf) * 0x10000;
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svga->read_bank = ((val >> 4) & 0xf) * 0x10000;
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et4000->banking = val;
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pclog("Banking write %08X %08X %02X\n", svga->write_bank, svga->read_bank, val);
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return;
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case 0x3CF:
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switch (gdcaddr&15)
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{
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case 6:
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et4k_b8000=((crtc[0x36]&0x38)==0x28) && ((gdcreg[6]&0xC)==4);
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break;
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}
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break;
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case 0x3D4:
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crtcreg = val & 0x3f;
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svga->crtcreg = val & 0x3f;
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return;
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case 0x3D5:
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if (crtcreg <= 7 && crtc[0x11] & 0x80) return;
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old=crtc[crtcreg];
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crtc[crtcreg]=val;
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et4k_b8000=((crtc[0x36]&0x38)==0x28) && ((gdcreg[6]&0xC)==4);
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if (old!=val)
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if (svga->crtcreg <= 7 && svga->crtc[0x11] & 0x80) return;
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old = svga->crtc[svga->crtcreg];
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svga->crtc[svga->crtcreg] = val;
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if (old != val)
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{
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if (crtcreg<0xE || crtcreg>0x10)
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if (svga->crtcreg < 0xE || svga->crtcreg > 0x10)
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{
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fullchange=changeframecount;
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svga_recalctimings();
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fullchange = changeframecount;
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svga_recalctimings(svga);
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}
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}
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break;
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case 0x3D8:
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if (val==0xA0) svgaon=1;
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if (val==0x29) svgaon=0;
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break;
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}
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svga_out(addr, val, priv);
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svga_out(addr, val, svga);
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}
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uint8_t et4000_in(uint16_t addr, void *priv)
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uint8_t et4000_in(uint16_t addr, void *p)
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{
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if (((addr&0xFFF0) == 0x3D0 || (addr&0xFFF0) == 0x3B0) && !(svga_miscout&1)) addr ^= 0x60;
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et4000_t *et4000 = (et4000_t *)p;
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svga_t *svga = &et4000->svga;
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if (((addr&0xFFF0) == 0x3D0 || (addr&0xFFF0) == 0x3B0) && !(svga->miscout & 1))
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addr ^= 0x60;
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if (addr != 0x3da) pclog("IN ET4000 %04X\n", addr);
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switch (addr)
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{
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case 0x3C5:
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if ((seqaddr&0xF)==7) return seqregs[seqaddr&0xF]|4;
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if ((svga->seqaddr & 0xf) == 7) return svga->seqregs[svga->seqaddr & 0xf] | 4;
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break;
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case 0x3C6: case 0x3C7: case 0x3C8: case 0x3C9:
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return unk_ramdac_in(addr, NULL);
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return unk_ramdac_in(addr, &et4000->ramdac, svga);
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case 0x3CD: /*Banking*/
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return svgaseg;
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return et4000->banking;
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case 0x3D4:
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return crtcreg;
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return svga->crtcreg;
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case 0x3D5:
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return crtc[crtcreg];
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return svga->crtc[svga->crtcreg];
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}
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return svga_in(addr, priv);
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return svga_in(addr, svga);
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}
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void et4000_recalctimings()
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void et4000_recalctimings(svga_t *svga)
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{
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svga_ma|=(crtc[0x33]&3)<<16;
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if (crtc[0x35]&2) svga_vtotal+=0x400;
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if (crtc[0x35]&4) svga_dispend+=0x400;
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if (crtc[0x35]&8) svga_vsyncstart+=0x400;
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if (crtc[0x35]&0x10) svga_split+=0x400;
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if (!svga_rowoffset) svga_rowoffset=0x100;
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// if (crtc[0x3F]&0x80) svga_rowoffset+=0x100;
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if (crtc[0x3F]&1) svga_htotal+=256;
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if (attrregs[0x16]&0x20) svga_hdisp<<=1;
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et4000_t *et4000 = (et4000_t *)svga->p;
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svga->ma_latch |= (svga->crtc[0x33]&3)<<16;
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if (svga->crtc[0x35] & 2) svga->vtotal += 0x400;
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if (svga->crtc[0x35] & 4) svga->dispend += 0x400;
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if (svga->crtc[0x35] & 8) svga->vsyncstart += 0x400;
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if (svga->crtc[0x35] & 0x10) svga->split += 0x400;
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if (!svga->rowoffset) svga->rowoffset = 0x100;
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if (svga->crtc[0x3f] & 1) svga->htotal += 256;
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if (svga->attrregs[0x16] & 0x20) svga->hdisp <<= 1;
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// pclog("Rowoffset %i\n",svga_rowoffset);
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switch (((svga_miscout >> 2) & 3) | ((crtc[0x34] << 1) & 4))
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switch (((svga->miscout >> 2) & 3) | ((svga->crtc[0x34] << 1) & 4))
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{
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case 0: case 1: break;
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case 3: svga_clock = cpuclock/40000000.0; break;
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case 5: svga_clock = cpuclock/65000000.0; break;
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default: svga_clock = cpuclock/36000000.0; break;
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case 3: svga->clock = cpuclock / 40000000.0; break;
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case 5: svga->clock = cpuclock / 65000000.0; break;
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default: svga->clock = cpuclock / 36000000.0; break;
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}
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}
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int et4000_init()
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void *et4000_init()
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{
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svga_recalctimings_ex = et4000_recalctimings;
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svga_vram_limit = 1 << 20; /*1mb*/
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vrammask = 0xfffff;
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return svga_init();
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et4000_t *et4000 = malloc(sizeof(et4000_t));
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memset(et4000, 0, sizeof(et4000_t));
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io_sethandler(0x03c0, 0x0020, et4000_in, NULL, NULL, et4000_out, NULL, NULL, et4000);
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svga_init(&et4000->svga, et4000, 1 << 20, /*1mb*/
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et4000_recalctimings,
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et4000_in, et4000_out,
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NULL);
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return et4000;
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}
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GFXCARD vid_et4000 =
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void et4000_close(void *p)
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{
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et4000_t *et4000 = (et4000_t *)p;
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svga_close(&et4000->svga);
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free(et4000);
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}
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void et4000_speed_changed(void *p)
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{
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et4000_t *et4000 = (et4000_t *)p;
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svga_recalctimings(&et4000->svga);
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}
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device_t et4000_device =
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{
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"Tseng Labs ET4000AX",
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et4000_init,
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/*IO at 3Cx/3Dx*/
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et4000_out,
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et4000_in,
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/*IO at 3Ax/3Bx*/
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video_out_null,
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video_in_null,
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svga_poll,
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svga_recalctimings,
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svga_write,
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video_write_null,
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video_write_null,
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svga_read,
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video_read_null,
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video_read_null
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et4000_close,
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et4000_speed_changed,
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svga_add_status_info
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};
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