Pack decoded ModR/M data into a single word - minor recompiler speedup.
This commit is contained in:
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31298d6be1
commit
535604b760
34 changed files with 1263 additions and 1270 deletions
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@ -307,16 +307,16 @@ static int opMOV_a32_EAX(uint32_t fetchdat)
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static int opLEA_w_a16(uint32_t fetchdat)
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{
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fetch_ea_16(fetchdat);
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ILLEGAL_ON(mod == 3);
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cpu_state.regs[reg].w = eaaddr;
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ILLEGAL_ON(cpu_mod == 3);
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cpu_state.regs[cpu_reg].w = eaaddr;
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CLOCK_CYCLES(timing_rr);
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return 0;
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}
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static int opLEA_w_a32(uint32_t fetchdat)
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{
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fetch_ea_32(fetchdat);
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ILLEGAL_ON(mod == 3);
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cpu_state.regs[reg].w = eaaddr;
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ILLEGAL_ON(cpu_mod == 3);
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cpu_state.regs[cpu_reg].w = eaaddr;
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CLOCK_CYCLES(timing_rr);
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return 0;
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}
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@ -324,16 +324,16 @@ static int opLEA_w_a32(uint32_t fetchdat)
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static int opLEA_l_a16(uint32_t fetchdat)
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{
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fetch_ea_16(fetchdat);
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ILLEGAL_ON(mod == 3);
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cpu_state.regs[reg].l = eaaddr & 0xffff;
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ILLEGAL_ON(cpu_mod == 3);
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cpu_state.regs[cpu_reg].l = eaaddr & 0xffff;
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CLOCK_CYCLES(timing_rr);
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return 0;
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}
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static int opLEA_l_a32(uint32_t fetchdat)
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{
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fetch_ea_32(fetchdat);
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ILLEGAL_ON(mod == 3);
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cpu_state.regs[reg].l = eaaddr;
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ILLEGAL_ON(cpu_mod == 3);
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cpu_state.regs[cpu_reg].l = eaaddr;
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CLOCK_CYCLES(timing_rr);
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return 0;
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}
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@ -360,15 +360,15 @@ static int opXLAT_a32(uint32_t fetchdat)
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static int opMOV_b_r_a16(uint32_t fetchdat)
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{
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fetch_ea_16(fetchdat);
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if (mod == 3)
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if (cpu_mod == 3)
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{
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setr8(rm, getr8(reg));
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setr8(cpu_rm, getr8(cpu_reg));
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CLOCK_CYCLES(timing_rr);
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}
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else
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{
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CHECK_WRITE(ea_seg, eaaddr, eaaddr);
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seteab(getr8(reg));
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seteab(getr8(cpu_reg));
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CLOCK_CYCLES(is486 ? 1 : 2);
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}
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return abrt;
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@ -376,15 +376,15 @@ static int opMOV_b_r_a16(uint32_t fetchdat)
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static int opMOV_b_r_a32(uint32_t fetchdat)
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{
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fetch_ea_32(fetchdat);
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if (mod == 3)
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if (cpu_mod == 3)
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{
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setr8(rm, getr8(reg));
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setr8(cpu_rm, getr8(cpu_reg));
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CLOCK_CYCLES(timing_rr);
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}
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else
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{
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CHECK_WRITE(ea_seg, eaaddr, eaaddr);
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seteab(getr8(reg));
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seteab(getr8(cpu_reg));
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CLOCK_CYCLES(is486 ? 1 : 2);
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}
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return abrt;
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@ -392,15 +392,15 @@ static int opMOV_b_r_a32(uint32_t fetchdat)
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static int opMOV_w_r_a16(uint32_t fetchdat)
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{
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fetch_ea_16(fetchdat);
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if (mod == 3)
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if (cpu_mod == 3)
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{
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cpu_state.regs[rm].w = cpu_state.regs[reg].w;
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cpu_state.regs[cpu_rm].w = cpu_state.regs[cpu_reg].w;
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CLOCK_CYCLES(timing_rr);
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}
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else
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{
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CHECK_WRITE(ea_seg, eaaddr, eaaddr+1);
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seteaw(cpu_state.regs[reg].w);
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seteaw(cpu_state.regs[cpu_reg].w);
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CLOCK_CYCLES(is486 ? 1 : 2);
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}
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return abrt;
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@ -408,15 +408,15 @@ static int opMOV_w_r_a16(uint32_t fetchdat)
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static int opMOV_w_r_a32(uint32_t fetchdat)
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{
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fetch_ea_32(fetchdat);
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if (mod == 3)
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if (cpu_mod == 3)
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{
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cpu_state.regs[rm].w = cpu_state.regs[reg].w;
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cpu_state.regs[cpu_rm].w = cpu_state.regs[cpu_reg].w;
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CLOCK_CYCLES(timing_rr);
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}
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else
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{
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CHECK_WRITE(ea_seg, eaaddr, eaaddr+1);
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seteaw(cpu_state.regs[reg].w);
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seteaw(cpu_state.regs[cpu_reg].w);
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CLOCK_CYCLES(is486 ? 1 : 2);
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}
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return abrt;
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@ -424,15 +424,15 @@ static int opMOV_w_r_a32(uint32_t fetchdat)
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static int opMOV_l_r_a16(uint32_t fetchdat)
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{
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fetch_ea_16(fetchdat);
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if (mod == 3)
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if (cpu_mod == 3)
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{
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cpu_state.regs[rm].l = cpu_state.regs[reg].l;
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cpu_state.regs[cpu_rm].l = cpu_state.regs[cpu_reg].l;
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CLOCK_CYCLES(timing_rr);
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}
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else
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{
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CHECK_WRITE(ea_seg, eaaddr, eaaddr+3);
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seteal(cpu_state.regs[reg].l);
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seteal(cpu_state.regs[cpu_reg].l);
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CLOCK_CYCLES(is486 ? 1 : 2);
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}
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return abrt;
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@ -440,15 +440,15 @@ static int opMOV_l_r_a16(uint32_t fetchdat)
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static int opMOV_l_r_a32(uint32_t fetchdat)
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{
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fetch_ea_32(fetchdat);
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if (mod == 3)
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if (cpu_mod == 3)
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{
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cpu_state.regs[rm].l = cpu_state.regs[reg].l;
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cpu_state.regs[cpu_rm].l = cpu_state.regs[cpu_reg].l;
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CLOCK_CYCLES(timing_rr);
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}
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else
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{
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CHECK_WRITE(ea_seg, eaaddr, eaaddr+3);
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seteal(cpu_state.regs[reg].l);
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seteal(cpu_state.regs[cpu_reg].l);
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CLOCK_CYCLES(is486 ? 1 : 2);
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}
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return abrt;
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@ -457,9 +457,9 @@ static int opMOV_l_r_a32(uint32_t fetchdat)
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static int opMOV_r_b_a16(uint32_t fetchdat)
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{
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fetch_ea_16(fetchdat);
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if (mod == 3)
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if (cpu_mod == 3)
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{
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setr8(reg, getr8(rm));
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setr8(cpu_reg, getr8(cpu_rm));
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CLOCK_CYCLES(timing_rr);
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}
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else
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@ -467,7 +467,7 @@ static int opMOV_r_b_a16(uint32_t fetchdat)
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uint8_t temp;
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CHECK_READ(ea_seg, eaaddr, eaaddr);
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temp = geteab(); if (abrt) return 1;
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setr8(reg, temp);
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setr8(cpu_reg, temp);
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CLOCK_CYCLES(is486 ? 1 : 4);
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}
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return 0;
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@ -475,9 +475,9 @@ static int opMOV_r_b_a16(uint32_t fetchdat)
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static int opMOV_r_b_a32(uint32_t fetchdat)
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{
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fetch_ea_32(fetchdat);
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if (mod == 3)
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if (cpu_mod == 3)
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{
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setr8(reg, getr8(rm));
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setr8(cpu_reg, getr8(cpu_rm));
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CLOCK_CYCLES(timing_rr);
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}
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else
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@ -485,7 +485,7 @@ static int opMOV_r_b_a32(uint32_t fetchdat)
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uint8_t temp;
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CHECK_READ(ea_seg, eaaddr, eaaddr);
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temp = geteab(); if (abrt) return 1;
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setr8(reg, temp);
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setr8(cpu_reg, temp);
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CLOCK_CYCLES(is486 ? 1 : 4);
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}
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return 0;
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@ -493,9 +493,9 @@ static int opMOV_r_b_a32(uint32_t fetchdat)
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static int opMOV_r_w_a16(uint32_t fetchdat)
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{
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fetch_ea_16(fetchdat);
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if (mod == 3)
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if (cpu_mod == 3)
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{
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cpu_state.regs[reg].w = cpu_state.regs[rm].w;
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cpu_state.regs[cpu_reg].w = cpu_state.regs[cpu_rm].w;
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CLOCK_CYCLES(timing_rr);
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}
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else
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@ -503,7 +503,7 @@ static int opMOV_r_w_a16(uint32_t fetchdat)
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uint16_t temp;
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CHECK_READ(ea_seg, eaaddr, eaaddr+1);
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temp = geteaw(); if (abrt) return 1;
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cpu_state.regs[reg].w = temp;
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cpu_state.regs[cpu_reg].w = temp;
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CLOCK_CYCLES((is486) ? 1 : 4);
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}
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return 0;
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@ -511,9 +511,9 @@ static int opMOV_r_w_a16(uint32_t fetchdat)
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static int opMOV_r_w_a32(uint32_t fetchdat)
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{
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fetch_ea_32(fetchdat);
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if (mod == 3)
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if (cpu_mod == 3)
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{
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cpu_state.regs[reg].w = cpu_state.regs[rm].w;
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cpu_state.regs[cpu_reg].w = cpu_state.regs[cpu_rm].w;
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CLOCK_CYCLES(timing_rr);
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}
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else
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@ -521,7 +521,7 @@ static int opMOV_r_w_a32(uint32_t fetchdat)
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uint16_t temp;
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CHECK_READ(ea_seg, eaaddr, eaaddr+1);
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temp = geteaw(); if (abrt) return 1;
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cpu_state.regs[reg].w = temp;
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cpu_state.regs[cpu_reg].w = temp;
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CLOCK_CYCLES((is486) ? 1 : 4);
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}
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return 0;
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@ -529,9 +529,9 @@ static int opMOV_r_w_a32(uint32_t fetchdat)
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static int opMOV_r_l_a16(uint32_t fetchdat)
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{
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fetch_ea_16(fetchdat);
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if (mod == 3)
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if (cpu_mod == 3)
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{
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cpu_state.regs[reg].l = cpu_state.regs[rm].l;
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cpu_state.regs[cpu_reg].l = cpu_state.regs[cpu_rm].l;
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CLOCK_CYCLES(timing_rr);
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}
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else
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@ -539,7 +539,7 @@ static int opMOV_r_l_a16(uint32_t fetchdat)
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uint32_t temp;
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CHECK_READ(ea_seg, eaaddr, eaaddr+3);
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temp = geteal(); if (abrt) return 1;
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cpu_state.regs[reg].l = temp;
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cpu_state.regs[cpu_reg].l = temp;
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CLOCK_CYCLES(is486 ? 1 : 4);
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}
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return 0;
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@ -547,9 +547,9 @@ static int opMOV_r_l_a16(uint32_t fetchdat)
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static int opMOV_r_l_a32(uint32_t fetchdat)
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{
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fetch_ea_32(fetchdat);
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if (mod == 3)
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if (cpu_mod == 3)
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{
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cpu_state.regs[reg].l = cpu_state.regs[rm].l;
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cpu_state.regs[cpu_reg].l = cpu_state.regs[cpu_rm].l;
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CLOCK_CYCLES(timing_rr);
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}
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else
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@ -557,7 +557,7 @@ static int opMOV_r_l_a32(uint32_t fetchdat)
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uint32_t temp;
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CHECK_READ(ea_seg, eaaddr, eaaddr+3);
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temp = geteal(); if (abrt) return 1;
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cpu_state.regs[reg].l = temp;
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cpu_state.regs[cpu_reg].l = temp;
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CLOCK_CYCLES(is486 ? 1 : 4);
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}
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return 0;
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@ -569,14 +569,14 @@ static int opMOV_r_l_a32(uint32_t fetchdat)
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fetch_ea_16(fetchdat); \
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if (cond_ ## condition) \
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{ \
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if (mod == 3) \
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cpu_state.regs[reg].w = cpu_state.regs[rm].w; \
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if (cpu_mod == 3) \
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cpu_state.regs[cpu_reg].w = cpu_state.regs[cpu_rm].w; \
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else \
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{ \
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uint16_t temp; \
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CHECK_READ(ea_seg, eaaddr, eaaddr+1); \
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temp = geteaw(); if (abrt) return 1; \
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cpu_state.regs[reg].w = temp; \
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cpu_state.regs[cpu_reg].w = temp; \
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} \
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} \
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CLOCK_CYCLES(1); \
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@ -587,14 +587,14 @@ static int opMOV_r_l_a32(uint32_t fetchdat)
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fetch_ea_32(fetchdat); \
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if (cond_ ## condition) \
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{ \
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if (mod == 3) \
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cpu_state.regs[reg].w = cpu_state.regs[rm].w; \
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if (cpu_mod == 3) \
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cpu_state.regs[cpu_reg].w = cpu_state.regs[cpu_rm].w; \
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else \
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{ \
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uint16_t temp; \
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CHECK_READ(ea_seg, eaaddr, eaaddr+1); \
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temp = geteaw(); if (abrt) return 1; \
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cpu_state.regs[reg].w = temp; \
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cpu_state.regs[cpu_reg].w = temp; \
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} \
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} \
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CLOCK_CYCLES(1); \
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@ -605,14 +605,14 @@ static int opMOV_r_l_a32(uint32_t fetchdat)
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fetch_ea_16(fetchdat); \
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if (cond_ ## condition) \
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{ \
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if (mod == 3) \
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cpu_state.regs[reg].l = cpu_state.regs[rm].l; \
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if (cpu_mod == 3) \
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cpu_state.regs[cpu_reg].l = cpu_state.regs[cpu_rm].l; \
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else \
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{ \
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uint32_t temp; \
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CHECK_READ(ea_seg, eaaddr, eaaddr+3); \
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temp = geteal(); if (abrt) return 1; \
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cpu_state.regs[reg].l = temp; \
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cpu_state.regs[cpu_reg].l = temp; \
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} \
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} \
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CLOCK_CYCLES(1); \
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@ -623,14 +623,14 @@ static int opMOV_r_l_a32(uint32_t fetchdat)
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fetch_ea_32(fetchdat); \
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if (cond_ ## condition) \
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{ \
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if (mod == 3) \
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cpu_state.regs[reg].l = cpu_state.regs[rm].l; \
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if (cpu_mod == 3) \
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cpu_state.regs[cpu_reg].l = cpu_state.regs[cpu_rm].l; \
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else \
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{ \
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uint32_t temp; \
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CHECK_READ(ea_seg, eaaddr, eaaddr+3); \
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temp = geteal(); if (abrt) return 1; \
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cpu_state.regs[reg].l = temp; \
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cpu_state.regs[cpu_reg].l = temp; \
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} \
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} \
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CLOCK_CYCLES(1); \
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