Pack decoded ModR/M data into a single word - minor recompiler speedup.

This commit is contained in:
SarahW 2016-08-14 16:29:54 +01:00
commit 535604b760
34 changed files with 1263 additions and 1270 deletions

View file

@ -307,16 +307,16 @@ static int opMOV_a32_EAX(uint32_t fetchdat)
static int opLEA_w_a16(uint32_t fetchdat)
{
fetch_ea_16(fetchdat);
ILLEGAL_ON(mod == 3);
cpu_state.regs[reg].w = eaaddr;
ILLEGAL_ON(cpu_mod == 3);
cpu_state.regs[cpu_reg].w = eaaddr;
CLOCK_CYCLES(timing_rr);
return 0;
}
static int opLEA_w_a32(uint32_t fetchdat)
{
fetch_ea_32(fetchdat);
ILLEGAL_ON(mod == 3);
cpu_state.regs[reg].w = eaaddr;
ILLEGAL_ON(cpu_mod == 3);
cpu_state.regs[cpu_reg].w = eaaddr;
CLOCK_CYCLES(timing_rr);
return 0;
}
@ -324,16 +324,16 @@ static int opLEA_w_a32(uint32_t fetchdat)
static int opLEA_l_a16(uint32_t fetchdat)
{
fetch_ea_16(fetchdat);
ILLEGAL_ON(mod == 3);
cpu_state.regs[reg].l = eaaddr & 0xffff;
ILLEGAL_ON(cpu_mod == 3);
cpu_state.regs[cpu_reg].l = eaaddr & 0xffff;
CLOCK_CYCLES(timing_rr);
return 0;
}
static int opLEA_l_a32(uint32_t fetchdat)
{
fetch_ea_32(fetchdat);
ILLEGAL_ON(mod == 3);
cpu_state.regs[reg].l = eaaddr;
ILLEGAL_ON(cpu_mod == 3);
cpu_state.regs[cpu_reg].l = eaaddr;
CLOCK_CYCLES(timing_rr);
return 0;
}
@ -360,15 +360,15 @@ static int opXLAT_a32(uint32_t fetchdat)
static int opMOV_b_r_a16(uint32_t fetchdat)
{
fetch_ea_16(fetchdat);
if (mod == 3)
if (cpu_mod == 3)
{
setr8(rm, getr8(reg));
setr8(cpu_rm, getr8(cpu_reg));
CLOCK_CYCLES(timing_rr);
}
else
{
CHECK_WRITE(ea_seg, eaaddr, eaaddr);
seteab(getr8(reg));
seteab(getr8(cpu_reg));
CLOCK_CYCLES(is486 ? 1 : 2);
}
return abrt;
@ -376,15 +376,15 @@ static int opMOV_b_r_a16(uint32_t fetchdat)
static int opMOV_b_r_a32(uint32_t fetchdat)
{
fetch_ea_32(fetchdat);
if (mod == 3)
if (cpu_mod == 3)
{
setr8(rm, getr8(reg));
setr8(cpu_rm, getr8(cpu_reg));
CLOCK_CYCLES(timing_rr);
}
else
{
CHECK_WRITE(ea_seg, eaaddr, eaaddr);
seteab(getr8(reg));
seteab(getr8(cpu_reg));
CLOCK_CYCLES(is486 ? 1 : 2);
}
return abrt;
@ -392,15 +392,15 @@ static int opMOV_b_r_a32(uint32_t fetchdat)
static int opMOV_w_r_a16(uint32_t fetchdat)
{
fetch_ea_16(fetchdat);
if (mod == 3)
if (cpu_mod == 3)
{
cpu_state.regs[rm].w = cpu_state.regs[reg].w;
cpu_state.regs[cpu_rm].w = cpu_state.regs[cpu_reg].w;
CLOCK_CYCLES(timing_rr);
}
else
{
CHECK_WRITE(ea_seg, eaaddr, eaaddr+1);
seteaw(cpu_state.regs[reg].w);
seteaw(cpu_state.regs[cpu_reg].w);
CLOCK_CYCLES(is486 ? 1 : 2);
}
return abrt;
@ -408,15 +408,15 @@ static int opMOV_w_r_a16(uint32_t fetchdat)
static int opMOV_w_r_a32(uint32_t fetchdat)
{
fetch_ea_32(fetchdat);
if (mod == 3)
if (cpu_mod == 3)
{
cpu_state.regs[rm].w = cpu_state.regs[reg].w;
cpu_state.regs[cpu_rm].w = cpu_state.regs[cpu_reg].w;
CLOCK_CYCLES(timing_rr);
}
else
{
CHECK_WRITE(ea_seg, eaaddr, eaaddr+1);
seteaw(cpu_state.regs[reg].w);
seteaw(cpu_state.regs[cpu_reg].w);
CLOCK_CYCLES(is486 ? 1 : 2);
}
return abrt;
@ -424,15 +424,15 @@ static int opMOV_w_r_a32(uint32_t fetchdat)
static int opMOV_l_r_a16(uint32_t fetchdat)
{
fetch_ea_16(fetchdat);
if (mod == 3)
if (cpu_mod == 3)
{
cpu_state.regs[rm].l = cpu_state.regs[reg].l;
cpu_state.regs[cpu_rm].l = cpu_state.regs[cpu_reg].l;
CLOCK_CYCLES(timing_rr);
}
else
{
CHECK_WRITE(ea_seg, eaaddr, eaaddr+3);
seteal(cpu_state.regs[reg].l);
seteal(cpu_state.regs[cpu_reg].l);
CLOCK_CYCLES(is486 ? 1 : 2);
}
return abrt;
@ -440,15 +440,15 @@ static int opMOV_l_r_a16(uint32_t fetchdat)
static int opMOV_l_r_a32(uint32_t fetchdat)
{
fetch_ea_32(fetchdat);
if (mod == 3)
if (cpu_mod == 3)
{
cpu_state.regs[rm].l = cpu_state.regs[reg].l;
cpu_state.regs[cpu_rm].l = cpu_state.regs[cpu_reg].l;
CLOCK_CYCLES(timing_rr);
}
else
{
CHECK_WRITE(ea_seg, eaaddr, eaaddr+3);
seteal(cpu_state.regs[reg].l);
seteal(cpu_state.regs[cpu_reg].l);
CLOCK_CYCLES(is486 ? 1 : 2);
}
return abrt;
@ -457,9 +457,9 @@ static int opMOV_l_r_a32(uint32_t fetchdat)
static int opMOV_r_b_a16(uint32_t fetchdat)
{
fetch_ea_16(fetchdat);
if (mod == 3)
if (cpu_mod == 3)
{
setr8(reg, getr8(rm));
setr8(cpu_reg, getr8(cpu_rm));
CLOCK_CYCLES(timing_rr);
}
else
@ -467,7 +467,7 @@ static int opMOV_r_b_a16(uint32_t fetchdat)
uint8_t temp;
CHECK_READ(ea_seg, eaaddr, eaaddr);
temp = geteab(); if (abrt) return 1;
setr8(reg, temp);
setr8(cpu_reg, temp);
CLOCK_CYCLES(is486 ? 1 : 4);
}
return 0;
@ -475,9 +475,9 @@ static int opMOV_r_b_a16(uint32_t fetchdat)
static int opMOV_r_b_a32(uint32_t fetchdat)
{
fetch_ea_32(fetchdat);
if (mod == 3)
if (cpu_mod == 3)
{
setr8(reg, getr8(rm));
setr8(cpu_reg, getr8(cpu_rm));
CLOCK_CYCLES(timing_rr);
}
else
@ -485,7 +485,7 @@ static int opMOV_r_b_a32(uint32_t fetchdat)
uint8_t temp;
CHECK_READ(ea_seg, eaaddr, eaaddr);
temp = geteab(); if (abrt) return 1;
setr8(reg, temp);
setr8(cpu_reg, temp);
CLOCK_CYCLES(is486 ? 1 : 4);
}
return 0;
@ -493,9 +493,9 @@ static int opMOV_r_b_a32(uint32_t fetchdat)
static int opMOV_r_w_a16(uint32_t fetchdat)
{
fetch_ea_16(fetchdat);
if (mod == 3)
if (cpu_mod == 3)
{
cpu_state.regs[reg].w = cpu_state.regs[rm].w;
cpu_state.regs[cpu_reg].w = cpu_state.regs[cpu_rm].w;
CLOCK_CYCLES(timing_rr);
}
else
@ -503,7 +503,7 @@ static int opMOV_r_w_a16(uint32_t fetchdat)
uint16_t temp;
CHECK_READ(ea_seg, eaaddr, eaaddr+1);
temp = geteaw(); if (abrt) return 1;
cpu_state.regs[reg].w = temp;
cpu_state.regs[cpu_reg].w = temp;
CLOCK_CYCLES((is486) ? 1 : 4);
}
return 0;
@ -511,9 +511,9 @@ static int opMOV_r_w_a16(uint32_t fetchdat)
static int opMOV_r_w_a32(uint32_t fetchdat)
{
fetch_ea_32(fetchdat);
if (mod == 3)
if (cpu_mod == 3)
{
cpu_state.regs[reg].w = cpu_state.regs[rm].w;
cpu_state.regs[cpu_reg].w = cpu_state.regs[cpu_rm].w;
CLOCK_CYCLES(timing_rr);
}
else
@ -521,7 +521,7 @@ static int opMOV_r_w_a32(uint32_t fetchdat)
uint16_t temp;
CHECK_READ(ea_seg, eaaddr, eaaddr+1);
temp = geteaw(); if (abrt) return 1;
cpu_state.regs[reg].w = temp;
cpu_state.regs[cpu_reg].w = temp;
CLOCK_CYCLES((is486) ? 1 : 4);
}
return 0;
@ -529,9 +529,9 @@ static int opMOV_r_w_a32(uint32_t fetchdat)
static int opMOV_r_l_a16(uint32_t fetchdat)
{
fetch_ea_16(fetchdat);
if (mod == 3)
if (cpu_mod == 3)
{
cpu_state.regs[reg].l = cpu_state.regs[rm].l;
cpu_state.regs[cpu_reg].l = cpu_state.regs[cpu_rm].l;
CLOCK_CYCLES(timing_rr);
}
else
@ -539,7 +539,7 @@ static int opMOV_r_l_a16(uint32_t fetchdat)
uint32_t temp;
CHECK_READ(ea_seg, eaaddr, eaaddr+3);
temp = geteal(); if (abrt) return 1;
cpu_state.regs[reg].l = temp;
cpu_state.regs[cpu_reg].l = temp;
CLOCK_CYCLES(is486 ? 1 : 4);
}
return 0;
@ -547,9 +547,9 @@ static int opMOV_r_l_a16(uint32_t fetchdat)
static int opMOV_r_l_a32(uint32_t fetchdat)
{
fetch_ea_32(fetchdat);
if (mod == 3)
if (cpu_mod == 3)
{
cpu_state.regs[reg].l = cpu_state.regs[rm].l;
cpu_state.regs[cpu_reg].l = cpu_state.regs[cpu_rm].l;
CLOCK_CYCLES(timing_rr);
}
else
@ -557,7 +557,7 @@ static int opMOV_r_l_a32(uint32_t fetchdat)
uint32_t temp;
CHECK_READ(ea_seg, eaaddr, eaaddr+3);
temp = geteal(); if (abrt) return 1;
cpu_state.regs[reg].l = temp;
cpu_state.regs[cpu_reg].l = temp;
CLOCK_CYCLES(is486 ? 1 : 4);
}
return 0;
@ -569,14 +569,14 @@ static int opMOV_r_l_a32(uint32_t fetchdat)
fetch_ea_16(fetchdat); \
if (cond_ ## condition) \
{ \
if (mod == 3) \
cpu_state.regs[reg].w = cpu_state.regs[rm].w; \
if (cpu_mod == 3) \
cpu_state.regs[cpu_reg].w = cpu_state.regs[cpu_rm].w; \
else \
{ \
uint16_t temp; \
CHECK_READ(ea_seg, eaaddr, eaaddr+1); \
temp = geteaw(); if (abrt) return 1; \
cpu_state.regs[reg].w = temp; \
cpu_state.regs[cpu_reg].w = temp; \
} \
} \
CLOCK_CYCLES(1); \
@ -587,14 +587,14 @@ static int opMOV_r_l_a32(uint32_t fetchdat)
fetch_ea_32(fetchdat); \
if (cond_ ## condition) \
{ \
if (mod == 3) \
cpu_state.regs[reg].w = cpu_state.regs[rm].w; \
if (cpu_mod == 3) \
cpu_state.regs[cpu_reg].w = cpu_state.regs[cpu_rm].w; \
else \
{ \
uint16_t temp; \
CHECK_READ(ea_seg, eaaddr, eaaddr+1); \
temp = geteaw(); if (abrt) return 1; \
cpu_state.regs[reg].w = temp; \
cpu_state.regs[cpu_reg].w = temp; \
} \
} \
CLOCK_CYCLES(1); \
@ -605,14 +605,14 @@ static int opMOV_r_l_a32(uint32_t fetchdat)
fetch_ea_16(fetchdat); \
if (cond_ ## condition) \
{ \
if (mod == 3) \
cpu_state.regs[reg].l = cpu_state.regs[rm].l; \
if (cpu_mod == 3) \
cpu_state.regs[cpu_reg].l = cpu_state.regs[cpu_rm].l; \
else \
{ \
uint32_t temp; \
CHECK_READ(ea_seg, eaaddr, eaaddr+3); \
temp = geteal(); if (abrt) return 1; \
cpu_state.regs[reg].l = temp; \
cpu_state.regs[cpu_reg].l = temp; \
} \
} \
CLOCK_CYCLES(1); \
@ -623,14 +623,14 @@ static int opMOV_r_l_a32(uint32_t fetchdat)
fetch_ea_32(fetchdat); \
if (cond_ ## condition) \
{ \
if (mod == 3) \
cpu_state.regs[reg].l = cpu_state.regs[rm].l; \
if (cpu_mod == 3) \
cpu_state.regs[cpu_reg].l = cpu_state.regs[cpu_rm].l; \
else \
{ \
uint32_t temp; \
CHECK_READ(ea_seg, eaaddr, eaaddr+3); \
temp = geteal(); if (abrt) return 1; \
cpu_state.regs[reg].l = temp; \
cpu_state.regs[cpu_reg].l = temp; \
} \
} \
CLOCK_CYCLES(1); \