From 51c4a1455ea833ac70b2a341c76dee078d9be4f8 Mon Sep 17 00:00:00 2001 From: SarahW Date: Sun, 12 May 2019 17:59:21 +0100 Subject: [PATCH] Fix clock selection on S3 Vision864 w/SDAC (Bahamas 64). --- src/vid_s3.c | 6 +++++- src/vid_sdac_ramdac.c | 6 +++++- 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/src/vid_s3.c b/src/vid_s3.c index a6ac6a1..25bcca2 100644 --- a/src/vid_s3.c +++ b/src/vid_s3.c @@ -1186,6 +1186,10 @@ void s3_recalctimings(svga_t *svga) { s3_t *s3 = (s3_t *)svga->p; svga->hdisp = svga->hdisp_old; + int clk_sel = (svga->miscout >> 2) & 3; + + if (clk_sel == 3 && s3->chip == S3_VISION864) + clk_sel = svga->crtc[0x42] & 0xf; // pclog("%i %i\n", svga->hdisp, svga->hdisp_time); // pclog("recalctimings\n"); @@ -1206,7 +1210,7 @@ void s3_recalctimings(svga_t *svga) else if (svga->crtc[0x43] & 0x04) svga->rowoffset += 0x100; if (!svga->rowoffset) svga->rowoffset = 256; svga->interlace = svga->crtc[0x42] & 0x20; - svga->clock = (cpuclock * (float)(1ull << 32)) / s3->getclock((svga->miscout >> 2) & 3, s3->getclock_p); + svga->clock = (cpuclock * (float)(1ull << 32)) / s3->getclock(clk_sel, s3->getclock_p); switch (svga->crtc[0x67] >> 4) { diff --git a/src/vid_sdac_ramdac.c b/src/vid_sdac_ramdac.c index 0c62f23..2ced27f 100644 --- a/src/vid_sdac_ramdac.c +++ b/src/vid_sdac_ramdac.c @@ -148,10 +148,14 @@ float sdac_getclock(int clock, void *p) sdac_ramdac_t *ramdac = (sdac_ramdac_t *)p; float t; int m, n1, n2; + + if (ramdac->regs[0xe] & (1 << 5)) + clock = ramdac->regs[0xe] & 7; + // pclog("SDAC_Getclock %i %04X\n", clock, ramdac->regs[clock]); + clock &= 7; if (clock == 0) return 25175000.0; if (clock == 1) return 28322000.0; - clock ^= 1; /*Clocks 2 and 3 seem to be reversed*/ m = (ramdac->regs[clock] & 0x7f) + 2; n1 = ((ramdac->regs[clock] >> 8) & 0x1f) + 2; n2 = ((ramdac->regs[clock] >> 13) & 0x07);