Move SFF-8038i IDE bus mastering code out of PIIX files.
Add bus mastering to VT82C586B emulation.
This commit is contained in:
SarahW
parent
99ca11d148
commit
5043cff3f9
8 changed files with 282 additions and 226 deletions
213
src/piix.c
213
src/piix.c
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@ -7,6 +7,7 @@
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#include "ibm.h"
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#include "ide.h"
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#include "ide_sff8038i.h"
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#include "io.h"
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#include "mem.h"
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#include "pci.h"
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@ -14,10 +15,8 @@
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#include "piix.h"
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uint8_t piix_bus_master_read(uint16_t port, void *priv);
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void piix_bus_master_write(uint16_t port, uint8_t val, void *priv);
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static uint8_t card_piix[256], card_piix_ide[256];
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static sff_busmaster_t piix_busmaster[2];
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void piix_write(int func, int addr, uint8_t val, void *priv)
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{
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@ -62,9 +61,9 @@ void piix_write(int func, int addr, uint8_t val, void *priv)
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if (addr == 4 || (addr & ~3) == 0x20) /*Bus master base address*/
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{
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uint16_t base = (card_piix_ide[0x20] & 0xf0) | (card_piix_ide[0x21] << 8);
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io_removehandler(0, 0x10000, piix_bus_master_read, NULL, NULL, piix_bus_master_write, NULL, NULL, NULL);
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io_removehandler(0, 0x10000, sff_bus_master_read, NULL, NULL, sff_bus_master_write, NULL, NULL, piix_busmaster);
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if (card_piix_ide[0x04] & 1)
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io_sethandler(base, 0x10, piix_bus_master_read, NULL, NULL, piix_bus_master_write, NULL, NULL, NULL);
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io_sethandler(base, 0x10, sff_bus_master_read, NULL, NULL, sff_bus_master_write, NULL, NULL, piix_busmaster);
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}
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if (addr == 4 || addr == 0x41 || addr == 0x43)
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{
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@ -140,206 +139,6 @@ uint8_t piix_read(int func, int addr, void *priv)
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return card_piix[addr];
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}
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struct
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{
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uint8_t command;
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uint8_t status;
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uint32_t ptr, ptr_cur;
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int count;
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uint32_t addr;
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int eot;
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} piix_busmaster[2];
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static void piix_bus_master_next_addr(int channel)
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{
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piix_busmaster[channel].addr = (*(uint32_t *)(&ram[piix_busmaster[channel].ptr_cur])) & ~1;
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piix_busmaster[channel].count = (*(uint32_t *)(&ram[piix_busmaster[channel].ptr_cur + 4])) & 0xfffe;
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if (!piix_busmaster[channel].count)
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piix_busmaster[channel].count = 0x10000;
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piix_busmaster[channel].eot = (*(uint32_t *)(&ram[piix_busmaster[channel].ptr_cur + 4])) >> 31;
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piix_busmaster[channel].ptr_cur += 8;
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// pclog("New DMA settings on channel %i - Addr %08X Count %04X EOT %i\n", channel, piix_busmaster[channel].addr, piix_busmaster[channel].count, piix_busmaster[channel].eot);
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}
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void piix_bus_master_write(uint16_t port, uint8_t val, void *priv)
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{
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int channel = (port & 8) ? 1 : 0;
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// pclog("PIIX Bus Master write %04X %02X %04x:%08x\n", port, val, CS, pc);
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switch (port & 7)
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{
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case 0:
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if ((val & 1) && !(piix_busmaster[channel].command & 1)) /*Start*/
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{
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piix_busmaster[channel].ptr_cur = piix_busmaster[channel].ptr;
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piix_bus_master_next_addr(channel);
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piix_busmaster[channel].status |= 1;
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}
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if (!(val & 1) && (piix_busmaster[channel].command & 1)) /*Stop*/
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piix_busmaster[channel].status &= ~1;
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piix_busmaster[channel].command = val;
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break;
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case 2:
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piix_busmaster[channel].status = (val & 0x60) | ((piix_busmaster[channel].status & ~val) & 6) | (piix_busmaster[channel].status & 1);
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break;
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case 4:
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piix_busmaster[channel].ptr = (piix_busmaster[channel].ptr & 0xffffff00) | val;
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break;
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case 5:
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piix_busmaster[channel].ptr = (piix_busmaster[channel].ptr & 0xffff00ff) | (val << 8);
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break;
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case 6:
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piix_busmaster[channel].ptr = (piix_busmaster[channel].ptr & 0xff00ffff) | (val << 16);
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break;
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case 7:
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piix_busmaster[channel].ptr = (piix_busmaster[channel].ptr & 0x00ffffff) | (val << 24);
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break;
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}
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}
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uint8_t piix_bus_master_read(uint16_t port, void *priv)
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{
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int channel = (port & 8) ? 1 : 0;
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// pclog("PIIX Bus Master read %04X %04x:%08x\n", port, CS, pc);
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switch (port & 7)
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{
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case 0:
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return piix_busmaster[channel].command;
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case 2:
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return piix_busmaster[channel].status;
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case 4:
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return piix_busmaster[channel].ptr;
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case 5:
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return piix_busmaster[channel].ptr >> 8;
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case 6:
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return piix_busmaster[channel].ptr >> 16;
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case 7:
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return piix_busmaster[channel].ptr >> 24;
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}
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return 0xff;
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}
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int piix_bus_master_data_read(int channel, uint8_t *data, int size)
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{
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int transferred = 0;
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if (!(piix_busmaster[channel].status & 1))
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return 1; /*DMA disabled*/
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while (transferred < size)
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{
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if (piix_busmaster[channel].count < (size - transferred) && piix_busmaster[channel].eot)
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fatal("DMA on channel %i - Read count less than size! Addr %08X Count %04X EOT %i size %i\n", channel, piix_busmaster[channel].addr, piix_busmaster[channel].count, piix_busmaster[channel].eot, size);
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mem_invalidate_range(piix_busmaster[channel].addr, piix_busmaster[channel].addr+(size-1));
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if (piix_busmaster[channel].count < (size - transferred))
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{
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// pclog("Transferring smaller - %i bytes\n", piix_busmaster[channel].count);
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if (piix_busmaster[channel].addr < (mem_size * 1024))
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{
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int count = piix_busmaster[channel].count;
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if ((piix_busmaster[channel].addr + count) > (mem_size * 1024))
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count = (mem_size * 1024) - piix_busmaster[channel].addr;
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memcpy(&ram[piix_busmaster[channel].addr], data + transferred, count);
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}
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transferred += piix_busmaster[channel].count;
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piix_busmaster[channel].addr += piix_busmaster[channel].count;
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piix_busmaster[channel].count = 0;
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}
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else
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{
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// pclog("Transferring larger - %i bytes\n", size - transferred);
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if (piix_busmaster[channel].addr < (mem_size * 1024))
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{
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int count = size - transferred;
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if ((piix_busmaster[channel].addr + count) > (mem_size * 1024))
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count = (mem_size * 1024) - piix_busmaster[channel].addr;
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memcpy(&ram[piix_busmaster[channel].addr], data + transferred, count);
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}
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piix_busmaster[channel].addr += (size - transferred);
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piix_busmaster[channel].count -= (size - transferred);
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transferred += (size - transferred);
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}
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// pclog("DMA on channel %i - Addr %08X Count %04X EOT %i\n", channel, piix_busmaster[channel].addr, piix_busmaster[channel].count, piix_busmaster[channel].eot);
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if (!piix_busmaster[channel].count)
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{
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// pclog("DMA on channel %i - block over\n", channel);
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if (piix_busmaster[channel].eot) /*End of transfer?*/
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{
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// pclog("DMA on channel %i - transfer over\n", channel);
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piix_busmaster[channel].status &= ~1;
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}
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else
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piix_bus_master_next_addr(channel);
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}
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}
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return 0;
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}
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int piix_bus_master_data_write(int channel, uint8_t *data, int size)
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{
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int transferred = 0;
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if (!(piix_busmaster[channel].status & 1))
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return 1; /*DMA disabled*/
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while (transferred < size)
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{
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if (piix_busmaster[channel].count < (size - transferred) && piix_busmaster[channel].eot)
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fatal("DMA on channel %i - Write count less than size! Addr %08X Count %04X EOT %i size %i\n", channel, piix_busmaster[channel].addr, piix_busmaster[channel].count, piix_busmaster[channel].eot, size);
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if (piix_busmaster[channel].count < (size - transferred))
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{
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// pclog("Transferring smaller - %i bytes\n", piix_busmaster[channel].count);
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if (piix_busmaster[channel].addr < (mem_size * 1024))
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{
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int count = piix_busmaster[channel].count;
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if ((piix_busmaster[channel].addr + count) > (mem_size * 1024))
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count = (mem_size * 1024) - piix_busmaster[channel].addr;
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memcpy(data + transferred, &ram[piix_busmaster[channel].addr], count);
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}
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transferred += piix_busmaster[channel].count;
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piix_busmaster[channel].addr += piix_busmaster[channel].count;
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piix_busmaster[channel].count = 0;
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}
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else
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{
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// pclog("Transferring larger - %i bytes\n", size - transferred);
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if (piix_busmaster[channel].addr < (mem_size * 1024))
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{
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int count = size - transferred;
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if ((piix_busmaster[channel].addr + count) > (mem_size * 1024))
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count = (mem_size * 1024) - piix_busmaster[channel].addr;
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memcpy(data + transferred, &ram[piix_busmaster[channel].addr], count);
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}
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piix_busmaster[channel].addr += (size - transferred);
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piix_busmaster[channel].count -= (size - transferred);
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transferred += (size - transferred);
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}
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// pclog("DMA on channel %i - Addr %08X Count %04X EOT %i\n", channel, piix_busmaster[channel].addr, piix_busmaster[channel].count, piix_busmaster[channel].eot);
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if (!piix_busmaster[channel].count)
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{
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// pclog("DMA on channel %i - block over\n", channel);
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if (piix_busmaster[channel].eot) /*End of transfer?*/
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{
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// pclog("DMA on channel %i - transfer over\n", channel);
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piix_busmaster[channel].status &= ~1;
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}
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else
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piix_bus_master_next_addr(channel);
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}
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}
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return 0;
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}
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void piix_bus_master_set_irq(int channel)
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{
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piix_busmaster[channel].status |= 4;
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}
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void piix_init(int card, int pci_a, int pci_b, int pci_c, int pci_d)
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{
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@ -379,8 +178,8 @@ void piix_init(int card, int pci_a, int pci_b, int pci_c, int pci_d)
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card_piix_ide[0x20] = 0x01; card_piix_ide[0x21] = card_piix_ide[0x22] = card_piix_ide[0x23] = 0x00; /*Bus master interface base address*/
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card_piix_ide[0x40] = card_piix_ide[0x41] = 0x00;
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card_piix_ide[0x42] = card_piix_ide[0x43] = 0x00;
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ide_set_bus_master(piix_bus_master_data_read, piix_bus_master_data_write, piix_bus_master_set_irq);
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sff_bus_master_init(piix_busmaster);
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pci_set_card_routing(pci_a, PCI_INTA);
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pci_set_card_routing(pci_b, PCI_INTB);
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