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Implemented undocumented F6/1 and F7/1 TEST instructions.

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Implemented undocumented F1 LOCK and ICEBP instructions.
Implemented missing 286 LOADALL functionality.
SMSW now sets all 12 bits to 1 on 286.
Patch from Greatpsycho.
This commit is contained in:
SarahW 2017-04-28 18:47:38 +01:00
commit 4cb5ddd7f7
5 changed files with 61 additions and 12 deletions
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35
src/x86_ops_misc.h
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@ -56,6 +56,7 @@ static int opF6_a16(uint32_t fetchdat)
switch (rmdat & 0x38)
{
case 0x00: /*TEST b,#8*/
case 0x08:
src = readmemb(cs, cpu_state.pc); cpu_state.pc++; if (cpu_state.abrt) return 1;
setznp8(src & dst);
if (is486) CLOCK_CYCLES((cpu_mod == 3) ? 1 : 2);
@ -153,6 +154,7 @@ static int opF6_a32(uint32_t fetchdat)
switch (rmdat & 0x38)
{
case 0x00: /*TEST b,#8*/
case 0x08:
src = readmemb(cs, cpu_state.pc); cpu_state.pc++; if (cpu_state.abrt) return 1;
setznp8(src & dst);
if (is486) CLOCK_CYCLES((cpu_mod == 3) ? 1 : 2);
@ -253,6 +255,7 @@ static int opF7_w_a16(uint32_t fetchdat)
switch (rmdat & 0x38)
{
case 0x00: /*TEST w*/
case 0x08:
src = getword(); if (cpu_state.abrt) return 1;
setznp16(src & dst);
if (is486) CLOCK_CYCLES((cpu_mod == 3) ? 1 : 2);
@ -346,6 +349,7 @@ static int opF7_w_a32(uint32_t fetchdat)
switch (rmdat & 0x38)
{
case 0x00: /*TEST w*/
case 0x08:
src = getword(); if (cpu_state.abrt) return 1;
setznp16(src & dst);
if (is486) CLOCK_CYCLES((cpu_mod == 3) ? 1 : 2);
@ -439,6 +443,7 @@ static int opF7_l_a16(uint32_t fetchdat)
switch (rmdat & 0x38)
{
case 0x00: /*TEST l*/
case 0x08:
src = getlong(); if (cpu_state.abrt) return 1;
setznp32(src & dst);
if (is486) CLOCK_CYCLES((cpu_mod == 3) ? 1 : 2);
@ -508,6 +513,7 @@ static int opF7_l_a32(uint32_t fetchdat)
switch (rmdat & 0x38)
{
case 0x00: /*TEST l*/
case 0x08:
src = getlong(); if (cpu_state.abrt) return 1;
setznp32(src & dst);
if (is486) CLOCK_CYCLES((cpu_mod == 3) ? 1 : 2);
@ -721,13 +727,19 @@ static int opWBINVD(uint32_t fetchdat)
return 0;
}
static int opLOADALL(uint32_t fetchdat)
{
if (CPL && (cr0&1))
{
x86gpf(NULL,0);
return 1;
}
msw = readmemw(0, 0x806);
flags = (readmemw(0, 0x818) & 0xffd5) | 2;
flags_extract();
tr.seg = readmemw(0, 0x816);
cpu_state.pc = readmemw(0, 0x81A);
ldt.seg = readmemw(0, 0x81C);
DS = readmemw(0, 0x81E);
SS = readmemw(0, 0x820);
CS = readmemw(0, 0x822);
@ -741,10 +753,29 @@ static int opLOADALL(uint32_t fetchdat)
CX = readmemw(0, 0x832);
AX = readmemw(0, 0x834);
es = readmemw(0, 0x836) | (readmemb(0, 0x838) << 16);
_es.access = readmemb(0, 0x839);
_es.limit = readmemw(0, 0x83A);
cs = readmemw(0, 0x83C) | (readmemb(0, 0x83E) << 16);
_cs.access = readmemb(0, 0x83F);
_cs.limit = readmemw(0, 0x840);
ss = readmemw(0, 0x842) | (readmemb(0, 0x844) << 16);
_ss.access = readmemb(0, 0x845);
_ss.limit = readmemw(0, 0x846);
ds = readmemw(0, 0x848) | (readmemb(0, 0x84A) << 16);
_ds.access = readmemb(0, 0x84B);
_ds.limit = readmemw(0, 0x84C);
gdt.base = readmemw(0, 0x84E) | (readmemb(0, 0x850) << 16);
gdt.limit = readmemw(0, 0x852);
ldt.base = readmemw(0, 0x854) | (readmemb(0, 0x856) << 16);
ldt.access = readmemb(0, 0x857);
ldt.limit = readmemw(0, 0x858);
idt.base = readmemw(0, 0x85A) | (readmemb(0, 0x85C) << 16);
idt.limit = readmemw(0, 0x85E);
tr.base = readmemw(0, 0x860) | (readmemb(0, 0x862) << 16);
tr.access = readmemb(0, 0x863);
tr.limit = readmemw(0, 0x864);
CLOCK_CYCLES(195);
PREFETCH_RUN(195, 1, -1, 51,0,0,0, 0);
return 0;
}