Added initial attempt at instruction timings for 8087/287/387.
Also added 287XL using 387 timings.
This commit is contained in:
parent
0e8926936d
commit
4875f24b53
7 changed files with 153 additions and 124 deletions
|
|
@ -1,4 +1,4 @@
|
|||
#define opFPU(name, optype, a_size, load_var, get, use_var) \
|
||||
#define opFPU(name, optype, a_size, load_var, get, use_var, cycle_postfix) \
|
||||
static int opFADD ## name ## _a ## a_size(uint32_t fetchdat) \
|
||||
{ \
|
||||
optype t; \
|
||||
|
|
@ -12,7 +12,7 @@ static int opFADD ## name ## _a ## a_size(uint32_t fetchdat) \
|
|||
if ((cpu_state.npxc >> 10) & 3) \
|
||||
fesetround(FE_TONEAREST); \
|
||||
cpu_state.tag[cpu_state.TOP&7] = TAG_VALID; \
|
||||
CLOCK_CYCLES(8); \
|
||||
CLOCK_CYCLES(x87_timings.fadd ## cycle_postfix); \
|
||||
return 0; \
|
||||
} \
|
||||
static int opFCOM ## name ## _a ## a_size(uint32_t fetchdat) \
|
||||
|
|
@ -24,7 +24,7 @@ static int opFCOM ## name ## _a ## a_size(uint32_t fetchdat) \
|
|||
load_var = get(); if (cpu_state.abrt) return 1; \
|
||||
cpu_state.npxs &= ~(C0|C2|C3); \
|
||||
cpu_state.npxs |= x87_compare(ST(0), (double)use_var); \
|
||||
CLOCK_CYCLES(4); \
|
||||
CLOCK_CYCLES(x87_timings.fcom ## cycle_postfix); \
|
||||
return 0; \
|
||||
} \
|
||||
static int opFCOMP ## name ## _a ## a_size(uint32_t fetchdat) \
|
||||
|
|
@ -37,7 +37,7 @@ static int opFCOMP ## name ## _a ## a_size(uint32_t fetchdat) \
|
|||
cpu_state.npxs &= ~(C0|C2|C3); \
|
||||
cpu_state.npxs |= x87_compare(ST(0), (double)use_var); \
|
||||
x87_pop(); \
|
||||
CLOCK_CYCLES(4); \
|
||||
CLOCK_CYCLES(x87_timings.fcom ## cycle_postfix); \
|
||||
return 0; \
|
||||
} \
|
||||
static int opFDIV ## name ## _a ## a_size(uint32_t fetchdat) \
|
||||
|
|
@ -49,7 +49,7 @@ static int opFDIV ## name ## _a ## a_size(uint32_t fetchdat) \
|
|||
load_var = get(); if (cpu_state.abrt) return 1; \
|
||||
x87_div(ST(0), ST(0), use_var); \
|
||||
cpu_state.tag[cpu_state.TOP&7] = TAG_VALID; \
|
||||
CLOCK_CYCLES(73); \
|
||||
CLOCK_CYCLES(x87_timings.fdiv ## cycle_postfix); \
|
||||
return 0; \
|
||||
} \
|
||||
static int opFDIVR ## name ## _a ## a_size(uint32_t fetchdat) \
|
||||
|
|
@ -61,7 +61,7 @@ static int opFDIVR ## name ## _a ## a_size(uint32_t fetchdat) \
|
|||
load_var = get(); if (cpu_state.abrt) return 1; \
|
||||
x87_div(ST(0), use_var, ST(0)); \
|
||||
cpu_state.tag[cpu_state.TOP&7] = TAG_VALID; \
|
||||
CLOCK_CYCLES(73); \
|
||||
CLOCK_CYCLES(x87_timings.fdiv ## cycle_postfix); \
|
||||
return 0; \
|
||||
} \
|
||||
static int opFMUL ## name ## _a ## a_size(uint32_t fetchdat) \
|
||||
|
|
@ -73,7 +73,7 @@ static int opFMUL ## name ## _a ## a_size(uint32_t fetchdat) \
|
|||
load_var = get(); if (cpu_state.abrt) return 1; \
|
||||
ST(0) *= use_var; \
|
||||
cpu_state.tag[cpu_state.TOP&7] = TAG_VALID; \
|
||||
CLOCK_CYCLES(11); \
|
||||
CLOCK_CYCLES(x87_timings.fmul ## cycle_postfix); \
|
||||
return 0; \
|
||||
} \
|
||||
static int opFSUB ## name ## _a ## a_size(uint32_t fetchdat) \
|
||||
|
|
@ -85,7 +85,7 @@ static int opFSUB ## name ## _a ## a_size(uint32_t fetchdat) \
|
|||
load_var = get(); if (cpu_state.abrt) return 1; \
|
||||
ST(0) -= use_var; \
|
||||
cpu_state.tag[cpu_state.TOP&7] = TAG_VALID; \
|
||||
CLOCK_CYCLES(8); \
|
||||
CLOCK_CYCLES(x87_timings.fadd ## cycle_postfix); \
|
||||
return 0; \
|
||||
} \
|
||||
static int opFSUBR ## name ## _a ## a_size(uint32_t fetchdat) \
|
||||
|
|
@ -97,20 +97,20 @@ static int opFSUBR ## name ## _a ## a_size(uint32_t fetchdat) \
|
|||
load_var = get(); if (cpu_state.abrt) return 1; \
|
||||
ST(0) = use_var - ST(0); \
|
||||
cpu_state.tag[cpu_state.TOP&7] = TAG_VALID; \
|
||||
CLOCK_CYCLES(8); \
|
||||
CLOCK_CYCLES(x87_timings.fadd ## cycle_postfix); \
|
||||
return 0; \
|
||||
}
|
||||
|
||||
|
||||
opFPU(s, x87_ts, 16, t.i, geteal, t.s)
|
||||
opFPU(s, x87_ts, 32, t.i, geteal, t.s)
|
||||
opFPU(d, x87_td, 16, t.i, geteaq, t.d)
|
||||
opFPU(d, x87_td, 32, t.i, geteaq, t.d)
|
||||
opFPU(s, x87_ts, 16, t.i, geteal, t.s, _32)
|
||||
opFPU(s, x87_ts, 32, t.i, geteal, t.s, _32)
|
||||
opFPU(d, x87_td, 16, t.i, geteaq, t.d, _64)
|
||||
opFPU(d, x87_td, 32, t.i, geteaq, t.d, _64)
|
||||
|
||||
opFPU(iw, uint16_t, 16, t, geteaw, (double)(int16_t)t)
|
||||
opFPU(iw, uint16_t, 32, t, geteaw, (double)(int16_t)t)
|
||||
opFPU(il, uint32_t, 16, t, geteal, (double)(int32_t)t)
|
||||
opFPU(il, uint32_t, 32, t, geteal, (double)(int32_t)t)
|
||||
opFPU(iw, uint16_t, 16, t, geteaw, (double)(int16_t)t, _i16)
|
||||
opFPU(iw, uint16_t, 32, t, geteaw, (double)(int16_t)t, _i16)
|
||||
opFPU(il, uint32_t, 16, t, geteal, (double)(int32_t)t, _i32)
|
||||
opFPU(il, uint32_t, 32, t, geteal, (double)(int32_t)t, _i32)
|
||||
|
||||
|
||||
|
||||
|
|
@ -122,7 +122,7 @@ static int opFADD(uint32_t fetchdat)
|
|||
if (fplog) pclog("FADD\n");
|
||||
ST(0) = ST(0) + ST(fetchdat & 7);
|
||||
cpu_state.tag[cpu_state.TOP&7] = TAG_VALID;
|
||||
CLOCK_CYCLES(8);
|
||||
CLOCK_CYCLES(x87_timings.fadd);
|
||||
return 0;
|
||||
}
|
||||
static int opFADDr(uint32_t fetchdat)
|
||||
|
|
@ -132,7 +132,7 @@ static int opFADDr(uint32_t fetchdat)
|
|||
if (fplog) pclog("FADD\n");
|
||||
ST(fetchdat & 7) = ST(fetchdat & 7) + ST(0);
|
||||
cpu_state.tag[(cpu_state.TOP + fetchdat) & 7] = TAG_VALID;
|
||||
CLOCK_CYCLES(8);
|
||||
CLOCK_CYCLES(x87_timings.fadd);
|
||||
return 0;
|
||||
}
|
||||
static int opFADDP(uint32_t fetchdat)
|
||||
|
|
@ -143,7 +143,7 @@ static int opFADDP(uint32_t fetchdat)
|
|||
ST(fetchdat & 7) = ST(fetchdat & 7) + ST(0);
|
||||
cpu_state.tag[(cpu_state.TOP + fetchdat) & 7] = TAG_VALID;
|
||||
x87_pop();
|
||||
CLOCK_CYCLES(8);
|
||||
CLOCK_CYCLES(x87_timings.fadd);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -155,7 +155,7 @@ static int opFCOM(uint32_t fetchdat)
|
|||
cpu_state.npxs &= ~(C0|C2|C3);
|
||||
if (ST(0) == ST(fetchdat & 7)) cpu_state.npxs |= C3;
|
||||
else if (ST(0) < ST(fetchdat & 7)) cpu_state.npxs |= C0;
|
||||
CLOCK_CYCLES(4);
|
||||
CLOCK_CYCLES(x87_timings.fadd);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -167,7 +167,7 @@ static int opFCOMP(uint32_t fetchdat)
|
|||
cpu_state.npxs &= ~(C0|C2|C3);
|
||||
cpu_state.npxs |= x87_compare(ST(0), ST(fetchdat & 7));
|
||||
x87_pop();
|
||||
CLOCK_CYCLES(4);
|
||||
CLOCK_CYCLES(x87_timings.fadd);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -184,7 +184,7 @@ static int opFCOMPP(uint32_t fetchdat)
|
|||
|
||||
x87_pop();
|
||||
x87_pop();
|
||||
CLOCK_CYCLES(4);
|
||||
CLOCK_CYCLES(x87_timings.fadd);
|
||||
return 0;
|
||||
}
|
||||
static int opFUCOMPP(uint32_t fetchdat)
|
||||
|
|
@ -196,7 +196,7 @@ static int opFUCOMPP(uint32_t fetchdat)
|
|||
cpu_state.npxs |= x87_ucompare(ST(0), ST(1));
|
||||
x87_pop();
|
||||
x87_pop();
|
||||
CLOCK_CYCLES(5);
|
||||
CLOCK_CYCLES(x87_timings.fucom);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -209,7 +209,7 @@ static int opFCOMI(uint32_t fetchdat)
|
|||
cpu_state.flags &= ~(Z_FLAG | P_FLAG | C_FLAG);
|
||||
if (ST(0) == ST(fetchdat & 7)) cpu_state.flags |= Z_FLAG;
|
||||
else if (ST(0) < ST(fetchdat & 7)) cpu_state.flags |= C_FLAG;
|
||||
CLOCK_CYCLES(4);
|
||||
CLOCK_CYCLES(x87_timings.fcom);
|
||||
return 0;
|
||||
}
|
||||
static int opFCOMIP(uint32_t fetchdat)
|
||||
|
|
@ -222,7 +222,7 @@ static int opFCOMIP(uint32_t fetchdat)
|
|||
if (ST(0) == ST(fetchdat & 7)) cpu_state.flags |= Z_FLAG;
|
||||
else if (ST(0) < ST(fetchdat & 7)) cpu_state.flags |= C_FLAG;
|
||||
x87_pop();
|
||||
CLOCK_CYCLES(4);
|
||||
CLOCK_CYCLES(x87_timings.fcom);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -233,7 +233,7 @@ static int opFDIV(uint32_t fetchdat)
|
|||
if (fplog) pclog("FDIV\n");
|
||||
x87_div(ST(0), ST(0), ST(fetchdat & 7));
|
||||
cpu_state.tag[cpu_state.TOP&7] = TAG_VALID;
|
||||
CLOCK_CYCLES(73);
|
||||
CLOCK_CYCLES(x87_timings.fdiv);
|
||||
return 0;
|
||||
}
|
||||
static int opFDIVr(uint32_t fetchdat)
|
||||
|
|
@ -243,7 +243,7 @@ static int opFDIVr(uint32_t fetchdat)
|
|||
if (fplog) pclog("FDIV\n");
|
||||
x87_div(ST(fetchdat & 7), ST(fetchdat & 7), ST(0));
|
||||
cpu_state.tag[(cpu_state.TOP + fetchdat) & 7] = TAG_VALID;
|
||||
CLOCK_CYCLES(73);
|
||||
CLOCK_CYCLES(x87_timings.fdiv);
|
||||
return 0;
|
||||
}
|
||||
static int opFDIVP(uint32_t fetchdat)
|
||||
|
|
@ -254,7 +254,7 @@ static int opFDIVP(uint32_t fetchdat)
|
|||
x87_div(ST(fetchdat & 7), ST(fetchdat & 7), ST(0));
|
||||
cpu_state.tag[(cpu_state.TOP + fetchdat) & 7] = TAG_VALID;
|
||||
x87_pop();
|
||||
CLOCK_CYCLES(73);
|
||||
CLOCK_CYCLES(x87_timings.fdiv);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -265,7 +265,7 @@ static int opFDIVR(uint32_t fetchdat)
|
|||
if (fplog) pclog("FDIVR\n");
|
||||
x87_div(ST(0), ST(fetchdat&7), ST(0));
|
||||
cpu_state.tag[cpu_state.TOP&7] = TAG_VALID;
|
||||
CLOCK_CYCLES(73);
|
||||
CLOCK_CYCLES(x87_timings.fdiv);
|
||||
return 0;
|
||||
}
|
||||
static int opFDIVRr(uint32_t fetchdat)
|
||||
|
|
@ -275,7 +275,7 @@ static int opFDIVRr(uint32_t fetchdat)
|
|||
if (fplog) pclog("FDIVR\n");
|
||||
x87_div(ST(fetchdat & 7), ST(0), ST(fetchdat & 7));
|
||||
cpu_state.tag[(cpu_state.TOP + fetchdat) & 7] = TAG_VALID;
|
||||
CLOCK_CYCLES(73);
|
||||
CLOCK_CYCLES(x87_timings.fdiv);
|
||||
return 0;
|
||||
}
|
||||
static int opFDIVRP(uint32_t fetchdat)
|
||||
|
|
@ -286,7 +286,7 @@ static int opFDIVRP(uint32_t fetchdat)
|
|||
x87_div(ST(fetchdat & 7), ST(0), ST(fetchdat & 7));
|
||||
cpu_state.tag[(cpu_state.TOP + fetchdat) & 7] = TAG_VALID;
|
||||
x87_pop();
|
||||
CLOCK_CYCLES(73);
|
||||
CLOCK_CYCLES(x87_timings.fdiv);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -297,7 +297,7 @@ static int opFMUL(uint32_t fetchdat)
|
|||
if (fplog) pclog("FMUL\n");
|
||||
ST(0) = ST(0) * ST(fetchdat & 7);
|
||||
cpu_state.tag[cpu_state.TOP&7] = TAG_VALID;
|
||||
CLOCK_CYCLES(16);
|
||||
CLOCK_CYCLES(x87_timings.fmul);
|
||||
return 0;
|
||||
}
|
||||
static int opFMULr(uint32_t fetchdat)
|
||||
|
|
@ -307,7 +307,7 @@ static int opFMULr(uint32_t fetchdat)
|
|||
if (fplog) pclog("FMUL\n");
|
||||
ST(fetchdat & 7) = ST(0) * ST(fetchdat & 7);
|
||||
cpu_state.tag[(cpu_state.TOP + fetchdat) & 7] = TAG_VALID;
|
||||
CLOCK_CYCLES(16);
|
||||
CLOCK_CYCLES(x87_timings.fmul);
|
||||
return 0;
|
||||
}
|
||||
static int opFMULP(uint32_t fetchdat)
|
||||
|
|
@ -318,7 +318,7 @@ static int opFMULP(uint32_t fetchdat)
|
|||
ST(fetchdat & 7) = ST(0) * ST(fetchdat & 7);
|
||||
cpu_state.tag[(cpu_state.TOP + fetchdat) & 7] = TAG_VALID;
|
||||
x87_pop();
|
||||
CLOCK_CYCLES(16);
|
||||
CLOCK_CYCLES(x87_timings.fmul);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -329,7 +329,7 @@ static int opFSUB(uint32_t fetchdat)
|
|||
if (fplog) pclog("FSUB\n");
|
||||
ST(0) = ST(0) - ST(fetchdat & 7);
|
||||
cpu_state.tag[cpu_state.TOP&7] = TAG_VALID;
|
||||
CLOCK_CYCLES(8);
|
||||
CLOCK_CYCLES(x87_timings.fadd);
|
||||
return 0;
|
||||
}
|
||||
static int opFSUBr(uint32_t fetchdat)
|
||||
|
|
@ -339,7 +339,7 @@ static int opFSUBr(uint32_t fetchdat)
|
|||
if (fplog) pclog("FSUB\n");
|
||||
ST(fetchdat & 7) = ST(fetchdat & 7) - ST(0);
|
||||
cpu_state.tag[(cpu_state.TOP + fetchdat) & 7] = TAG_VALID;
|
||||
CLOCK_CYCLES(8);
|
||||
CLOCK_CYCLES(x87_timings.fadd);
|
||||
return 0;
|
||||
}
|
||||
static int opFSUBP(uint32_t fetchdat)
|
||||
|
|
@ -350,7 +350,7 @@ static int opFSUBP(uint32_t fetchdat)
|
|||
ST(fetchdat & 7) = ST(fetchdat & 7) - ST(0);
|
||||
cpu_state.tag[(cpu_state.TOP + fetchdat) & 7] = TAG_VALID;
|
||||
x87_pop();
|
||||
CLOCK_CYCLES(8);
|
||||
CLOCK_CYCLES(x87_timings.fadd);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -361,7 +361,7 @@ static int opFSUBR(uint32_t fetchdat)
|
|||
if (fplog) pclog("FSUBR\n");
|
||||
ST(0) = ST(fetchdat & 7) - ST(0);
|
||||
cpu_state.tag[cpu_state.TOP&7] = TAG_VALID;
|
||||
CLOCK_CYCLES(8);
|
||||
CLOCK_CYCLES(x87_timings.fadd);
|
||||
return 0;
|
||||
}
|
||||
static int opFSUBRr(uint32_t fetchdat)
|
||||
|
|
@ -371,7 +371,7 @@ static int opFSUBRr(uint32_t fetchdat)
|
|||
if (fplog) pclog("FSUBR\n");
|
||||
ST(fetchdat & 7) = ST(0) - ST(fetchdat & 7);
|
||||
cpu_state.tag[(cpu_state.TOP + fetchdat) & 7] = TAG_VALID;
|
||||
CLOCK_CYCLES(8);
|
||||
CLOCK_CYCLES(x87_timings.fadd);
|
||||
return 0;
|
||||
}
|
||||
static int opFSUBRP(uint32_t fetchdat)
|
||||
|
|
@ -382,7 +382,7 @@ static int opFSUBRP(uint32_t fetchdat)
|
|||
ST(fetchdat & 7) = ST(0) - ST(fetchdat & 7);
|
||||
cpu_state.tag[(cpu_state.TOP + fetchdat) & 7] = TAG_VALID;
|
||||
x87_pop();
|
||||
CLOCK_CYCLES(8);
|
||||
CLOCK_CYCLES(x87_timings.fadd);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -393,7 +393,7 @@ static int opFUCOM(uint32_t fetchdat)
|
|||
if (fplog) pclog("FUCOM\n");
|
||||
cpu_state.npxs &= ~(C0|C2|C3);
|
||||
cpu_state.npxs |= x87_ucompare(ST(0), ST(fetchdat & 7));
|
||||
CLOCK_CYCLES(4);
|
||||
CLOCK_CYCLES(x87_timings.fucom);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -405,7 +405,7 @@ static int opFUCOMP(uint32_t fetchdat)
|
|||
cpu_state.npxs &= ~(C0|C2|C3);
|
||||
cpu_state.npxs |= x87_ucompare(ST(0), ST(fetchdat & 7));
|
||||
x87_pop();
|
||||
CLOCK_CYCLES(4);
|
||||
CLOCK_CYCLES(x87_timings.fucom);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -418,7 +418,7 @@ static int opFUCOMI(uint32_t fetchdat)
|
|||
cpu_state.flags &= ~(Z_FLAG | P_FLAG | C_FLAG);
|
||||
if (ST(0) == ST(fetchdat & 7)) cpu_state.flags |= Z_FLAG;
|
||||
else if (ST(0) < ST(fetchdat & 7)) cpu_state.flags |= C_FLAG;
|
||||
CLOCK_CYCLES(4);
|
||||
CLOCK_CYCLES(x87_timings.fucom);
|
||||
return 0;
|
||||
}
|
||||
static int opFUCOMIP(uint32_t fetchdat)
|
||||
|
|
@ -431,6 +431,6 @@ static int opFUCOMIP(uint32_t fetchdat)
|
|||
if (ST(0) == ST(fetchdat & 7)) cpu_state.flags |= Z_FLAG;
|
||||
else if (ST(0) < ST(fetchdat & 7)) cpu_state.flags |= C_FLAG;
|
||||
x87_pop();
|
||||
CLOCK_CYCLES(4);
|
||||
CLOCK_CYCLES(x87_timings.fucom);
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in a new issue