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Video timing improvements :

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- Separated read and write timings
- Added timings for onboard video chips
- Updated timings based on VIDSPEED testing
This commit is contained in:
SarahW 2018-01-31 21:09:11 +00:00
commit 475f51ba0f
5 changed files with 178 additions and 81 deletions
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8
src/vid_ega.c
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@ -696,8 +696,8 @@ void ega_write(uint32_t addr, uint8_t val, void *p)
int writemask2 = ega->writemask;
egawrites++;
cycles -= video_timing_b;
cycles_lost += video_timing_b;
cycles -= video_timing_write_b;
cycles_lost += video_timing_write_b;
if (addr >= 0xB0000) addr &= 0x7fff;
else addr &= 0xffff;
@ -835,8 +835,8 @@ uint8_t ega_read(uint32_t addr, void *p)
int readplane = ega->readplane;
egareads++;
cycles -= video_timing_b;
cycles_lost += video_timing_b;
cycles -= video_timing_read_b;
cycles_lost += video_timing_read_b;
// pclog("Readega %06X ",addr);
if (addr >= 0xb0000) addr &= 0x7fff;
else addr &= 0xffff;