Initial commit of dynamic recompiler.
Various CPU changes to support dynamic recompiler.
This commit is contained in:
parent
17cae8a2d7
commit
4676daade4
52 changed files with 3740 additions and 1139 deletions
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@ -13,9 +13,9 @@
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} \
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else \
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{ \
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uint8_t dst = geteab(); if (abrt) return 0; \
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uint8_t dst = geteab(); if (abrt) return 1; \
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uint8_t src = getr8(reg); \
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seteab(operation); if (abrt) return 0; \
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seteab(operation); if (abrt) return 1; \
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setflags ## 8 flagops; \
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cycles -= timing_mr; \
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} \
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@ -35,9 +35,9 @@
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} \
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else \
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{ \
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uint8_t dst = geteab(); if (abrt) return 0; \
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uint8_t dst = geteab(); if (abrt) return 1; \
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uint8_t src = getr8(reg); \
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seteab(operation); if (abrt) return 0; \
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seteab(operation); if (abrt) return 1; \
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setflags ## 8 flagops; \
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cycles -= timing_mr; \
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} \
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@ -58,9 +58,9 @@
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} \
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else \
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{ \
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uint16_t dst = geteaw(); if (abrt) return 0; \
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uint16_t dst = geteaw(); if (abrt) return 1; \
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uint16_t src = regs[reg].w; \
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seteaw(operation); if (abrt) return 0; \
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seteaw(operation); if (abrt) return 1; \
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setflags ## 16 flagops; \
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cycles -= timing_mr; \
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} \
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@ -80,9 +80,9 @@
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} \
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else \
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{ \
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uint16_t dst = geteaw(); if (abrt) return 0; \
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uint16_t dst = geteaw(); if (abrt) return 1; \
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uint16_t src = regs[reg].w; \
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seteaw(operation); if (abrt) return 0; \
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seteaw(operation); if (abrt) return 1; \
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setflags ## 16 flagops; \
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cycles -= timing_mr; \
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} \
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@ -103,9 +103,9 @@
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} \
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else \
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{ \
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uint32_t dst = geteal(); if (abrt) return 0; \
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uint32_t dst = geteal(); if (abrt) return 1; \
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uint32_t src = regs[reg].l; \
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seteal(operation); if (abrt) return 0; \
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seteal(operation); if (abrt) return 1; \
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setflags ## 32 flagops; \
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cycles -= timing_mrl; \
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} \
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@ -125,9 +125,9 @@
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} \
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else \
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{ \
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uint32_t dst = geteal(); if (abrt) return 0; \
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uint32_t dst = geteal(); if (abrt) return 1; \
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uint32_t src = regs[reg].l; \
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seteal(operation); if (abrt) return 0; \
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seteal(operation); if (abrt) return 1; \
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setflags ## 32 flagops; \
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cycles -= timing_mrl; \
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} \
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@ -140,7 +140,7 @@
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uint8_t dst, src; \
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fetch_ea_16(fetchdat); \
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dst = getr8(reg); \
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src = geteab(); if (abrt) return 0; \
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src = geteab(); if (abrt) return 1; \
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setflags ## 8 flagops; \
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setr8(reg, operation); \
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cycles -= (mod == 3) ? timing_rr : timing_rm; \
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@ -152,7 +152,7 @@
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uint8_t dst, src; \
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fetch_ea_32(fetchdat); \
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dst = getr8(reg); \
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src = geteab(); if (abrt) return 0; \
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src = geteab(); if (abrt) return 1; \
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setflags ## 8 flagops; \
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setr8(reg, operation); \
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cycles -= (mod == 3) ? timing_rr : timing_rm; \
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@ -165,7 +165,7 @@
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uint16_t dst, src; \
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fetch_ea_16(fetchdat); \
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dst = regs[reg].w; \
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src = geteaw(); if (abrt) return 0; \
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src = geteaw(); if (abrt) return 1; \
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setflags ## 16 flagops; \
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regs[reg].w = operation; \
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cycles -= (mod == 3) ? timing_rr : timing_rm; \
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@ -177,7 +177,7 @@
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uint16_t dst, src; \
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fetch_ea_32(fetchdat); \
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dst = regs[reg].w; \
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src = geteaw(); if (abrt) return 0; \
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src = geteaw(); if (abrt) return 1; \
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setflags ## 16 flagops; \
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regs[reg].w = operation; \
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cycles -= (mod == 3) ? timing_rr : timing_rm; \
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@ -190,7 +190,7 @@
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uint32_t dst, src; \
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fetch_ea_16(fetchdat); \
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dst = regs[reg].l; \
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src = geteal(); if (abrt) return 0; \
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src = geteal(); if (abrt) return 1; \
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setflags ## 32 flagops; \
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regs[reg].l = operation; \
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cycles -= (mod == 3) ? timing_rr : timing_rml; \
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@ -202,7 +202,7 @@
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uint32_t dst, src; \
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fetch_ea_32(fetchdat); \
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dst = regs[reg].l; \
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src = geteal(); if (abrt) return 0; \
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src = geteal(); if (abrt) return 1; \
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setflags ## 32 flagops; \
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regs[reg].l = operation; \
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cycles -= (mod == 3) ? timing_rr : timing_rml; \
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@ -235,7 +235,7 @@
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{ \
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int tempc = CF_SET(); \
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uint32_t dst = EAX; \
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uint32_t src = getlong(); \
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uint32_t src = getlong(); if (abrt) return 1; \
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setflags ## 32 flagops; \
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EAX = operation; \
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cycles -= timing_rr; \
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@ -254,7 +254,7 @@ static int opCMP_b_rmw_a16(uint32_t fetchdat)
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{
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uint8_t dst;
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fetch_ea_16(fetchdat);
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dst = geteab(); if (abrt) return 0;
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dst = geteab(); if (abrt) return 1;
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setsub8(dst, getr8(reg));
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if (is486) cycles -= ((mod == 3) ? 1 : 2);
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else cycles -= ((mod == 3) ? 2 : 5);
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@ -264,7 +264,7 @@ static int opCMP_b_rmw_a32(uint32_t fetchdat)
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{
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uint8_t dst;
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fetch_ea_32(fetchdat);
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dst = geteab(); if (abrt) return 0;
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dst = geteab(); if (abrt) return 1;
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setsub8(dst, getr8(reg));
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if (is486) cycles -= ((mod == 3) ? 1 : 2);
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else cycles -= ((mod == 3) ? 2 : 5);
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@ -275,7 +275,7 @@ static int opCMP_w_rmw_a16(uint32_t fetchdat)
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{
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uint16_t dst;
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fetch_ea_16(fetchdat);
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dst = geteaw(); if (abrt) return 0;
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dst = geteaw(); if (abrt) return 1;
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setsub16(dst, regs[reg].w);
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if (is486) cycles -= ((mod == 3) ? 1 : 2);
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else cycles -= ((mod == 3) ? 2 : 5);
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@ -285,7 +285,7 @@ static int opCMP_w_rmw_a32(uint32_t fetchdat)
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{
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uint16_t dst;
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fetch_ea_32(fetchdat);
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dst = geteaw(); if (abrt) return 0;
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dst = geteaw(); if (abrt) return 1;
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setsub16(dst, regs[reg].w);
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if (is486) cycles -= ((mod == 3) ? 1 : 2);
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else cycles -= ((mod == 3) ? 2 : 5);
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@ -296,7 +296,7 @@ static int opCMP_l_rmw_a16(uint32_t fetchdat)
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{
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uint32_t dst;
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fetch_ea_16(fetchdat);
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dst = geteal(); if (abrt) return 0;
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dst = geteal(); if (abrt) return 1;
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setsub32(dst, regs[reg].l);
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if (is486) cycles -= ((mod == 3) ? 1 : 2);
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else cycles -= ((mod == 3) ? 2 : 5);
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@ -306,7 +306,7 @@ static int opCMP_l_rmw_a32(uint32_t fetchdat)
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{
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uint32_t dst;
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fetch_ea_32(fetchdat);
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dst = geteal(); if (abrt) return 0;
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dst = geteal(); if (abrt) return 1;
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setsub32(dst, regs[reg].l);
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if (is486) cycles -= ((mod == 3) ? 1 : 2);
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else cycles -= ((mod == 3) ? 2 : 5);
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@ -317,7 +317,7 @@ static int opCMP_b_rm_a16(uint32_t fetchdat)
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{
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uint8_t src;
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fetch_ea_16(fetchdat);
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src = geteab(); if (abrt) return 0;
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src = geteab(); if (abrt) return 1;
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setsub8(getr8(reg), src);
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cycles -= (mod == 3) ? timing_rr : timing_rm;
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return 0;
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@ -326,7 +326,7 @@ static int opCMP_b_rm_a32(uint32_t fetchdat)
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{
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uint8_t src;
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fetch_ea_32(fetchdat);
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src = geteab(); if (abrt) return 0;
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src = geteab(); if (abrt) return 1;
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setsub8(getr8(reg), src);
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cycles -= (mod == 3) ? timing_rr : timing_rm;
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return 0;
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@ -336,7 +336,7 @@ static int opCMP_w_rm_a16(uint32_t fetchdat)
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{
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uint16_t src;
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fetch_ea_16(fetchdat);
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src = geteaw(); if (abrt) return 0;
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src = geteaw(); if (abrt) return 1;
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setsub16(regs[reg].w, src);
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cycles -= (mod == 3) ? timing_rr : timing_rm;
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return 0;
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@ -345,7 +345,7 @@ static int opCMP_w_rm_a32(uint32_t fetchdat)
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{
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uint16_t src;
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fetch_ea_32(fetchdat);
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src = geteaw(); if (abrt) return 0;
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src = geteaw(); if (abrt) return 1;
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setsub16(regs[reg].w, src);
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cycles -= (mod == 3) ? timing_rr : timing_rm;
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return 0;
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@ -355,7 +355,7 @@ static int opCMP_l_rm_a16(uint32_t fetchdat)
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{
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uint32_t src;
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fetch_ea_16(fetchdat);
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src = geteal(); if (abrt) return 0;
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src = geteal(); if (abrt) return 1;
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setsub32(regs[reg].l, src);
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cycles -= (mod == 3) ? timing_rr : timing_rml;
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return 0;
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@ -364,7 +364,7 @@ static int opCMP_l_rm_a32(uint32_t fetchdat)
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{
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uint32_t src;
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fetch_ea_32(fetchdat);
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src = geteal(); if (abrt) return 0;
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src = geteal(); if (abrt) return 1;
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setsub32(regs[reg].l, src);
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cycles -= (mod == 3) ? timing_rr : timing_rml;
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return 0;
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@ -388,7 +388,7 @@ static int opCMP_AX_imm(uint32_t fetchdat)
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static int opCMP_EAX_imm(uint32_t fetchdat)
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{
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uint32_t src = getlong();
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uint32_t src = getlong(); if (abrt) return 1;
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setsub32(EAX, src);
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cycles -= timing_rr;
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return 0;
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@ -398,7 +398,7 @@ static int opTEST_b_a16(uint32_t fetchdat)
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{
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uint8_t temp, temp2;
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fetch_ea_16(fetchdat);
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temp = geteab(); if (abrt) return 0;
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temp = geteab(); if (abrt) return 1;
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temp2 = getr8(reg);
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setznp8(temp & temp2);
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if (is486) cycles -= ((mod == 3) ? 1 : 2);
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@ -409,7 +409,7 @@ static int opTEST_b_a32(uint32_t fetchdat)
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{
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uint8_t temp, temp2;
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fetch_ea_32(fetchdat);
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temp = geteab(); if (abrt) return 0;
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temp = geteab(); if (abrt) return 1;
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temp2 = getr8(reg);
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setznp8(temp & temp2);
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if (is486) cycles -= ((mod == 3) ? 1 : 2);
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@ -421,7 +421,7 @@ static int opTEST_w_a16(uint32_t fetchdat)
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{
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uint16_t temp, temp2;
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fetch_ea_16(fetchdat);
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temp = geteaw(); if (abrt) return 0;
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temp = geteaw(); if (abrt) return 1;
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temp2 = regs[reg].w;
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setznp16(temp & temp2);
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if (is486) cycles -= ((mod == 3) ? 1 : 2);
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@ -432,7 +432,7 @@ static int opTEST_w_a32(uint32_t fetchdat)
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{
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uint16_t temp, temp2;
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fetch_ea_32(fetchdat);
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temp = geteaw(); if (abrt) return 0;
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temp = geteaw(); if (abrt) return 1;
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temp2 = regs[reg].w;
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setznp16(temp & temp2);
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if (is486) cycles -= ((mod == 3) ? 1 : 2);
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@ -444,7 +444,7 @@ static int opTEST_l_a16(uint32_t fetchdat)
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{
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uint32_t temp, temp2;
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fetch_ea_16(fetchdat);
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temp = geteal(); if (abrt) return 0;
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temp = geteal(); if (abrt) return 1;
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temp2 = regs[reg].l;
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setznp32(temp & temp2);
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if (is486) cycles -= ((mod == 3) ? 1 : 2);
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@ -455,7 +455,7 @@ static int opTEST_l_a32(uint32_t fetchdat)
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{
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uint32_t temp, temp2;
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fetch_ea_32(fetchdat);
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temp = geteal(); if (abrt) return 0;
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temp = geteal(); if (abrt) return 1;
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temp2 = regs[reg].l;
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setznp32(temp & temp2);
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if (is486) cycles -= ((mod == 3) ? 1 : 2);
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@ -479,7 +479,7 @@ static int opTEST_AX(uint32_t fetchdat)
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}
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static int opTEST_EAX(uint32_t fetchdat)
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{
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uint32_t temp = getlong(); if (abrt) return 0;
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uint32_t temp = getlong(); if (abrt) return 1;
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setznp32(EAX & temp);
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cycles -= timing_rr;
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return 0;
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@ -487,44 +487,44 @@ static int opTEST_EAX(uint32_t fetchdat)
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#define ARITH_MULTI(ea_width, flag_width) \
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dst = getea ## ea_width(); if (abrt) return 0; \
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dst = getea ## ea_width(); if (abrt) return 1; \
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switch (rmdat&0x38) \
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{ \
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case 0x00: /*ADD ea, #*/ \
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setea ## ea_width(dst + src); if (abrt) return 0; \
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setea ## ea_width(dst + src); if (abrt) return 1; \
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setadd ## flag_width(dst, src); \
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cycles -= (mod == 3) ? timing_rr : timing_mr; \
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break; \
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case 0x08: /*OR ea, #*/ \
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dst |= src; \
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setea ## ea_width(dst); if (abrt) return 0; \
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setea ## ea_width(dst); if (abrt) return 1; \
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setznp ## flag_width(dst); \
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cycles -= (mod == 3) ? timing_rr : timing_mr; \
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break; \
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case 0x10: /*ADC ea, #*/ \
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setea ## ea_width(dst + src + tempc); if (abrt) return 0; \
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setea ## ea_width(dst + src + tempc); if (abrt) return 1; \
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setadc ## flag_width(dst, src); \
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cycles -= (mod == 3) ? timing_rr : timing_mr; \
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break; \
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case 0x18: /*SBB ea, #*/ \
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setea ## ea_width(dst - (src + tempc)); if (abrt) return 0; \
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setea ## ea_width(dst - (src + tempc)); if (abrt) return 1; \
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setsbc ## flag_width(dst, src); \
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cycles -= (mod == 3) ? timing_rr : timing_mr; \
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break; \
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case 0x20: /*AND ea, #*/ \
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dst &= src; \
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setea ## ea_width(dst); if (abrt) return 0; \
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setea ## ea_width(dst); if (abrt) return 1; \
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setznp ## flag_width(dst); \
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cycles -= (mod == 3) ? timing_rr : timing_mr; \
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break; \
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case 0x28: /*SUB ea, #*/ \
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setea ## ea_width(dst - src); if (abrt) return 0; \
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setea ## ea_width(dst - src); if (abrt) return 1; \
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setsub ## flag_width(dst, src); \
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cycles -= (mod == 3) ? timing_rr : timing_mr; \
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break; \
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case 0x30: /*XOR ea, #*/ \
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dst ^= src; \
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setea ## ea_width(dst); if (abrt) return 0; \
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setea ## ea_width(dst); if (abrt) return 1; \
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setznp ## flag_width(dst); \
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cycles -= (mod == 3) ? timing_rr : timing_mr; \
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break; \
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@ -541,7 +541,7 @@ static int op80_a16(uint32_t fetchdat)
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uint8_t src, dst;
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fetch_ea_16(fetchdat);
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src = getbyte(); if (abrt) return 0;
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src = getbyte(); if (abrt) return 1;
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ARITH_MULTI(b, 8);
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return 0;
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@ -551,7 +551,7 @@ static int op80_a32(uint32_t fetchdat)
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uint8_t src, dst;
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fetch_ea_32(fetchdat);
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src = getbyte(); if (abrt) return 0;
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src = getbyte(); if (abrt) return 1;
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ARITH_MULTI(b, 8);
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||||
return 0;
|
||||
|
|
@ -561,7 +561,7 @@ static int op81_w_a16(uint32_t fetchdat)
|
|||
uint16_t src, dst;
|
||||
|
||||
fetch_ea_16(fetchdat);
|
||||
src = getword(); if (abrt) return 0;
|
||||
src = getword(); if (abrt) return 1;
|
||||
ARITH_MULTI(w, 16);
|
||||
|
||||
return 0;
|
||||
|
|
@ -571,7 +571,7 @@ static int op81_w_a32(uint32_t fetchdat)
|
|||
uint16_t src, dst;
|
||||
|
||||
fetch_ea_32(fetchdat);
|
||||
src = getword(); if (abrt) return 0;
|
||||
src = getword(); if (abrt) return 1;
|
||||
ARITH_MULTI(w, 16);
|
||||
|
||||
return 0;
|
||||
|
|
@ -581,7 +581,7 @@ static int op81_l_a16(uint32_t fetchdat)
|
|||
uint32_t src, dst;
|
||||
|
||||
fetch_ea_16(fetchdat);
|
||||
src = getlong(); if (abrt) return 0;
|
||||
src = getlong(); if (abrt) return 1;
|
||||
ARITH_MULTI(l, 32);
|
||||
|
||||
return 0;
|
||||
|
|
@ -591,7 +591,7 @@ static int op81_l_a32(uint32_t fetchdat)
|
|||
uint32_t src, dst;
|
||||
|
||||
fetch_ea_32(fetchdat);
|
||||
src = getlong(); if (abrt) return 0;
|
||||
src = getlong(); if (abrt) return 1;
|
||||
ARITH_MULTI(l, 32);
|
||||
|
||||
return 0;
|
||||
|
|
@ -602,7 +602,7 @@ static int op83_w_a16(uint32_t fetchdat)
|
|||
uint16_t src, dst;
|
||||
|
||||
fetch_ea_16(fetchdat);
|
||||
src = getbyte(); if (abrt) return 0;
|
||||
src = getbyte(); if (abrt) return 1;
|
||||
if (src & 0x80) src |= 0xff00;
|
||||
ARITH_MULTI(w, 16);
|
||||
|
||||
|
|
@ -613,7 +613,7 @@ static int op83_w_a32(uint32_t fetchdat)
|
|||
uint16_t src, dst;
|
||||
|
||||
fetch_ea_32(fetchdat);
|
||||
src = getbyte(); if (abrt) return 0;
|
||||
src = getbyte(); if (abrt) return 1;
|
||||
if (src & 0x80) src |= 0xff00;
|
||||
ARITH_MULTI(w, 16);
|
||||
|
||||
|
|
@ -625,7 +625,7 @@ static int op83_l_a16(uint32_t fetchdat)
|
|||
uint32_t src, dst;
|
||||
|
||||
fetch_ea_16(fetchdat);
|
||||
src = getbyte(); if (abrt) return 0;
|
||||
src = getbyte(); if (abrt) return 1;
|
||||
if (src & 0x80) src |= 0xffffff00;
|
||||
ARITH_MULTI(l, 32);
|
||||
|
||||
|
|
@ -636,7 +636,7 @@ static int op83_l_a32(uint32_t fetchdat)
|
|||
uint32_t src, dst;
|
||||
|
||||
fetch_ea_32(fetchdat);
|
||||
src = getbyte(); if (abrt) return 0;
|
||||
src = getbyte(); if (abrt) return 1;
|
||||
if (src & 0x80) src |= 0xffffff00;
|
||||
ARITH_MULTI(l, 32);
|
||||
|
||||
|
|
|
|||
Loading…
Reference in a new issue