Fixed vblankstart on Mach64, ET4000/W32p and ViRGE.
Implemented clock generation on ViRGE.
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3 changed files with 25 additions and 12 deletions
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@ -236,12 +236,13 @@ void et4000w32p_recalctimings(svga_t *svga)
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// pclog("Recalc %08X ",svga_ma);
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svga->ma_latch |= (svga->crtc[0x33] & 0x7) << 16;
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// pclog("SVGA_MA %08X %i\n", svga_ma, (svga_miscout >> 2) & 3);
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if (svga->crtc[0x35] & 0x02) svga->vtotal += 0x400;
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if (svga->crtc[0x35] & 0x04) svga->dispend += 0x400;
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if (svga->crtc[0x35] & 0x08) svga->vsyncstart += 0x400;
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if (svga->crtc[0x35] & 0x10) svga->split += 0x400;
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if (svga->crtc[0x3F] & 0x80) svga->rowoffset += 0x100;
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if (svga->crtc[0x3F] & 0x01) svga->htotal += 256;
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if (svga->crtc[0x35] & 0x01) svga->vblankstart += 0x400;
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if (svga->crtc[0x35] & 0x02) svga->vtotal += 0x400;
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if (svga->crtc[0x35] & 0x04) svga->dispend += 0x400;
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if (svga->crtc[0x35] & 0x08) svga->vsyncstart += 0x400;
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if (svga->crtc[0x35] & 0x10) svga->split += 0x400;
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if (svga->crtc[0x3F] & 0x80) svga->rowoffset += 0x100;
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if (svga->crtc[0x3F] & 0x01) svga->htotal += 256;
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if (svga->attrregs[0x16] & 0x20) svga->hdisp <<= 1;
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switch ((svga->miscout >> 2) & 3)
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