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Added code generation for FCHS, FCOMPP, and FLD constant forms.

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This commit is contained in:
SarahW 2016-12-07 20:52:02 +00:00
commit 437a9560f2
4 changed files with 194 additions and 4 deletions
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94
src/codegen_ops_x86.h
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@ -2169,6 +2169,59 @@ static void FP_LOAD_IQ()
}
}
static void FP_LOAD_IMM_Q(uint64_t v)
{
if (codeblock[block_current].flags & CODEBLOCK_STATIC_TOP)
{
addbyte(0xc7); /*MOV ST[reg][EBP], v*/
addbyte(0x45);
addbyte(cpu_state_offset(ST[(cpu_state.TOP - 1) & 7]));
addlong(v & 0xffffffff);
addbyte(0xc7); /*MOV ST[reg][EBP]+4, v*/
addbyte(0x45);
addbyte(cpu_state_offset(ST[(cpu_state.TOP - 1) & 7]) + 4);
addlong(v >> 32);
addbyte(0xc6); /*MOVB TOP[EBP], (TOP-1) & 7*/
addbyte(0x45);
addbyte(cpu_state_offset(TOP));
addbyte((cpu_state.TOP - 1) & 7);
addbyte(0xc6); /*MOVB tag[reg][EBP], 1:0*/
addbyte(0x45);
addbyte(cpu_state_offset(tag[(cpu_state.TOP - 1) & 7]));
addbyte(v ? 0 : 1);
}
else
{
addbyte(0x8b); /*MOV EBX, TOP*/
addbyte(0x5d);
addbyte(cpu_state_offset(TOP));
addbyte(0x83); /*SUB EBX, 1*/
addbyte(0xeb);
addbyte(1);
addbyte(0x83); /*AND EBX, 7*/
addbyte(0xe3);
addbyte(7);
addbyte(0xc7); /*MOV ST[EBP+EBX*8], v*/
addbyte(0x44);
addbyte(0xdd);
addbyte(cpu_state_offset(ST));
addlong(v & 0xffffffff);
addbyte(0xc7); /*MOV ST[EBP+EBX*8]+4, v*/
addbyte(0x44);
addbyte(0xdd);
addbyte(cpu_state_offset(ST) + 4);
addlong(v >> 32);
addbyte(0xc6); /*MOVB tag[reg][EBP], 1:0*/
addbyte(0x44);
addbyte(0x1d);
addbyte(cpu_state_offset(tag[0]));
addbyte(v ? 0 : 1);
addbyte(0x89); /*MOV TOP, EBX*/
addbyte(0x5d);
addbyte(cpu_state_offset(TOP));
}
}
static int FP_LOAD_REG(int reg)
{
if (codeblock[block_current].flags & CODEBLOCK_STATIC_TOP)
@ -3162,6 +3215,47 @@ static void FP_COMPARE_REG(int dst, int src)
}
}
static void FP_FCHS()
{
if (codeblock[block_current].flags & CODEBLOCK_STATIC_TOP)
{
addbyte(0xdd); /*FLD ST[0][EBP]*/
addbyte(0x45);
addbyte(cpu_state_offset(ST[cpu_state.TOP]));
addbyte(0xd9); /*FCHS*/
addbyte(0xe0);
addbyte(0x80); /*AND tag[dst][EBP], ~TAG_UINT64*/
addbyte(0x65);
addbyte(cpu_state_offset(tag[cpu_state.TOP]));
addbyte(~TAG_UINT64);
addbyte(0xdd); /*FSTP ST[dst][EBP]*/
addbyte(0x5d);
addbyte(cpu_state_offset(ST[cpu_state.TOP]));
}
else
{
addbyte(0x8b); /*MOV EAX, TOP*/
addbyte(0x45);
addbyte(cpu_state_offset(TOP));
addbyte(0xdd); /*FLD [ESI+EAX*8]*/
addbyte(0x44);
addbyte(0xc5);
addbyte(cpu_state_offset(ST));
addbyte(0x80); /*AND tag[EAX], ~TAG_UINT64*/
addbyte(0x64);
addbyte(0x05);
addbyte(cpu_state_offset(tag[0]));
addbyte(~TAG_UINT64);
addbyte(0xd9); /*FCHS*/
addbyte(0xe0);
addbyte(0xdd); /*FSTP ST[EAX*8]*/
addbyte(0x5c);
addbyte(0xc5);
addbyte(cpu_state_offset(ST));
}
}
static void UPDATE_NPXC(int reg)
{
addbyte(0x66); /*AND cpu_state.new_npxc, ~0xc00*/