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Implemented data misalignment penalties on 486 and later CPUs.

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This commit is contained in:
SarahW 2017-06-04 16:41:33 +01:00
commit 3b4392bcf8
7 changed files with 361 additions and 327 deletions
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3
src/cpu.h
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@ -51,6 +51,7 @@ extern int timing_call_rm, timing_call_pm, timing_call_pm_gate, timing_call_pm_g
extern int timing_retf_rm, timing_retf_pm, timing_retf_pm_outer;
extern int timing_jmp_rm, timing_jmp_pm, timing_jmp_pm_gate;
extern int timing_misaligned;
typedef struct
{
@ -97,6 +98,8 @@ extern int cpu_iscyrix;
extern int cpu_16bitbus;
extern int cpu_busspeed;
extern int cpu_multi;
/*Cyrix 5x86/6x86 only has data misalignment penalties when crossing 8-byte boundaries*/
extern int cpu_cyrix_alignment;
extern int cpu_hasrdtsc;
extern int cpu_hasMSR;