From 3890ffdff05596f29837098ec1f8044c59275a2a Mon Sep 17 00:00:00 2001 From: SarahW Date: Sun, 31 Mar 2019 18:23:21 +0100 Subject: [PATCH] Fixed multiple definition of REG_SP in ARM64 backend. Fixes build warnings, also fixes Windows 3.x. --- src/codegen_backend_arm64.c | 46 ++++++++++++++++---------------- src/codegen_backend_arm64_defs.h | 2 +- src/codegen_backend_arm64_uops.c | 28 +++++++++---------- 3 files changed, 38 insertions(+), 38 deletions(-) diff --git a/src/codegen_backend_arm64.c b/src/codegen_backend_arm64.c index 7497a0b..b85d3f9 100644 --- a/src/codegen_backend_arm64.c +++ b/src/codegen_backend_arm64.c @@ -114,7 +114,7 @@ static void build_load_routine(codeblock_t *block, int size, int is_float) host_arm64_branch_set_offset(branch_offset, &block_write_data[block_pos]); if (size != 1) host_arm64_branch_set_offset(misaligned_offset, &block_write_data[block_pos]); - host_arm64_STP_PREIDX_X(block, REG_X29, REG_X30, REG_SP, -16); + host_arm64_STP_PREIDX_X(block, REG_X29, REG_X30, REG_XSP, -16); if (size == 1) host_arm64_call(block, (uintptr_t)readmembl); else if (size == 2) @@ -130,7 +130,7 @@ static void build_load_routine(codeblock_t *block, int size, int is_float) host_arm64_FMOV_S_W(block, REG_V_TEMP, REG_W0); else if (size == 8) host_arm64_FMOV_D_Q(block, REG_V_TEMP, REG_X0); - host_arm64_LDP_POSTIDX_X(block, REG_X29, REG_X30, REG_SP, 16); + host_arm64_LDP_POSTIDX_X(block, REG_X29, REG_X30, REG_XSP, 16); host_arm64_RET(block, REG_X30); } @@ -183,7 +183,7 @@ static void build_store_routine(codeblock_t *block, int size, int is_float) host_arm64_branch_set_offset(branch_offset, &block_write_data[block_pos]); if (size != 1) host_arm64_branch_set_offset(misaligned_offset, &block_write_data[block_pos]); - host_arm64_STP_PREIDX_X(block, REG_X29, REG_X30, REG_SP, -16); + host_arm64_STP_PREIDX_X(block, REG_X29, REG_X30, REG_XSP, -16); if (size == 4 && is_float) host_arm64_FMOV_W_S(block, REG_W1, REG_V_TEMP); else if (size == 8) @@ -199,7 +199,7 @@ static void build_store_routine(codeblock_t *block, int size, int is_float) else fatal("build_store_routine - unknown size %i\n", size); codegen_direct_read_8(block, REG_W1, &cpu_state.abrt); - host_arm64_LDP_POSTIDX_X(block, REG_X29, REG_X30, REG_SP, 16); + host_arm64_LDP_POSTIDX_X(block, REG_X29, REG_X30, REG_XSP, 16); host_arm64_RET(block, REG_X30); } @@ -318,12 +318,12 @@ void codegen_backend_init() host_arm64_call(block, x86gpf); codegen_exit_rout = &block_write_data[block_pos]; - host_arm64_LDP_POSTIDX_X(block, REG_X19, REG_X20, REG_SP, 64); - host_arm64_LDP_POSTIDX_X(block, REG_X21, REG_X22, REG_SP, 16); - host_arm64_LDP_POSTIDX_X(block, REG_X23, REG_X24, REG_SP, 16); - host_arm64_LDP_POSTIDX_X(block, REG_X25, REG_X26, REG_SP, 16); - host_arm64_LDP_POSTIDX_X(block, REG_X27, REG_X28, REG_SP, 16); - host_arm64_LDP_POSTIDX_X(block, REG_X29, REG_X30, REG_SP, 16); + host_arm64_LDP_POSTIDX_X(block, REG_X19, REG_X20, REG_XSP, 64); + host_arm64_LDP_POSTIDX_X(block, REG_X21, REG_X22, REG_XSP, 16); + host_arm64_LDP_POSTIDX_X(block, REG_X23, REG_X24, REG_XSP, 16); + host_arm64_LDP_POSTIDX_X(block, REG_X25, REG_X26, REG_XSP, 16); + host_arm64_LDP_POSTIDX_X(block, REG_X27, REG_X28, REG_XSP, 16); + host_arm64_LDP_POSTIDX_X(block, REG_X29, REG_X30, REG_XSP, 16); host_arm64_RET(block, REG_X30); block_write_data = NULL; @@ -349,12 +349,12 @@ void codegen_backend_prologue(codeblock_t *block) /*Entry code*/ - host_arm64_STP_PREIDX_X(block, REG_X29, REG_X30, REG_SP, -16); - host_arm64_STP_PREIDX_X(block, REG_X27, REG_X28, REG_SP, -16); - host_arm64_STP_PREIDX_X(block, REG_X25, REG_X26, REG_SP, -16); - host_arm64_STP_PREIDX_X(block, REG_X23, REG_X24, REG_SP, -16); - host_arm64_STP_PREIDX_X(block, REG_X21, REG_X22, REG_SP, -16); - host_arm64_STP_PREIDX_X(block, REG_X19, REG_X20, REG_SP, -64); + host_arm64_STP_PREIDX_X(block, REG_X29, REG_X30, REG_XSP, -16); + host_arm64_STP_PREIDX_X(block, REG_X27, REG_X28, REG_XSP, -16); + host_arm64_STP_PREIDX_X(block, REG_X25, REG_X26, REG_XSP, -16); + host_arm64_STP_PREIDX_X(block, REG_X23, REG_X24, REG_XSP, -16); + host_arm64_STP_PREIDX_X(block, REG_X21, REG_X22, REG_XSP, -16); + host_arm64_STP_PREIDX_X(block, REG_X19, REG_X20, REG_XSP, -64); host_arm64_MOVX_IMM(block, REG_CPUSTATE, (uint64_t)&cpu_state); @@ -362,18 +362,18 @@ void codegen_backend_prologue(codeblock_t *block) { host_arm64_LDR_IMM_W(block, REG_TEMP, REG_CPUSTATE, (uintptr_t)&cpu_state.TOP - (uintptr_t)&cpu_state); host_arm64_SUB_IMM(block, REG_TEMP, REG_TEMP, block->TOP); - host_arm64_STR_IMM_W(block, REG_TEMP, REG_SP, IREG_TOP_diff_stack_offset); + host_arm64_STR_IMM_W(block, REG_TEMP, REG_XSP, IREG_TOP_diff_stack_offset); } } void codegen_backend_epilogue(codeblock_t *block) { - host_arm64_LDP_POSTIDX_X(block, REG_X19, REG_X20, REG_SP, 64); - host_arm64_LDP_POSTIDX_X(block, REG_X21, REG_X22, REG_SP, 16); - host_arm64_LDP_POSTIDX_X(block, REG_X23, REG_X24, REG_SP, 16); - host_arm64_LDP_POSTIDX_X(block, REG_X25, REG_X26, REG_SP, 16); - host_arm64_LDP_POSTIDX_X(block, REG_X27, REG_X28, REG_SP, 16); - host_arm64_LDP_POSTIDX_X(block, REG_X29, REG_X30, REG_SP, 16); + host_arm64_LDP_POSTIDX_X(block, REG_X19, REG_X20, REG_XSP, 64); + host_arm64_LDP_POSTIDX_X(block, REG_X21, REG_X22, REG_XSP, 16); + host_arm64_LDP_POSTIDX_X(block, REG_X23, REG_X24, REG_XSP, 16); + host_arm64_LDP_POSTIDX_X(block, REG_X25, REG_X26, REG_XSP, 16); + host_arm64_LDP_POSTIDX_X(block, REG_X27, REG_X28, REG_XSP, 16); + host_arm64_LDP_POSTIDX_X(block, REG_X29, REG_X30, REG_XSP, 16); host_arm64_RET(block, REG_X30); codegen_allocator_clean_blocks(block->head_mem_block); diff --git a/src/codegen_backend_arm64_defs.h b/src/codegen_backend_arm64_defs.h index a265016..2df1e9f 100644 --- a/src/codegen_backend_arm64_defs.h +++ b/src/codegen_backend_arm64_defs.h @@ -97,7 +97,7 @@ #define REG_V30 30 #define REG_V31 31 -#define REG_SP 31 +#define REG_XSP 31 #define REG_ARG0 REG_X0 #define REG_ARG1 REG_X1 diff --git a/src/codegen_backend_arm64_uops.c b/src/codegen_backend_arm64_uops.c index d7fe7f6..458025b 100644 --- a/src/codegen_backend_arm64_uops.c +++ b/src/codegen_backend_arm64_uops.c @@ -3222,7 +3222,7 @@ void codegen_direct_read_double(codeblock_t *block, int host_reg, void *p) } void codegen_direct_read_st_8(codeblock_t *block, int host_reg, void *base, int reg_idx) { - host_arm64_LDR_IMM_W(block, REG_TEMP, REG_SP, IREG_TOP_diff_stack_offset); + host_arm64_LDR_IMM_W(block, REG_TEMP, REG_XSP, IREG_TOP_diff_stack_offset); host_arm64_ADD_IMM(block, REG_TEMP, REG_TEMP, reg_idx); host_arm64_ADDX_IMM(block, REG_TEMP2, REG_CPUSTATE, (uintptr_t)base - (uintptr_t)&cpu_state); host_arm64_AND_IMM(block, REG_TEMP, REG_TEMP, 7); @@ -3230,7 +3230,7 @@ void codegen_direct_read_st_8(codeblock_t *block, int host_reg, void *base, int } void codegen_direct_read_st_64(codeblock_t *block, int host_reg, void *base, int reg_idx) { - host_arm64_LDR_IMM_W(block, REG_TEMP, REG_SP, IREG_TOP_diff_stack_offset); + host_arm64_LDR_IMM_W(block, REG_TEMP, REG_XSP, IREG_TOP_diff_stack_offset); host_arm64_ADD_IMM(block, REG_TEMP, REG_TEMP, reg_idx); host_arm64_ADDX_IMM(block, REG_TEMP2, REG_CPUSTATE, (uintptr_t)base - (uintptr_t)&cpu_state); host_arm64_AND_IMM(block, REG_TEMP, REG_TEMP, 7); @@ -3238,7 +3238,7 @@ void codegen_direct_read_st_64(codeblock_t *block, int host_reg, void *base, int } void codegen_direct_read_st_double(codeblock_t *block, int host_reg, void *base, int reg_idx) { - host_arm64_LDR_IMM_W(block, REG_TEMP, REG_SP, IREG_TOP_diff_stack_offset); + host_arm64_LDR_IMM_W(block, REG_TEMP, REG_XSP, IREG_TOP_diff_stack_offset); host_arm64_ADD_IMM(block, REG_TEMP, REG_TEMP, reg_idx); host_arm64_ADDX_IMM(block, REG_TEMP2, REG_CPUSTATE, (uintptr_t)base - (uintptr_t)&cpu_state); host_arm64_AND_IMM(block, REG_TEMP, REG_TEMP, 7); @@ -3282,7 +3282,7 @@ void codegen_direct_write_double(codeblock_t *block, void *p, int host_reg) } void codegen_direct_write_st_8(codeblock_t *block, void *base, int reg_idx, int host_reg) { - host_arm64_LDR_IMM_W(block, REG_TEMP, REG_SP, IREG_TOP_diff_stack_offset); + host_arm64_LDR_IMM_W(block, REG_TEMP, REG_XSP, IREG_TOP_diff_stack_offset); host_arm64_ADD_IMM(block, REG_TEMP, REG_TEMP, reg_idx); host_arm64_ADDX_IMM(block, REG_TEMP2, REG_CPUSTATE, (uintptr_t)base - (uintptr_t)&cpu_state); host_arm64_AND_IMM(block, REG_TEMP, REG_TEMP, 7); @@ -3290,7 +3290,7 @@ void codegen_direct_write_st_8(codeblock_t *block, void *base, int reg_idx, int } void codegen_direct_write_st_64(codeblock_t *block, void *base, int reg_idx, int host_reg) { - host_arm64_LDR_IMM_W(block, REG_TEMP, REG_SP, IREG_TOP_diff_stack_offset); + host_arm64_LDR_IMM_W(block, REG_TEMP, REG_XSP, IREG_TOP_diff_stack_offset); host_arm64_ADD_IMM(block, REG_TEMP, REG_TEMP, reg_idx); host_arm64_ADDX_IMM(block, REG_TEMP2, REG_CPUSTATE, (uintptr_t)base - (uintptr_t)&cpu_state); host_arm64_AND_IMM(block, REG_TEMP, REG_TEMP, 7); @@ -3298,7 +3298,7 @@ void codegen_direct_write_st_64(codeblock_t *block, void *base, int reg_idx, int } void codegen_direct_write_st_double(codeblock_t *block, void *base, int reg_idx, int host_reg) { - host_arm64_LDR_IMM_W(block, REG_TEMP, REG_SP, IREG_TOP_diff_stack_offset); + host_arm64_LDR_IMM_W(block, REG_TEMP, REG_XSP, IREG_TOP_diff_stack_offset); host_arm64_ADD_IMM(block, REG_TEMP, REG_TEMP, reg_idx); host_arm64_ADDX_IMM(block, REG_TEMP2, REG_CPUSTATE, (uintptr_t)base - (uintptr_t)&cpu_state); host_arm64_AND_IMM(block, REG_TEMP, REG_TEMP, 7); @@ -3316,47 +3316,47 @@ void codegen_direct_write_ptr(codeblock_t *block, void *p, int host_reg) void codegen_direct_read_16_stack(codeblock_t *block, int host_reg, int stack_offset) { if (in_range12_h(stack_offset)) - host_arm64_LDRH_IMM(block, host_reg, REG_SP, stack_offset); + host_arm64_LDRH_IMM(block, host_reg, REG_XSP, stack_offset); else fatal("codegen_direct_read_32_stack - not in range\n"); } void codegen_direct_read_32_stack(codeblock_t *block, int host_reg, int stack_offset) { if (in_range12_w(stack_offset)) - host_arm64_LDR_IMM_W(block, host_reg, REG_SP, stack_offset); + host_arm64_LDR_IMM_W(block, host_reg, REG_XSP, stack_offset); else fatal("codegen_direct_read_32_stack - not in range\n"); } void codegen_direct_read_pointer_stack(codeblock_t *block, int host_reg, int stack_offset) { if (in_range12_q(stack_offset)) - host_arm64_LDR_IMM_X(block, host_reg, REG_SP, stack_offset); + host_arm64_LDR_IMM_X(block, host_reg, REG_XSP, stack_offset); else fatal("codegen_direct_read_pointer_stack - not in range\n"); } void codegen_direct_read_64_stack(codeblock_t *block, int host_reg, int stack_offset) { - host_arm64_LDR_IMM_F64(block, host_reg, REG_SP, stack_offset); + host_arm64_LDR_IMM_F64(block, host_reg, REG_XSP, stack_offset); } void codegen_direct_read_double_stack(codeblock_t *block, int host_reg, int stack_offset) { - host_arm64_LDR_IMM_F64(block, host_reg, REG_SP, stack_offset); + host_arm64_LDR_IMM_F64(block, host_reg, REG_XSP, stack_offset); } void codegen_direct_write_32_stack(codeblock_t *block, int stack_offset, int host_reg) { if (in_range12_w(stack_offset)) - host_arm64_STR_IMM_W(block, host_reg, REG_SP, stack_offset); + host_arm64_STR_IMM_W(block, host_reg, REG_XSP, stack_offset); else fatal("codegen_direct_write_32_stack - not in range\n"); } void codegen_direct_write_64_stack(codeblock_t *block, int stack_offset, int host_reg) { - host_arm64_STR_IMM_F64(block, host_reg, REG_SP, stack_offset); + host_arm64_STR_IMM_F64(block, host_reg, REG_XSP, stack_offset); } void codegen_direct_write_double_stack(codeblock_t *block, int stack_offset, int host_reg) { - host_arm64_STR_IMM_F64(block, host_reg, REG_SP, stack_offset); + host_arm64_STR_IMM_F64(block, host_reg, REG_XSP, stack_offset); } void codegen_set_jump_dest(codeblock_t *block, void *p)