Added recompiled register versions of FADDP, FDIVP, FDIVRP, FMULP, FSUBP and FSUBRP.

This commit is contained in:
SarahW 2018-10-08 21:44:30 +01:00
commit 305b6cc4fd
10 changed files with 190 additions and 65 deletions

View file

@ -335,8 +335,8 @@ static int opFLD(uint32_t fetchdat)
old_tag = cpu_state.tag[(cpu_state.TOP + fetchdat) & 7];
old_i64 = cpu_state.MM[(cpu_state.TOP + fetchdat) & 7].q;
x87_push(ST(fetchdat&7));
cpu_state.tag[cpu_state.TOP] = old_tag;
cpu_state.MM[cpu_state.TOP].q = old_i64;
cpu_state.tag[cpu_state.TOP&7] = old_tag;
cpu_state.MM[cpu_state.TOP&7].q = old_i64;
CLOCK_CYCLES(4);
return 0;
}
@ -352,11 +352,11 @@ static int opFXCH(uint32_t fetchdat)
td = ST(0);
ST(0) = ST(fetchdat&7);
ST(fetchdat&7) = td;
old_tag = cpu_state.tag[cpu_state.TOP];
cpu_state.tag[cpu_state.TOP] = cpu_state.tag[(cpu_state.TOP + fetchdat) & 7];
old_tag = cpu_state.tag[cpu_state.TOP&7];
cpu_state.tag[cpu_state.TOP&7] = cpu_state.tag[(cpu_state.TOP + fetchdat) & 7];
cpu_state.tag[(cpu_state.TOP + fetchdat) & 7] = old_tag;
old_i64 = cpu_state.MM[cpu_state.TOP].q;
cpu_state.MM[cpu_state.TOP].q = cpu_state.MM[(cpu_state.TOP + fetchdat) & 7].q;
old_i64 = cpu_state.MM[cpu_state.TOP&7].q;
cpu_state.MM[cpu_state.TOP&7].q = cpu_state.MM[(cpu_state.TOP + fetchdat) & 7].q;
cpu_state.MM[(cpu_state.TOP + fetchdat) & 7].q = old_i64;
CLOCK_CYCLES(4);
@ -369,7 +369,7 @@ static int opFCHS(uint32_t fetchdat)
cpu_state.pc++;
if (fplog) pclog("FCHS\n");
ST(0) = -ST(0);
cpu_state.tag[cpu_state.TOP] = TAG_VALID;
cpu_state.tag[cpu_state.TOP&7] = TAG_VALID;
CLOCK_CYCLES(6);
return 0;
}
@ -380,7 +380,7 @@ static int opFABS(uint32_t fetchdat)
cpu_state.pc++;
if (fplog) pclog("FABS %f\n", ST(0));
ST(0) = fabs(ST(0));
cpu_state.tag[cpu_state.TOP] = TAG_VALID;
cpu_state.tag[cpu_state.TOP&7] = TAG_VALID;
CLOCK_CYCLES(3);
return 0;
}
@ -488,7 +488,7 @@ static int opF2XM1(uint32_t fetchdat)
cpu_state.pc++;
if (fplog) pclog("F2XM1\n");
ST(0) = pow(2.0, ST(0)) - 1.0;
cpu_state.tag[cpu_state.TOP] = TAG_VALID;
cpu_state.tag[cpu_state.TOP&7] = TAG_VALID;
CLOCK_CYCLES(200);
return 0;
}
@ -523,7 +523,7 @@ static int opFPTAN(uint32_t fetchdat)
cpu_state.pc++;
if (fplog) pclog("FPTAN\n");
ST(0) = tan(ST(0));
cpu_state.tag[cpu_state.TOP] = TAG_VALID;
cpu_state.tag[cpu_state.TOP&7] = TAG_VALID;
x87_push(1.0);
cpu_state.npxs &= ~C2;
CLOCK_CYCLES(235);
@ -547,7 +547,7 @@ static int opFDECSTP(uint32_t fetchdat)
FP_ENTER();
cpu_state.pc++;
if (fplog) pclog("FDECSTP\n");
cpu_state.TOP = (cpu_state.TOP - 1) & 7;
cpu_state.TOP--;
CLOCK_CYCLES(4);
return 0;
}
@ -557,7 +557,7 @@ static int opFINCSTP(uint32_t fetchdat)
FP_ENTER();
cpu_state.pc++;
if (fplog) pclog("FDECSTP\n");
cpu_state.TOP = (cpu_state.TOP + 1) & 7;
cpu_state.TOP++;
CLOCK_CYCLES(4);
return 0;
}
@ -570,7 +570,7 @@ static int opFPREM(uint32_t fetchdat)
if (fplog) pclog("FPREM %f %f ", ST(0), ST(1));
temp64 = (int64_t)(ST(0) / ST(1));
ST(0) = ST(0) - (ST(1) * (double)temp64);
cpu_state.tag[cpu_state.TOP] = TAG_VALID;
cpu_state.tag[cpu_state.TOP&7] = TAG_VALID;
if (fplog) pclog("%f\n", ST(0));
cpu_state.npxs &= ~(C0|C1|C2|C3);
if (temp64 & 4) cpu_state.npxs|=C0;
@ -587,7 +587,7 @@ static int opFPREM1(uint32_t fetchdat)
if (fplog) pclog("FPREM1 %f %f ", ST(0), ST(1));
temp64 = (int64_t)(ST(0) / ST(1));
ST(0) = ST(0) - (ST(1) * (double)temp64);
cpu_state.tag[cpu_state.TOP] = TAG_VALID;
cpu_state.tag[cpu_state.TOP&7] = TAG_VALID;
if (fplog) pclog("%f\n", ST(0));
cpu_state.npxs &= ~(C0|C1|C2|C3);
if (temp64 & 4) cpu_state.npxs|=C0;
@ -603,7 +603,7 @@ static int opFSQRT(uint32_t fetchdat)
cpu_state.pc++;
if (fplog) pclog("FSQRT\n");
ST(0) = sqrt(ST(0));
cpu_state.tag[cpu_state.TOP] = TAG_VALID;
cpu_state.tag[cpu_state.TOP&7] = TAG_VALID;
CLOCK_CYCLES(83);
return 0;
}
@ -616,7 +616,7 @@ static int opFSINCOS(uint32_t fetchdat)
if (fplog) pclog("FSINCOS\n");
td = ST(0);
ST(0) = sin(td);
cpu_state.tag[cpu_state.TOP] = TAG_VALID;
cpu_state.tag[cpu_state.TOP&7] = TAG_VALID;
x87_push(cos(td));
cpu_state.npxs &= ~C2;
CLOCK_CYCLES(330);
@ -629,7 +629,7 @@ static int opFRNDINT(uint32_t fetchdat)
cpu_state.pc++;
if (fplog) pclog("FRNDINT %g ", ST(0));
ST(0) = (double)x87_fround(ST(0));
cpu_state.tag[cpu_state.TOP] = TAG_VALID;
cpu_state.tag[cpu_state.TOP&7] = TAG_VALID;
if (fplog) pclog("%g\n", ST(0));
CLOCK_CYCLES(21);
return 0;
@ -643,7 +643,7 @@ static int opFSCALE(uint32_t fetchdat)
if (fplog) pclog("FSCALE\n");
temp64 = (int64_t)ST(1);
ST(0) = ST(0) * pow(2.0, (double)temp64);
cpu_state.tag[cpu_state.TOP] = TAG_VALID;
cpu_state.tag[cpu_state.TOP&7] = TAG_VALID;
CLOCK_CYCLES(30);
return 0;
}
@ -654,7 +654,7 @@ static int opFSIN(uint32_t fetchdat)
cpu_state.pc++;
if (fplog) pclog("FSIN\n");
ST(0) = sin(ST(0));
cpu_state.tag[cpu_state.TOP] = TAG_VALID;
cpu_state.tag[cpu_state.TOP&7] = TAG_VALID;
cpu_state.npxs &= ~C2;
CLOCK_CYCLES(300);
return 0;
@ -666,7 +666,7 @@ static int opFCOS(uint32_t fetchdat)
cpu_state.pc++;
if (fplog) pclog("FCOS\n");
ST(0) = cos(ST(0));
cpu_state.tag[cpu_state.TOP] = TAG_VALID;
cpu_state.tag[cpu_state.TOP&7] = TAG_VALID;
cpu_state.npxs &= ~C2;
CLOCK_CYCLES(300);
return 0;
@ -836,8 +836,8 @@ static int opFSTCW_a32(uint32_t fetchdat)
if (fplog) pclog("FCMOV %f\n", ST(fetchdat & 7)); \
if (cond_ ## condition) \
{ \
cpu_state.tag[cpu_state.TOP] = cpu_state.tag[(cpu_state.TOP + fetchdat) & 7]; \
cpu_state.MM[cpu_state.TOP].q = cpu_state.MM[(cpu_state.TOP + fetchdat) & 7].q; \
cpu_state.tag[cpu_state.TOP&7] = cpu_state.tag[(cpu_state.TOP + fetchdat) & 7]; \
cpu_state.MM[cpu_state.TOP&7].q = cpu_state.MM[(cpu_state.TOP + fetchdat) & 7].q; \
ST(0) = ST(fetchdat & 7); \
} \
CLOCK_CYCLES(4); \