Implemented preliminary S3 ViRGE 2D blitter emulation.
Misc ViRGE fixes. Changes to memory mapping. Changes to PCI handling. Disabled 'AMI WinBIOS 486 PCI' due to incomplete chipset emulation. Invalid GUS register reads no longer kill the emulator.
This commit is contained in:
TomW
parent
4c4b3df51f
commit
2ca4ead570
49 changed files with 2078 additions and 700 deletions
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@ -5,6 +5,7 @@
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#include "io.h"
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#include "mem.h"
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#include "pci.h"
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#include "rom.h"
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#include "video.h"
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#include "vid_svga.h"
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#include "vid_ati68860_ramdac.h"
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@ -25,8 +26,12 @@ typedef struct mach64_t
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ics2595_t ics2595;
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svga_t svga;
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rom_t bios_rom;
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uint8_t regs[256];
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int index;
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uint8_t pci_regs[256];
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int bank_r[2];
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int bank_w[2];
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@ -338,6 +343,16 @@ void mach64_updatemapping(mach64_t *mach64)
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{
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svga_t *svga = &mach64->svga;
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if (!(mach64->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_MEM))
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{
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pclog("Update mapping - PCI disabled\n");
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mem_mapping_disable(&svga->mapping);
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mem_mapping_disable(&mach64->linear_mapping);
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mem_mapping_disable(&mach64->mmio_mapping);
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mem_mapping_disable(&mach64->mmio_linear_mapping);
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return;
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}
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mem_mapping_disable(&mach64->mmio_mapping);
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// pclog("Write mapping %02X\n", val);
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switch (svga->gdcreg[6] & 0xc)
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@ -1835,9 +1850,13 @@ uint16_t mach64_ext_inw(uint16_t port, void *p)
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switch (port)
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{
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default:
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#ifdef MACH64_DEBUG
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pclog(" ");
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#endif
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ret = mach64_ext_inb(port, p);
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#ifdef MACH64_DEBUG
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pclog(" ");
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#endif
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ret |= (mach64_ext_inb(port + 1, p) << 8);
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break;
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}
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@ -1860,9 +1879,13 @@ uint32_t mach64_ext_inl(uint16_t port, void *p)
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break;
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default:
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#ifdef MACH64_DEBUG
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pclog(" ");
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#endif
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ret = mach64_ext_inw(port, p);
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#ifdef MACH64_DEBUG
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pclog(" ");
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#endif
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ret |= (mach64_ext_inw(port + 2, p) << 16);
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break;
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}
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@ -2053,6 +2076,42 @@ void mach64_hwcursor_draw(svga_t *svga, int displine)
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svga->hwcursor_latch.addr += 16;
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}
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static void mach64_io_remove(mach64_t *mach64)
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{
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int c;
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io_removehandler(0x03c0, 0x0020, mach64_in, NULL, NULL, mach64_out, NULL, NULL, mach64);
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for (c = 0; c < 8; c++)
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{
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io_removehandler((c * 0x1000) + 0x2ec, 0x0004, mach64_ext_inb, mach64_ext_inw, mach64_ext_inl, mach64_ext_outb, mach64_ext_outw, mach64_ext_outl, mach64);
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io_removehandler((c * 0x1000) + 0x6ec, 0x0004, mach64_ext_inb, mach64_ext_inw, mach64_ext_inl, mach64_ext_outb, mach64_ext_outw, mach64_ext_outl, mach64);
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io_removehandler((c * 0x1000) + 0xaec, 0x0004, mach64_ext_inb, mach64_ext_inw, mach64_ext_inl, mach64_ext_outb, mach64_ext_outw, mach64_ext_outl, mach64);
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io_removehandler((c * 0x1000) + 0xeec, 0x0004, mach64_ext_inb, mach64_ext_inw, mach64_ext_inl, mach64_ext_outb, mach64_ext_outw, mach64_ext_outl, mach64);
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}
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io_removehandler(0x01ce, 0x0002, mach64_in, NULL, NULL, mach64_out, NULL, NULL, mach64);
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}
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static void mach64_io_set(mach64_t *mach64)
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{
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int c;
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mach64_io_remove(mach64);
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io_sethandler(0x03c0, 0x0020, mach64_in, NULL, NULL, mach64_out, NULL, NULL, mach64);
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for (c = 0; c < 8; c++)
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{
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io_sethandler((c * 0x1000) + 0x2ec, 0x0004, mach64_ext_inb, mach64_ext_inw, mach64_ext_inl, mach64_ext_outb, mach64_ext_outw, mach64_ext_outl, mach64);
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io_sethandler((c * 0x1000) + 0x6ec, 0x0004, mach64_ext_inb, mach64_ext_inw, mach64_ext_inl, mach64_ext_outb, mach64_ext_outw, mach64_ext_outl, mach64);
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io_sethandler((c * 0x1000) + 0xaec, 0x0004, mach64_ext_inb, mach64_ext_inw, mach64_ext_inl, mach64_ext_outb, mach64_ext_outw, mach64_ext_outl, mach64);
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io_sethandler((c * 0x1000) + 0xeec, 0x0004, mach64_ext_inb, mach64_ext_inw, mach64_ext_inl, mach64_ext_outb, mach64_ext_outw, mach64_ext_outl, mach64);
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}
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io_sethandler(0x01ce, 0x0002, mach64_in, NULL, NULL, mach64_out, NULL, NULL, mach64);
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}
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uint8_t mach64_pci_read(int func, int addr, void *p)
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{
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mach64_t *mach64 = (mach64_t *)p;
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@ -2068,7 +2127,8 @@ uint8_t mach64_pci_read(int func, int addr, void *p)
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case 0x02: return 'X'; /*88800GX*/
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case 0x03: return 'G';
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case 0x04: return 0x03; /*Respond to IO and memory accesses*/
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case PCI_REG_COMMAND:
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return mach64->pci_regs[PCI_REG_COMMAND]; /*Respond to IO and memory accesses*/
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case 0x07: return 1 << 1; /*Medium DEVSEL timing*/
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@ -2083,10 +2143,10 @@ uint8_t mach64_pci_read(int func, int addr, void *p)
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case 0x12: return mach64->linear_base >> 16;
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case 0x13: return mach64->linear_base >> 24;
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case 0x30: return 0x01; /*BIOS ROM address*/
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case 0x30: return mach64->pci_regs[0x30] & 0x01; /*BIOS ROM address*/
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case 0x31: return 0x00;
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case 0x32: return 0x0C;
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case 0x33: return 0x00;
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case 0x32: return mach64->pci_regs[0x32];
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case 0x33: return mach64->pci_regs[0x33];
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}
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return 0;
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}
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@ -2099,6 +2159,15 @@ void mach64_pci_write(int func, int addr, uint8_t val, void *p)
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switch (addr)
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{
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case PCI_REG_COMMAND:
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mach64->pci_regs[PCI_REG_COMMAND] = val & 0x27;
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if (val & PCI_COMMAND_IO)
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mach64_io_set(mach64);
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else
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mach64_io_remove(mach64);
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mach64_updatemapping(mach64);
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break;
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case 0x12:
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mach64->linear_base = (mach64->linear_base & 0xff000000) | ((val & 0x80) << 16);
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mach64_updatemapping(mach64);
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@ -2107,6 +2176,21 @@ void mach64_pci_write(int func, int addr, uint8_t val, void *p)
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mach64->linear_base = (mach64->linear_base & 0x800000) | (val << 24);
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mach64_updatemapping(mach64);
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break;
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case 0x30: case 0x32: case 0x33:
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mach64->pci_regs[addr] = val;
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if (mach64->pci_regs[0x30] & 0x01)
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{
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uint32_t addr = (mach64->pci_regs[0x32] << 16) | (mach64->pci_regs[0x33] << 24);
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pclog("Mach64 bios_rom enabled at %08x\n", addr);
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mem_mapping_set_addr(&mach64->bios_rom.mapping, addr, 0x8000);
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}
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else
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{
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pclog("Mach64 bios_rom disabled\n");
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mem_mapping_disable(&mach64->bios_rom.mapping);
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}
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return;
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}
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}
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@ -2121,24 +2205,23 @@ void *mach64gx_init()
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mach64_in, mach64_out,
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mach64_hwcursor_draw);
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mem_mapping_add(&mach64->linear_mapping, 0, 0, svga_read_linear, svga_readw_linear, svga_readl_linear, svga_write_linear, svga_writew_linear, svga_writel_linear, &mach64->svga);
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mem_mapping_add(&mach64->mmio_linear_mapping, 0, 0, mach64_ext_readb, mach64_ext_readw, mach64_ext_readl, mach64_ext_writeb, mach64_ext_writew, mach64_ext_writel, mach64);
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mem_mapping_add(&mach64->mmio_mapping, 0xbc000, 0x04000, mach64_ext_readb, mach64_ext_readw, mach64_ext_readl, mach64_ext_writeb, mach64_ext_writew, mach64_ext_writel, mach64);
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rom_init(&mach64->bios_rom, "roms/mach64gx/bios.bin", 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
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if (PCI)
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mem_mapping_disable(&mach64->bios_rom.mapping);
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mem_mapping_add(&mach64->linear_mapping, 0, 0, svga_read_linear, svga_readw_linear, svga_readl_linear, svga_write_linear, svga_writew_linear, svga_writel_linear, NULL, 0, &mach64->svga);
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mem_mapping_add(&mach64->mmio_linear_mapping, 0, 0, mach64_ext_readb, mach64_ext_readw, mach64_ext_readl, mach64_ext_writeb, mach64_ext_writew, mach64_ext_writel, NULL, 0, mach64);
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mem_mapping_add(&mach64->mmio_mapping, 0xbc000, 0x04000, mach64_ext_readb, mach64_ext_readw, mach64_ext_readl, mach64_ext_writeb, mach64_ext_writew, mach64_ext_writel, NULL, 0, mach64);
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mem_mapping_disable(&mach64->mmio_mapping);
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io_sethandler(0x03c0, 0x0020, mach64_in, NULL, NULL, mach64_out, NULL, NULL, mach64);
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for (c = 0; c < 8; c++)
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{
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io_sethandler((c * 0x1000) + 0x2ec, 0x0004, mach64_ext_inb, mach64_ext_inw, mach64_ext_inl, mach64_ext_outb, mach64_ext_outw, mach64_ext_outl, mach64);
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io_sethandler((c * 0x1000) + 0x6ec, 0x0004, mach64_ext_inb, mach64_ext_inw, mach64_ext_inl, mach64_ext_outb, mach64_ext_outw, mach64_ext_outl, mach64);
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io_sethandler((c * 0x1000) + 0xaec, 0x0004, mach64_ext_inb, mach64_ext_inw, mach64_ext_inl, mach64_ext_outb, mach64_ext_outw, mach64_ext_outl, mach64);
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io_sethandler((c * 0x1000) + 0xeec, 0x0004, mach64_ext_inb, mach64_ext_inw, mach64_ext_inl, mach64_ext_outb, mach64_ext_outw, mach64_ext_outl, mach64);
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}
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io_sethandler(0x01ce, 0x0002, mach64_in, NULL, NULL, mach64_out, NULL, NULL, mach64);
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mach64_io_set(mach64);
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pci_add(mach64_pci_read, mach64_pci_write, mach64);
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mach64->pci_regs[PCI_REG_COMMAND] = 3;
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mach64->pci_regs[0x30] = 0x00;
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mach64->pci_regs[0x32] = 0x0c;
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mach64->pci_regs[0x33] = 0x00;
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ati_eeprom_load(&mach64->eeprom, "mach64.nvr", 1);
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@ -2149,6 +2232,11 @@ void *mach64gx_init()
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return mach64;
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}
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int mach64gx_available()
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{
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return rom_present("roms/mach64gx/bios.bin");
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}
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void mach64_close(void *p)
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{
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mach64_t *mach64 = (mach64_t *)p;
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@ -2225,7 +2313,7 @@ device_t mach64gx_device =
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0,
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mach64gx_init,
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mach64_close,
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NULL,
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mach64gx_available,
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mach64_speed_changed,
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mach64_force_redraw,
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mach64_add_status_info
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