From 2905c43db8db5b795a00d03efd2fe31306e42bae Mon Sep 17 00:00:00 2001 From: TomW Date: Wed, 12 Nov 2014 19:33:49 +0000 Subject: [PATCH] Cycle counts for recompiled blocks now generated at compile time. --- src/386.c | 3 + src/386_dynarec.c | 2 + src/386_dynarec_ops.c | 2 + src/386_ops.h | 2 +- src/Makefile.mingw | 2 +- src/codegen.h | 7 + src/codegen_timing_486.c | 365 +++++++++++++++++++++++++++++++++++++++ src/codegen_x86.c | 57 +++--- src/x86_ops_arith.h | 134 +++++++------- src/x86_ops_atomic.h | 18 +- src/x86_ops_bcd.h | 12 +- src/x86_ops_bit.h | 32 ++-- src/x86_ops_bitscan.h | 18 +- src/x86_ops_call.h | 76 ++++---- src/x86_ops_flag.h | 28 +-- src/x86_ops_fpu.h | 2 +- src/x86_ops_inc_dec.h | 6 +- src/x86_ops_int.h | 4 +- src/x86_ops_io.h | 24 +-- src/x86_ops_jump.h | 54 +++--- src/x86_ops_misc.h | 136 +++++++-------- src/x86_ops_mmx.h | 6 +- src/x86_ops_mmx_arith.h | 16 +- src/x86_ops_mmx_mov.h | 32 ++-- src/x86_ops_mmx_pack.h | 8 +- src/x86_ops_mmx_shift.h | 10 +- src/x86_ops_mov.h | 144 +++++++-------- src/x86_ops_mov_ctrl.h | 24 +-- src/x86_ops_mov_seg.h | 36 ++-- src/x86_ops_movx.h | 28 +-- src/x86_ops_msr.h | 2 +- src/x86_ops_mul.h | 24 +-- src/x86_ops_pmode.h | 34 ++-- src/x86_ops_prefix.h | 12 +- src/x86_ops_ret.h | 10 +- src/x86_ops_set.h | 4 +- src/x86_ops_shift.h | 62 +++---- src/x86_ops_stack.h | 72 ++++---- src/x86_ops_string.h | 84 ++++----- src/x86_ops_xchg.h | 42 ++--- src/x87_ops_arith.h | 72 ++++---- src/x87_ops_loadstore.h | 68 ++++---- src/x87_ops_misc.h | 98 ++++++----- 43 files changed, 1142 insertions(+), 730 deletions(-) create mode 100644 src/codegen_timing_486.c diff --git a/src/386.c b/src/386.c index 2ba378c..9c2bf81 100644 --- a/src/386.c +++ b/src/386.c @@ -1079,6 +1079,9 @@ int dontprint=0; #define OP_TABLE(name) ops_ ## name +#define CLOCK_CYCLES(c) cycles -= (c) +#define CLOCK_CYCLES_ALWAYS(c) cycles -= (c) + #include "386_ops.h" #undef NOTRM diff --git a/src/386_dynarec.c b/src/386_dynarec.c index 5906d50..1756333 100644 --- a/src/386_dynarec.c +++ b/src/386_dynarec.c @@ -1152,6 +1152,8 @@ uint32_t testr[9]; int dontprint=0; #define OP_TABLE(name) ops_ ## name +#define CLOCK_CYCLES(c) cycles -= (c) +#define CLOCK_CYCLES_ALWAYS(c) cycles -= (c) #include "386_ops.h" diff --git a/src/386_dynarec_ops.c b/src/386_dynarec_ops.c index 89b9df2..07b73c0 100644 --- a/src/386_dynarec_ops.c +++ b/src/386_dynarec_ops.c @@ -134,6 +134,8 @@ static inline void fetch_ea_16_long(uint32_t rmdat) #define fetch_ea_32(rmdat) pc++; mod=(rmdat >> 6) & 3; reg=(rmdat >> 3) & 7; rm = rmdat & 7; if (mod != 3) { fetch_ea_32_long(rmdat); } if (abrt) return 1 #define OP_TABLE(name) dynarec_ops_ ## name +#define CLOCK_CYCLES(c) +#define CLOCK_CYCLES_ALWAYS(c) cycles -= (c) #include "386_ops.h" #endif diff --git a/src/386_ops.h b/src/386_ops.h index b3f8a4b..a06dbd1 100644 --- a/src/386_ops.h +++ b/src/386_ops.h @@ -553,7 +553,7 @@ OpFn OP_TABLE(386)[1024] = /*40*/ opINC_AX, opINC_CX, opINC_DX, opINC_BX, opINC_SP, opINC_BP, opINC_SI, opINC_DI, opDEC_AX, opDEC_CX, opDEC_DX, opDEC_BX, opDEC_SP, opDEC_BP, opDEC_SI, opDEC_DI, /*50*/ opPUSH_AX, opPUSH_CX, opPUSH_DX, opPUSH_BX, opPUSH_SP, opPUSH_BP, opPUSH_SI, opPUSH_DI, opPOP_AX, opPOP_CX, opPOP_DX, opPOP_BX, opPOP_SP, opPOP_BP, opPOP_SI, opPOP_DI, -/*60*/ opPUSHA_w, opPOPA_w, opBOUND_w_a16, opARPL_a16, opFS_w_a16, opGS_w_a16, op_66, op_67, opPUSH_imm_w, opIMUL_w_iw_a16,opPUSH_imm_bw, opIMUL_w_ib_a16,opINSB_a16, opINSW_a16, opOUTSB_a16, opOUTSW_a16, +/*60*/ opPUSHA_w, opPOPA_w, opBOUND_w_a16, opARPL_a16, opFS_w_a16, opGS_w_a16, op_66, op_67, opPUSH_imm_w, opIMUL_w_iw_a16,opPUSH_imm_bw, opIMUL_w_ib_a16,opINSB_a16, opINSW_a16, opOUTSB_a16, opOUTSW_a16, /*70*/ opJO, opJNO, opJB, opJNB, opJE, opJNE, opJBE, opJNBE, opJS, opJNS, opJP, opJNP, opJL, opJNL, opJLE, opJNLE, /*80*/ op80_a16, op81_w_a16, op80_a16, op83_w_a16, opTEST_b_a16, opTEST_w_a16, opXCHG_b_a16, opXCHG_w_a16, opMOV_b_r_a16, opMOV_w_r_a16, opMOV_r_b_a16, opMOV_r_w_a16, opMOV_w_seg_a16,opLEA_w_a16, opMOV_seg_w_a16,opPOPW_a16, diff --git a/src/Makefile.mingw b/src/Makefile.mingw index 8c8cac0..7a13b37 100644 --- a/src/Makefile.mingw +++ b/src/Makefile.mingw @@ -4,7 +4,7 @@ CC = gcc.exe WINDRES = windres.exe CFLAGS = -O3 -march=i686 -fomit-frame-pointer OBJ = 386.o 386_dynarec.o 386_dynarec_ops.o 808x.o acer386sx.o ali1429.o amstrad.o cdrom-ioctl.o \ - codegen_x86.o config.o cpu.o dac.o device.o dma.o fdc.o gameport.o \ + codegen_timing_486.o codegen_x86.o config.o cpu.o dac.o device.o dma.o fdc.o gameport.o \ headland.o i430vx.o ide.o io.o jim.o keyboard.o keyboard_amstrad.o keyboard_at.o \ keyboard_olim24.o keyboard_pcjr.o keyboard_xt.o lpt.o mcr.o mem.o model.o \ mouse.o mouse_ps2.o mouse_serial.o neat.o nmi.o nvr.o olivetti_m24.o \ diff --git a/src/codegen.h b/src/codegen.h index 20c00cb..6e07b05 100644 --- a/src/codegen.h +++ b/src/codegen.h @@ -50,4 +50,11 @@ extern int cpu_recomp_removed, cpu_recomp_removed_latched; extern int cpu_reps, cpu_reps_latched; extern int cpu_notreps, cpu_notreps_latched; +extern int codegen_block_cycles; + +void codegen_timing_start(); +void codegen_timing_prefix(uint8_t prefix); +void codegen_timing_opcode(uint8_t opcode, uint32_t fetchdat, int op_32); +void codegen_timing_block_end(); + #endif diff --git a/src/codegen_timing_486.c b/src/codegen_timing_486.c new file mode 100644 index 0000000..b258795 --- /dev/null +++ b/src/codegen_timing_486.c @@ -0,0 +1,365 @@ +#ifdef DYNAREC + +#include "ibm.h" +#include "cpu.h" +#include "x86.h" +#include "x86_ops.h" +#include "x87.h" +#include "codegen.h" + +#define CYCLES(c) (int *)c +#define CYCLES2(c16, c32) (int *)((-1 & ~0xffff) | c16 | (c32 << 8)) + +static int *opcode_timings[256] = +{ +/*00*/ &timing_mr, &timing_mr, &timing_rm, &timing_rm, &timing_rr, &timing_rr, CYCLES(2), CYCLES(3), &timing_mr, &timing_mr, &timing_rm, &timing_rm, &timing_rr, &timing_rr, CYCLES(2), NULL, +/*10*/ &timing_mr, &timing_mr, &timing_rm, &timing_rm, &timing_rr, &timing_rr, CYCLES(2), CYCLES(3), &timing_mr, &timing_mr, &timing_rm, &timing_rm, &timing_rr, &timing_rr, CYCLES(2), CYCLES(3), +/*20*/ &timing_mr, &timing_mr, &timing_rm, &timing_rm, &timing_rr, &timing_rr, CYCLES(4), CYCLES(3), &timing_mr, &timing_mr, &timing_rm, &timing_rm, &timing_rr, &timing_rr, CYCLES(4), CYCLES(3), +/*30*/ &timing_mr, &timing_mr, &timing_rm, &timing_rm, &timing_rr, &timing_rr, CYCLES(4), CYCLES(2), &timing_mr, &timing_mr, &timing_rm, &timing_rm, &timing_rr, &timing_rr, CYCLES(4), CYCLES(2), + +/*40*/ &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, +/*50*/ CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), +/*60*/ CYCLES(11), CYCLES(9), CYCLES(7), CYCLES(9), CYCLES(4), CYCLES(4), CYCLES(2), CYCLES(2), CYCLES(1), CYCLES2(17,25), CYCLES(1), CYCLES2(17,20), CYCLES(17), CYCLES(17), CYCLES(17), CYCLES(17), +/*70*/ &timing_bnt, &timing_bnt, &timing_bnt, &timing_bnt, &timing_bnt, &timing_bnt, &timing_bnt, &timing_bnt, &timing_bnt, &timing_bnt, &timing_bnt, &timing_bnt, &timing_bnt, &timing_bnt, &timing_bnt, &timing_bnt, + +/*80*/ &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_rm, &timing_rm, CYCLES(5), CYCLES(5), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(3), CYCLES(1), CYCLES(5), CYCLES(6), +/*90*/ CYCLES(1), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(18), CYCLES(4), CYCLES(4), CYCLES(5), CYCLES(2), CYCLES(3), +/*a0*/ CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(7), CYCLES(7), CYCLES(8), CYCLES(8), CYCLES(1), CYCLES(1), CYCLES(5), CYCLES(5), CYCLES(5), CYCLES(5), CYCLES(6), CYCLES(6), +/*b0*/ &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, + +/*c0*/ CYCLES(4), CYCLES(4), CYCLES(5), CYCLES(5), CYCLES(6), CYCLES(6), CYCLES(1), CYCLES(1), CYCLES(14), CYCLES(5), CYCLES(13), CYCLES(13), CYCLES(26), CYCLES(0), CYCLES(3), CYCLES(15), +/*d0*/ CYCLES(4), CYCLES(4), CYCLES(4), CYCLES(4), CYCLES(15), CYCLES(14), CYCLES(2), CYCLES(4), NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +/*e0*/ CYCLES(6), CYCLES(6), CYCLES(6), CYCLES(5), CYCLES(14), CYCLES(14), CYCLES(16), CYCLES(16), CYCLES(3), CYCLES(3), CYCLES(17), CYCLES(3), CYCLES(14), CYCLES(14), CYCLES(14), CYCLES(14), +/*f0*/ CYCLES(4), CYCLES(0), CYCLES(0), CYCLES(0), CYCLES(4), CYCLES(2), NULL, NULL, CYCLES(2), CYCLES(2), CYCLES(3), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(3), NULL +}; + +static int *opcode_timings_mod3[256] = +{ +/*00*/ &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, CYCLES(2), CYCLES(3), &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, CYCLES(2), NULL, +/*10*/ &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, CYCLES(2), CYCLES(3), &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, CYCLES(2), CYCLES(3), +/*20*/ &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, CYCLES(4), CYCLES(3), &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, CYCLES(4), CYCLES(3), +/*30*/ &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, CYCLES(4), CYCLES(2), &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, CYCLES(4), CYCLES(2), + +/*40*/ &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, +/*50*/ CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), +/*60*/ CYCLES(11), CYCLES(9), CYCLES(7), CYCLES(9), CYCLES(4), CYCLES(4), CYCLES(2), CYCLES(2), CYCLES(1), CYCLES2(14,25), CYCLES(1), CYCLES2(17,20), CYCLES(17), CYCLES(17), CYCLES(17), CYCLES(17), +/*70*/ &timing_bnt, &timing_bnt, &timing_bnt, &timing_bnt, &timing_bnt, &timing_bnt, &timing_bnt, &timing_bnt, &timing_bnt, &timing_bnt, &timing_bnt, &timing_bnt, &timing_bnt, &timing_bnt, &timing_bnt, &timing_bnt, + +/*80*/ &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, CYCLES(5), CYCLES(5), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(2), CYCLES(1), CYCLES(2), CYCLES(1), +/*90*/ CYCLES(1), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(18), CYCLES(4), CYCLES(4), CYCLES(5), CYCLES(2), CYCLES(3), +/*a0*/ CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(7), CYCLES(7), CYCLES(8), CYCLES(8), CYCLES(1), CYCLES(1), CYCLES(5), CYCLES(5), CYCLES(5), CYCLES(5), CYCLES(6), CYCLES(6), +/*b0*/ &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, + +/*c0*/ CYCLES(4), CYCLES(4), CYCLES(5), CYCLES(5), CYCLES(6), CYCLES(6), CYCLES(1), CYCLES(1), CYCLES(14), CYCLES(5), CYCLES(13), CYCLES(13), CYCLES(26), CYCLES(0), CYCLES(3), CYCLES(15), +/*d0*/ CYCLES(4), CYCLES(4), CYCLES(4), CYCLES(4), CYCLES(15), CYCLES(14), CYCLES(2), CYCLES(4), NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +/*e0*/ CYCLES(6), CYCLES(6), CYCLES(6), CYCLES(5), CYCLES(14), CYCLES(14), CYCLES(16), CYCLES(16), CYCLES(3), CYCLES(3), CYCLES(17), CYCLES(3), CYCLES(14), CYCLES(14), CYCLES(14), CYCLES(14), +/*f0*/ CYCLES(4), CYCLES(0), CYCLES(0), CYCLES(0), CYCLES(4), CYCLES(2), NULL, NULL, CYCLES(2), CYCLES(2), CYCLES(3), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(3), NULL +}; + +static int *opcode_timings_0f[256] = +{ +/*00*/ CYCLES(20), CYCLES(11), CYCLES(11), CYCLES(10), NULL, CYCLES(195), CYCLES(7), NULL, CYCLES(1000), CYCLES(10000), NULL, NULL, NULL, NULL, NULL, NULL, +/*10*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +/*20*/ CYCLES(6), CYCLES(6), CYCLES(6), CYCLES(6), CYCLES(6), CYCLES(6), NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +/*30*/ CYCLES(9), CYCLES(1), CYCLES(9), NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, + +/*40*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +/*50*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +/*60*/ &timing_rm, &timing_rm, &timing_rm, &timing_rm, &timing_rm, &timing_rm, &timing_rm, &timing_rm, &timing_rm, &timing_rm, &timing_rm, &timing_rm, NULL, NULL, &timing_rm, &timing_rm, +/*70*/ NULL, &timing_rm, &timing_rm, &timing_rm, &timing_rm, &timing_rm, &timing_rm, CYCLES(100), NULL, NULL, NULL, NULL, NULL, NULL, &timing_rm, &timing_rm, + +/*80*/ &timing_bnt, &timing_bnt, &timing_bnt, &timing_bnt, &timing_bnt, &timing_bnt, &timing_bnt, &timing_bnt, &timing_bnt, &timing_bnt, &timing_bnt, &timing_bnt, &timing_bnt, &timing_bnt, &timing_bnt, &timing_bnt, +/*90*/ CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), +/*a0*/ CYCLES(3), CYCLES(3), CYCLES(14), CYCLES(8), CYCLES(3), CYCLES(4), NULL, NULL, CYCLES(3), CYCLES(3), NULL, CYCLES(13), CYCLES(3), CYCLES(3), NULL, CYCLES2(18,30), +/*b0*/ CYCLES(10), CYCLES(10), CYCLES(6), CYCLES(13), CYCLES(6), CYCLES(6), CYCLES(3), CYCLES(3), NULL, NULL, CYCLES(6), CYCLES(13), CYCLES(7), CYCLES(7), CYCLES(3), CYCLES(3), + +/*c0*/ CYCLES(4), CYCLES(4), NULL, NULL, NULL, NULL, NULL, NULL, CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), +/*d0*/ NULL, &timing_rm, &timing_rm, &timing_rm, NULL, &timing_rm, NULL, NULL, &timing_rm, &timing_rm, NULL, &timing_rm, &timing_rm, &timing_rm, NULL, &timing_rm, +/*e0*/ NULL, &timing_rm, &timing_rm, NULL, NULL, &timing_rm, NULL, NULL, &timing_rm, &timing_rm, NULL, &timing_rm, &timing_rm, &timing_rm, NULL, &timing_rm, +/*f0*/ NULL, &timing_rm, &timing_rm, &timing_rm, NULL, &timing_rm, NULL, NULL, &timing_rm, &timing_rm, &timing_rm, NULL, &timing_rm, &timing_rm, &timing_rm, NULL, +}; +static int *opcode_timings_0f_mod3[256] = +{ +/*00*/ CYCLES(20), CYCLES(11), CYCLES(11), CYCLES(10), NULL, CYCLES(195), CYCLES(7), NULL, CYCLES(1000), CYCLES(10000), NULL, NULL, NULL, NULL, NULL, NULL, +/*10*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +/*20*/ CYCLES(6), CYCLES(6), CYCLES(6), CYCLES(6), CYCLES(6), CYCLES(6), NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +/*30*/ CYCLES(9), CYCLES(1), CYCLES(9), NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, + +/*40*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +/*50*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +/*60*/ &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, NULL, NULL, &timing_rr, &timing_rr, +/*70*/ NULL, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, &timing_rr, CYCLES(100), NULL, NULL, NULL, NULL, NULL, NULL, &timing_rr, &timing_rr, + +/*80*/ &timing_bnt, &timing_bnt, &timing_bnt, &timing_bnt, &timing_bnt, &timing_bnt, &timing_bnt, &timing_bnt, &timing_bnt, &timing_bnt, &timing_bnt, &timing_bnt, &timing_bnt, &timing_bnt, &timing_bnt, &timing_bnt, +/*90*/ CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), +/*a0*/ CYCLES(3), CYCLES(3), CYCLES(14), CYCLES(8), CYCLES(3), CYCLES(4), NULL, NULL, CYCLES(3), CYCLES(3), NULL, CYCLES(13), CYCLES(3), CYCLES(3), NULL, CYCLES2(18,30), +/*b0*/ CYCLES(10), CYCLES(10), CYCLES(6), CYCLES(13), CYCLES(6), CYCLES(6), CYCLES(3), CYCLES(3), NULL, NULL, CYCLES(6), CYCLES(13), CYCLES(7), CYCLES(7), CYCLES(3), CYCLES(3), + +/*c0*/ CYCLES(4), CYCLES(4), NULL, NULL, NULL, NULL, NULL, NULL, CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), +/*d0*/ NULL, &timing_rr, &timing_rr, &timing_rr, NULL, &timing_rr, NULL, NULL, &timing_rr, &timing_rr, NULL, &timing_rr, &timing_rr, &timing_rr, NULL, &timing_rr, +/*e0*/ NULL, &timing_rr, &timing_rr, NULL, NULL, &timing_rr, NULL, NULL, &timing_rr, &timing_rr, NULL, &timing_rr, &timing_rr, &timing_rr, NULL, &timing_rr, +/*f0*/ NULL, &timing_rr, &timing_rr, &timing_rr, NULL, &timing_rr, NULL, NULL, &timing_rr, &timing_rr, &timing_rr, NULL, &timing_rr, &timing_rr, &timing_rr, NULL, +}; + +static int *opcode_timings_shift[8] = +{ + CYCLES(7), CYCLES(7), CYCLES(10), CYCLES(10), CYCLES(7), CYCLES(7), CYCLES(7), CYCLES(7) +}; +static int *opcode_timings_shift_mod3[8] = +{ + CYCLES(3), CYCLES(3), CYCLES(9), CYCLES(9), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3) +}; + +static int *opcode_timings_f6[8] = +{ + &timing_rm, NULL, &timing_mm, &timing_mm, CYCLES(13), CYCLES(14), CYCLES(16), CYCLES(19) +}; +static int *opcode_timings_f6_mod3[8] = +{ + &timing_rr, NULL, &timing_rr, &timing_rr, CYCLES(13), CYCLES(14), CYCLES(16), CYCLES(19) +}; +static int *opcode_timings_f7[8] = +{ + &timing_rm, NULL, &timing_mm, &timing_mm, CYCLES(21), CYCLES2(22,38), CYCLES2(24,40), CYCLES2(27,43) +}; +static int *opcode_timings_f7_mod3[8] = +{ + &timing_rr, NULL, &timing_rr, &timing_rr, CYCLES(21), CYCLES2(22,38), CYCLES2(24,40), CYCLES2(27,43) +}; +static int *opcode_timings_ff[8] = +{ + &timing_mm, &timing_mm, CYCLES(5), CYCLES(17), CYCLES(5), CYCLES(13), CYCLES(5), NULL +}; +static int *opcode_timings_ff_mod3[8] = +{ + &timing_rr, &timing_rr, CYCLES(5), CYCLES(17), CYCLES(5), CYCLES(13), CYCLES(5), NULL +}; + +static int *opcode_timings_d8[8] = +{ +/* FADDil FMULil FCOMil FCOMPil FSUBil FSUBRil FDIVil FDIVRil*/ + CYCLES(8), CYCLES(11), CYCLES(4), CYCLES(4), CYCLES(8), CYCLES(8), CYCLES(73), CYCLES(73) +}; +static int *opcode_timings_d8_mod3[8] = +{ +/* FADD FMUL FCOM FCOMP FSUB FSUBR FDIV FDIVR*/ + CYCLES(8), CYCLES(16), CYCLES(4), CYCLES(4), CYCLES(8), CYCLES(8), CYCLES(73), CYCLES(73) +}; + +static int *opcode_timings_d9[8] = +{ +/* FLDs FSTs FSTPs FLDENV FLDCW FSTENV FSTCW*/ + CYCLES(3), NULL, CYCLES(7), CYCLES(7), CYCLES(34), CYCLES(4), CYCLES(67), CYCLES(3) +}; +static int *opcode_timings_d9_mod3[64] = +{ + /*FLD*/ + CYCLES(4), CYCLES(4), CYCLES(4), CYCLES(4), CYCLES(4), CYCLES(4), CYCLES(4), CYCLES(4), + /*FXCH*/ + CYCLES(4), CYCLES(4), CYCLES(4), CYCLES(4), CYCLES(4), CYCLES(4), CYCLES(4), CYCLES(4), + /*FNOP*/ + CYCLES(3), NULL, NULL, NULL, NULL, NULL, NULL, NULL, + /*FSTP*/ + CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), +/* opFCHS opFABS opFTST opFXAM*/ + CYCLES(6), CYCLES(3), NULL, NULL, CYCLES(4), CYCLES(8), NULL, NULL, +/* opFLD1 opFLDL2T opFLDL2E opFLDPI opFLDEG2 opFLDLN2 opFLDZ*/ + CYCLES(4), CYCLES(8), CYCLES(8), CYCLES(8), CYCLES(8), CYCLES(8), CYCLES(4), NULL, +/* opF2XM1 opFYL2X opFPTAN opFPATAN opFDECSTP opFINCSTP,*/ + CYCLES(140), CYCLES(196), CYCLES(200), CYCLES(218), NULL, NULL, CYCLES(3), CYCLES(3), +/* opFPREM opFSQRT opFSINCOS opFRNDINT opFSCALE opFSIN opFCOS*/ + CYCLES(70), NULL, CYCLES(83), CYCLES(292), CYCLES(21), CYCLES(30), CYCLES(257), CYCLES(257) +}; + +static int *opcode_timings_da[8] = +{ +/* FADDil FMULil FCOMil FCOMPil FSUBil FSUBRil FDIVil FDIVRil*/ + CYCLES(8), CYCLES(11), CYCLES(4), CYCLES(4), CYCLES(8), CYCLES(8), CYCLES(73), CYCLES(73) +}; +static int *opcode_timings_da_mod3[8] = +{ + NULL, NULL, NULL, NULL, NULL, CYCLES(5), NULL, NULL +}; + + +static int *opcode_timings_db[8] = +{ +/* FLDil FSTil FSTPil FLDe FSTPe*/ + CYCLES(9), NULL, CYCLES(28), CYCLES(28), NULL, CYCLES(5), NULL, CYCLES(6) +}; +static int *opcode_timings_db_mod3[64] = +{ + NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +/* opFNOP opFCLEX opFINIT opFNOP opFNOP*/ + NULL, CYCLES(3), CYCLES(7), CYCLES(17), CYCLES(3), CYCLES(3), NULL, + NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, +}; + +static int *opcode_timings_dc[8] = +{ +/* opFADDd_a16 opFMULd_a16 opFCOMd_a16 opFCOMPd_a16 opFSUBd_a16 opFSUBRd_a16 opFDIVd_a16 opFDIVRd_a16*/ + CYCLES(8), CYCLES(11), CYCLES(4), CYCLES(4), CYCLES(8), CYCLES(8), CYCLES(73), CYCLES(73) +}; +static int *opcode_timings_dc_mod3[8] = +{ +/* opFADDr opFMULr opFSUBRr opFSUBr opFDIVRr opFDIVr*/ + CYCLES(8), CYCLES(16), NULL, NULL, CYCLES(8), CYCLES(8), CYCLES(73), CYCLES(73) +}; + +static int *opcode_timings_dd[8] = +{ +/* FLDd FSTd FSTPd FRSTOR FSAVE FSTSW*/ + CYCLES(3), NULL, CYCLES(8), CYCLES(8), CYCLES(131), NULL, CYCLES(154), CYCLES(3) +}; +static int *opcode_timings_dd_mod3[8] = +{ +/* FFFREE FST FSTP FUCOM FUCOMP*/ + CYCLES(3), NULL, CYCLES(3), CYCLES(3), CYCLES(4), CYCLES(4), NULL, NULL +}; + +static int *opcode_timings_de[8] = +{ +/* FADDiw FMULiw FCOMiw FCOMPiw FSUBil FSUBRil FDIVil FDIVRil*/ + CYCLES(8), CYCLES(11), CYCLES(4), CYCLES(4), CYCLES(8), CYCLES(8), CYCLES(73), CYCLES(73) +}; +static int *opcode_timings_de_mod3[8] = +{ +/* FADD FMUL FCOMPP FSUB FSUBR FDIV FDIVR*/ + CYCLES(8), CYCLES(16), NULL, CYCLES(5), CYCLES(8), CYCLES(8), CYCLES(73), CYCLES(73) +}; + +static int *opcode_timings_df[8] = +{ +/* FILDiw FISTiw FISTPiw FILDiq FBSTP FISTPiq*/ + CYCLES(13), NULL, CYCLES(29), CYCLES(29), NULL, CYCLES(10), CYCLES(172), CYCLES(28) +}; +static int *opcode_timings_df_mod3[8] = +{ +/* FFREE FST FSTP FUCOM FUCOMP*/ + CYCLES(3), NULL, CYCLES(3), CYCLES(3), CYCLES(4), CYCLES(4), NULL, NULL +}; + +static int *opcode_timings_8x[8] = +{ + &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_rm +}; + +static int timing_count; +static uint8_t last_prefix; + +static inline int COUNT(int *c, int op_32) +{ + if ((uintptr_t)c <= 10000) + return (int)c; + if (((uintptr_t)c & ~0xffff) == (-1 & ~0xffff)) + { + if (op_32 & 0x100) + return ((uintptr_t)c >> 8) & 0xff; + return (uintptr_t)c & 0xff; + } + return *c; +} + +void codegen_timing_start() +{ + timing_count = 0; + last_prefix = 0; +} + +void codegen_timing_prefix(uint8_t prefix) +{ + timing_count += COUNT(opcode_timings[prefix], 0); + last_prefix = prefix; +} + +void codegen_timing_opcode(uint8_t opcode, uint32_t fetchdat, int op_32) +{ + static int **timings; + int mod3 = ((fetchdat & 0xc0) == 0xc0); + + switch (last_prefix) + { + case 0x0f: + timings = mod3 ? opcode_timings_0f_mod3 : opcode_timings_0f; + break; + + case 0xd8: + timings = mod3 ? opcode_timings_d8_mod3 : opcode_timings_d8; + opcode = (opcode >> 3) & 7; + break; + case 0xd9: + timings = mod3 ? opcode_timings_d9_mod3 : opcode_timings_d9; + opcode = mod3 ? opcode & 0x3f : (opcode >> 3) & 7; + break; + case 0xda: + timings = mod3 ? opcode_timings_da_mod3 : opcode_timings_da; + opcode = (opcode >> 3) & 7; + break; + case 0xdb: + timings = mod3 ? opcode_timings_db_mod3 : opcode_timings_db; + opcode = mod3 ? opcode & 0x3f : (opcode >> 3) & 7; + break; + case 0xdc: + timings = mod3 ? opcode_timings_dc_mod3 : opcode_timings_dc; + opcode = (opcode >> 3) & 7; + break; + case 0xdd: + timings = mod3 ? opcode_timings_dd_mod3 : opcode_timings_dd; + opcode = (opcode >> 3) & 7; + break; + case 0xde: + timings = mod3 ? opcode_timings_de_mod3 : opcode_timings_de; + opcode = (opcode >> 3) & 7; + break; + case 0xdf: + timings = mod3 ? opcode_timings_df_mod3 : opcode_timings_df; + opcode = (opcode >> 3) & 7; + break; + + default: + switch (opcode) + { + case 0x80: case 0x81: case 0x82: case 0x83: + timings = mod3 ? opcode_timings_mod3 : opcode_timings_8x; + if (!mod3) + opcode = (fetchdat >> 3) & 7; + break; + + case 0xc0: case 0xc1: case 0xd0: case 0xd1: case 0xd2: case 0xd3: + timings = mod3 ? opcode_timings_shift_mod3 : opcode_timings_shift; + opcode = (fetchdat >> 3) & 7; + break; + + case 0xf6: + timings = mod3 ? opcode_timings_f6_mod3 : opcode_timings_f6; + opcode = (fetchdat >> 3) & 7; + break; + case 0xf7: + timings = mod3 ? opcode_timings_f7_mod3 : opcode_timings_f7; + opcode = (fetchdat >> 3) & 7; + break; + case 0xff: + timings = mod3 ? opcode_timings_ff_mod3 : opcode_timings_ff; + opcode = (fetchdat >> 3) & 7; + break; + + default: + timings = mod3 ? opcode_timings_mod3 : opcode_timings; + break; + } + } + + timing_count += COUNT(timings[opcode], op_32); + codegen_block_cycles += timing_count; +} + +void codegen_timing_block_end() +{ +} + +#endif diff --git a/src/codegen_x86.c b/src/codegen_x86.c index 8cdf955..71b212b 100644 --- a/src/codegen_x86.c +++ b/src/codegen_x86.c @@ -44,6 +44,7 @@ int cpu_recomp_removed, cpu_recomp_removed_latched; static uint32_t codegen_endpc; +int codegen_block_cycles; static uint32_t last_op32; static x86seg *last_ea_seg; @@ -303,6 +304,8 @@ void codegen_block_init(uint32_t phys_addr) last_op32 = -1; last_ea_seg = NULL; last_ssegs = -1; + + codegen_block_cycles = 0; } void codegen_block_remove() @@ -355,6 +358,11 @@ void codegen_block_end() block->checksum = checksum; // pclog("Checksum for %08x - %08x = %08x\n", codeblock_hash_pc[block_num] & ~3, end_pc, checksum); + addbyte(0x81); /*SUB $codegen_block_cycles, cyclcs*/ + addbyte(0x2d); + addlong((uint32_t)&cycles); + addlong((uint32_t)codegen_block_cycles); + addbyte(0x83); /*ADDL $8,%esp*/ addbyte(0xC4); addbyte(0x08); @@ -452,10 +460,11 @@ void codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t int opcode_mask = 0x3ff; int over = 0; int pc_off = 0; - + + codegen_timing_start(); + while (!over) { - switch (opcode) { case 0x0f: @@ -466,102 +475,93 @@ void codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t case 0x26: /*ES:*/ op_ea_seg = &_es; op_ssegs = 1; - addbyte(0x83); addbyte(0x2D); addlong((uint32_t)&cycles); addbyte(4); break; case 0x2e: /*CS:*/ op_ea_seg = &_cs; op_ssegs = 1; - addbyte(0x83); addbyte(0x2D); addlong((uint32_t)&cycles); addbyte(4); break; case 0x36: /*SS:*/ op_ea_seg = &_ss; op_ssegs = 1; - addbyte(0x83); addbyte(0x2D); addlong((uint32_t)&cycles); addbyte(4); break; case 0x3e: /*DS:*/ op_ea_seg = &_ds; op_ssegs = 1; - addbyte(0x83); addbyte(0x2D); addlong((uint32_t)&cycles); addbyte(4); break; case 0x64: /*FS:*/ op_ea_seg = &_fs; op_ssegs = 1; - addbyte(0x83); addbyte(0x2D); addlong((uint32_t)&cycles); addbyte(4); break; case 0x65: /*GS:*/ op_ea_seg = &_gs; op_ssegs = 1; - addbyte(0x83); addbyte(0x2D); addlong((uint32_t)&cycles); addbyte(4); break; case 0x66: /*Data size select*/ op_32 = ((use32 & 0x100) ^ 0x100) | (op_32 & 0x200); - addbyte(0x83); addbyte(0x2D); addlong((uint32_t)&cycles); addbyte(2); break; case 0x67: /*Address size select*/ op_32 = ((use32 & 0x200) ^ 0x200) | (op_32 & 0x100); - addbyte(0x83); addbyte(0x2D); addlong((uint32_t)&cycles); addbyte(2); break; case 0xd8: - op_table = (op_32 & 0x200) ? x86_opcodes_d8_a32 : x86_opcodes_d8_a16; + op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_d8_a32 : x86_dynarec_opcodes_d8_a16; opcode_shift = 3; opcode_mask = 0x1f; over = 1; pc_off = -1; break; case 0xd9: - op_table = (op_32 & 0x200) ? x86_opcodes_d9_a32 : x86_opcodes_d9_a16; + op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_d9_a32 : x86_dynarec_opcodes_d9_a16; opcode_mask = 0xff; over = 1; pc_off = -1; break; case 0xda: - op_table = (op_32 & 0x200) ? x86_opcodes_da_a32 : x86_opcodes_da_a16; + op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_da_a32 : x86_dynarec_opcodes_da_a16; opcode_mask = 0xff; over = 1; pc_off = -1; break; case 0xdb: - op_table = (op_32 & 0x200) ? x86_opcodes_db_a32 : x86_opcodes_db_a16; + op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_db_a32 : x86_dynarec_opcodes_db_a16; opcode_mask = 0xff; over = 1; pc_off = -1; break; case 0xdc: - op_table = (op_32 & 0x200) ? x86_opcodes_dc_a32 : x86_opcodes_dc_a16; + op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_dc_a32 : x86_dynarec_opcodes_dc_a16; opcode_shift = 3; opcode_mask = 0x1f; over = 1; pc_off = -1; break; case 0xdd: - op_table = (op_32 & 0x200) ? x86_opcodes_dd_a32 : x86_opcodes_dd_a16; + op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_dd_a32 : x86_dynarec_opcodes_dd_a16; opcode_mask = 0xff; over = 1; pc_off = -1; break; case 0xde: - op_table = (op_32 & 0x200) ? x86_opcodes_de_a32 : x86_opcodes_de_a16; + op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_de_a32 : x86_dynarec_opcodes_de_a16; opcode_mask = 0xff; over = 1; pc_off = -1; break; case 0xdf: - op_table = (op_32 & 0x200) ? x86_opcodes_df_a32 : x86_opcodes_df_a16; + op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_df_a32 : x86_dynarec_opcodes_df_a16; opcode_mask = 0xff; over = 1; pc_off = -1; break; case 0xf0: /*LOCK*/ - addbyte(0x83); addbyte(0x2D); addlong((uint32_t)&cycles); addbyte(2); break; default: goto generate_call; } - + codegen_timing_prefix(opcode); fetchdat = fastreadl(cs + op_pc); if (abrt) return; @@ -573,6 +573,8 @@ void codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t } generate_call: + codegen_timing_opcode(opcode, fetchdat, op_32); + op = op_table[((opcode >> opcode_shift) | op_32) & opcode_mask]; // if (output) // pclog("Generate call at %08X %02X %08X %02X %08X %08X %08X %08X %08X %02X %02X %02X %02X\n", &codeblock[block_current][block_pos], opcode, new_pc, ram[old_pc], EAX, EBX, ECX, EDX, ESI, ram[0x7bd2+6],ram[0x7bd2+7],ram[0x7bd2+8],ram[0x7bd2+9]); @@ -618,7 +620,7 @@ generate_call: addlong((uint32_t)&op32); addlong(op_32); } - + addbyte(0xC7); /*MOVL $fetchdat,(%esp)*/ addbyte(0x04); addbyte(0x24); @@ -631,6 +633,19 @@ generate_call: addbyte(0xE8); /*CALL*/ addlong(((uint8_t *)op - (uint8_t *)(&block->data[block_pos + 4]))); + + if (codegen_block_cycles && + ((op_table == x86_dynarec_opcodes && ((opcode & 0xf0) == 0x70)) || + (op_table == x86_dynarec_opcodes && ((opcode & 0xfc) == 0xe0)) || + (op_table == x86_dynarec_opcodes_0f && ((opcode & 0xf0) == 0x80)))) + { + /*Opcode is likely to cause block to exit, update cycle count*/ + addbyte(0x81); /*SUB $codegen_block_cycles, cyclcs*/ + addbyte(0x2d); + addlong((uint32_t)&cycles); + addlong((uint32_t)codegen_block_cycles); + codegen_block_cycles = 0; + } block->ins++; diff --git a/src/x86_ops_arith.h b/src/x86_ops_arith.h index 632aca4..2671e57 100644 --- a/src/x86_ops_arith.h +++ b/src/x86_ops_arith.h @@ -9,7 +9,7 @@ uint8_t src = getr8(reg); \ setflags ## 8 flagops; \ setr8(rm, operation); \ - cycles -= timing_rr; \ + CLOCK_CYCLES(timing_rr); \ } \ else \ { \ @@ -17,7 +17,7 @@ uint8_t src = getr8(reg); \ seteab(operation); if (abrt) return 1; \ setflags ## 8 flagops; \ - cycles -= timing_mr; \ + CLOCK_CYCLES(timing_mr); \ } \ return 0; \ } \ @@ -31,7 +31,7 @@ uint8_t src = getr8(reg); \ setflags ## 8 flagops; \ setr8(rm, operation); \ - cycles -= timing_rr; \ + CLOCK_CYCLES(timing_rr); \ } \ else \ { \ @@ -39,7 +39,7 @@ uint8_t src = getr8(reg); \ seteab(operation); if (abrt) return 1; \ setflags ## 8 flagops; \ - cycles -= timing_mr; \ + CLOCK_CYCLES(timing_mr); \ } \ return 0; \ } \ @@ -54,7 +54,7 @@ uint16_t src = regs[reg].w; \ setflags ## 16 flagops; \ regs[rm].w = operation; \ - cycles -= timing_rr; \ + CLOCK_CYCLES(timing_rr); \ } \ else \ { \ @@ -62,11 +62,11 @@ uint16_t src = regs[reg].w; \ seteaw(operation); if (abrt) return 1; \ setflags ## 16 flagops; \ - cycles -= timing_mr; \ + CLOCK_CYCLES(timing_mr); \ } \ return 0; \ } \ - static int op ## name ## _w_rmw_a32(uint32_t fetchdat) \ + static int op ## name ## _w_rmw_a32(uint32_t fetchdat) \ { \ int tempc = CF_SET(); \ fetch_ea_32(fetchdat); \ @@ -76,7 +76,7 @@ uint16_t src = regs[reg].w; \ setflags ## 16 flagops; \ regs[rm].w = operation; \ - cycles -= timing_rr; \ + CLOCK_CYCLES(timing_rr); \ } \ else \ { \ @@ -84,7 +84,7 @@ uint16_t src = regs[reg].w; \ seteaw(operation); if (abrt) return 1; \ setflags ## 16 flagops; \ - cycles -= timing_mr; \ + CLOCK_CYCLES(timing_mr); \ } \ return 0; \ } \ @@ -99,7 +99,7 @@ uint32_t src = regs[reg].l; \ setflags ## 32 flagops; \ regs[rm].l = operation; \ - cycles -= timing_rr; \ + CLOCK_CYCLES(timing_rr); \ } \ else \ { \ @@ -107,7 +107,7 @@ uint32_t src = regs[reg].l; \ seteal(operation); if (abrt) return 1; \ setflags ## 32 flagops; \ - cycles -= timing_mrl; \ + CLOCK_CYCLES(timing_mrl); \ } \ return 0; \ } \ @@ -121,7 +121,7 @@ uint32_t src = regs[reg].l; \ setflags ## 32 flagops; \ regs[rm].l = operation; \ - cycles -= timing_rr; \ + CLOCK_CYCLES(timing_rr); \ } \ else \ { \ @@ -129,7 +129,7 @@ uint32_t src = regs[reg].l; \ seteal(operation); if (abrt) return 1; \ setflags ## 32 flagops; \ - cycles -= timing_mrl; \ + CLOCK_CYCLES(timing_mrl); \ } \ return 0; \ } \ @@ -143,7 +143,7 @@ src = geteab(); if (abrt) return 1; \ setflags ## 8 flagops; \ setr8(reg, operation); \ - cycles -= (mod == 3) ? timing_rr : timing_rm; \ + CLOCK_CYCLES((mod == 3) ? timing_rr : timing_rm); \ return 0; \ } \ static int op ## name ## _b_rm_a32(uint32_t fetchdat) \ @@ -155,7 +155,7 @@ src = geteab(); if (abrt) return 1; \ setflags ## 8 flagops; \ setr8(reg, operation); \ - cycles -= (mod == 3) ? timing_rr : timing_rm; \ + CLOCK_CYCLES((mod == 3) ? timing_rr : timing_rm); \ return 0; \ } \ \ @@ -168,7 +168,7 @@ src = geteaw(); if (abrt) return 1; \ setflags ## 16 flagops; \ regs[reg].w = operation; \ - cycles -= (mod == 3) ? timing_rr : timing_rm; \ + CLOCK_CYCLES((mod == 3) ? timing_rr : timing_rm); \ return 0; \ } \ static int op ## name ## _w_rm_a32(uint32_t fetchdat) \ @@ -180,7 +180,7 @@ src = geteaw(); if (abrt) return 1; \ setflags ## 16 flagops; \ regs[reg].w = operation; \ - cycles -= (mod == 3) ? timing_rr : timing_rm; \ + CLOCK_CYCLES((mod == 3) ? timing_rr : timing_rm); \ return 0; \ } \ \ @@ -193,7 +193,7 @@ src = geteal(); if (abrt) return 1; \ setflags ## 32 flagops; \ regs[reg].l = operation; \ - cycles -= (mod == 3) ? timing_rr : timing_rml; \ + CLOCK_CYCLES((mod == 3) ? timing_rr : timing_rml); \ return 0; \ } \ static int op ## name ## _l_rm_a32(uint32_t fetchdat) \ @@ -205,7 +205,7 @@ src = geteal(); if (abrt) return 1; \ setflags ## 32 flagops; \ regs[reg].l = operation; \ - cycles -= (mod == 3) ? timing_rr : timing_rml; \ + CLOCK_CYCLES((mod == 3) ? timing_rr : timing_rml); \ return 0; \ } \ \ @@ -216,7 +216,7 @@ uint8_t src = getbytef(); \ setflags ## 8 flagops; \ AL = operation; \ - cycles -= timing_rr; \ + CLOCK_CYCLES(timing_rr); \ return 0; \ } \ \ @@ -227,7 +227,7 @@ uint16_t src = getwordf(); \ setflags ## 16 flagops; \ AX = operation; \ - cycles -= timing_rr; \ + CLOCK_CYCLES(timing_rr); \ return 0; \ } \ \ @@ -238,7 +238,7 @@ uint32_t src = getlong(); if (abrt) return 1; \ setflags ## 32 flagops; \ EAX = operation; \ - cycles -= timing_rr; \ + CLOCK_CYCLES(timing_rr); \ return 0; \ } @@ -256,8 +256,8 @@ static int opCMP_b_rmw_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); dst = geteab(); if (abrt) return 1; setsub8(dst, getr8(reg)); - if (is486) cycles -= ((mod == 3) ? 1 : 2); - else cycles -= ((mod == 3) ? 2 : 5); + if (is486) CLOCK_CYCLES((mod == 3) ? 1 : 2); + else CLOCK_CYCLES((mod == 3) ? 2 : 5); return 0; } static int opCMP_b_rmw_a32(uint32_t fetchdat) @@ -266,8 +266,8 @@ static int opCMP_b_rmw_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); dst = geteab(); if (abrt) return 1; setsub8(dst, getr8(reg)); - if (is486) cycles -= ((mod == 3) ? 1 : 2); - else cycles -= ((mod == 3) ? 2 : 5); + if (is486) CLOCK_CYCLES((mod == 3) ? 1 : 2); + else CLOCK_CYCLES((mod == 3) ? 2 : 5); return 0; } @@ -277,8 +277,8 @@ static int opCMP_w_rmw_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); dst = geteaw(); if (abrt) return 1; setsub16(dst, regs[reg].w); - if (is486) cycles -= ((mod == 3) ? 1 : 2); - else cycles -= ((mod == 3) ? 2 : 5); + if (is486) CLOCK_CYCLES((mod == 3) ? 1 : 2); + else CLOCK_CYCLES((mod == 3) ? 2 : 5); return 0; } static int opCMP_w_rmw_a32(uint32_t fetchdat) @@ -287,8 +287,8 @@ static int opCMP_w_rmw_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); dst = geteaw(); if (abrt) return 1; setsub16(dst, regs[reg].w); - if (is486) cycles -= ((mod == 3) ? 1 : 2); - else cycles -= ((mod == 3) ? 2 : 5); + if (is486) CLOCK_CYCLES((mod == 3) ? 1 : 2); + else CLOCK_CYCLES((mod == 3) ? 2 : 5); return 0; } @@ -298,8 +298,8 @@ static int opCMP_l_rmw_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); dst = geteal(); if (abrt) return 1; setsub32(dst, regs[reg].l); - if (is486) cycles -= ((mod == 3) ? 1 : 2); - else cycles -= ((mod == 3) ? 2 : 5); + if (is486) CLOCK_CYCLES((mod == 3) ? 1 : 2); + else CLOCK_CYCLES((mod == 3) ? 2 : 5); return 0; } static int opCMP_l_rmw_a32(uint32_t fetchdat) @@ -308,8 +308,8 @@ static int opCMP_l_rmw_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); dst = geteal(); if (abrt) return 1; setsub32(dst, regs[reg].l); - if (is486) cycles -= ((mod == 3) ? 1 : 2); - else cycles -= ((mod == 3) ? 2 : 5); + if (is486) CLOCK_CYCLES((mod == 3) ? 1 : 2); + else CLOCK_CYCLES((mod == 3) ? 2 : 5); return 0; } @@ -319,7 +319,7 @@ static int opCMP_b_rm_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); src = geteab(); if (abrt) return 1; setsub8(getr8(reg), src); - cycles -= (mod == 3) ? timing_rr : timing_rm; + CLOCK_CYCLES((mod == 3) ? timing_rr : timing_rm); return 0; } static int opCMP_b_rm_a32(uint32_t fetchdat) @@ -328,7 +328,7 @@ static int opCMP_b_rm_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); src = geteab(); if (abrt) return 1; setsub8(getr8(reg), src); - cycles -= (mod == 3) ? timing_rr : timing_rm; + CLOCK_CYCLES((mod == 3) ? timing_rr : timing_rm); return 0; } @@ -338,7 +338,7 @@ static int opCMP_w_rm_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); src = geteaw(); if (abrt) return 1; setsub16(regs[reg].w, src); - cycles -= (mod == 3) ? timing_rr : timing_rm; + CLOCK_CYCLES((mod == 3) ? timing_rr : timing_rm); return 0; } static int opCMP_w_rm_a32(uint32_t fetchdat) @@ -347,7 +347,7 @@ static int opCMP_w_rm_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); src = geteaw(); if (abrt) return 1; setsub16(regs[reg].w, src); - cycles -= (mod == 3) ? timing_rr : timing_rm; + CLOCK_CYCLES((mod == 3) ? timing_rr : timing_rm); return 0; } @@ -357,7 +357,7 @@ static int opCMP_l_rm_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); src = geteal(); if (abrt) return 1; setsub32(regs[reg].l, src); - cycles -= (mod == 3) ? timing_rr : timing_rml; + CLOCK_CYCLES((mod == 3) ? timing_rr : timing_rml); return 0; } static int opCMP_l_rm_a32(uint32_t fetchdat) @@ -366,7 +366,7 @@ static int opCMP_l_rm_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); src = geteal(); if (abrt) return 1; setsub32(regs[reg].l, src); - cycles -= (mod == 3) ? timing_rr : timing_rml; + CLOCK_CYCLES((mod == 3) ? timing_rr : timing_rml); return 0; } @@ -374,7 +374,7 @@ static int opCMP_AL_imm(uint32_t fetchdat) { uint8_t src = getbytef(); setsub8(AL, src); - cycles -= timing_rr; + CLOCK_CYCLES(timing_rr); return 0; } @@ -382,7 +382,7 @@ static int opCMP_AX_imm(uint32_t fetchdat) { uint16_t src = getwordf(); setsub16(AX, src); - cycles -= timing_rr; + CLOCK_CYCLES(timing_rr); return 0; } @@ -390,7 +390,7 @@ static int opCMP_EAX_imm(uint32_t fetchdat) { uint32_t src = getlong(); if (abrt) return 1; setsub32(EAX, src); - cycles -= timing_rr; + CLOCK_CYCLES(timing_rr); return 0; } @@ -401,8 +401,8 @@ static int opTEST_b_a16(uint32_t fetchdat) temp = geteab(); if (abrt) return 1; temp2 = getr8(reg); setznp8(temp & temp2); - if (is486) cycles -= ((mod == 3) ? 1 : 2); - else cycles -= ((mod == 3) ? 2 : 5); + if (is486) CLOCK_CYCLES((mod == 3) ? 1 : 2); + else CLOCK_CYCLES((mod == 3) ? 2 : 5); return 0; } static int opTEST_b_a32(uint32_t fetchdat) @@ -412,8 +412,8 @@ static int opTEST_b_a32(uint32_t fetchdat) temp = geteab(); if (abrt) return 1; temp2 = getr8(reg); setznp8(temp & temp2); - if (is486) cycles -= ((mod == 3) ? 1 : 2); - else cycles -= ((mod == 3) ? 2 : 5); + if (is486) CLOCK_CYCLES((mod == 3) ? 1 : 2); + else CLOCK_CYCLES((mod == 3) ? 2 : 5); return 0; } @@ -424,8 +424,8 @@ static int opTEST_w_a16(uint32_t fetchdat) temp = geteaw(); if (abrt) return 1; temp2 = regs[reg].w; setznp16(temp & temp2); - if (is486) cycles -= ((mod == 3) ? 1 : 2); - else cycles -= ((mod == 3) ? 2 : 5); + if (is486) CLOCK_CYCLES((mod == 3) ? 1 : 2); + else CLOCK_CYCLES((mod == 3) ? 2 : 5); return 0; } static int opTEST_w_a32(uint32_t fetchdat) @@ -435,8 +435,8 @@ static int opTEST_w_a32(uint32_t fetchdat) temp = geteaw(); if (abrt) return 1; temp2 = regs[reg].w; setznp16(temp & temp2); - if (is486) cycles -= ((mod == 3) ? 1 : 2); - else cycles -= ((mod == 3) ? 2 : 5); + if (is486) CLOCK_CYCLES((mod == 3) ? 1 : 2); + else CLOCK_CYCLES((mod == 3) ? 2 : 5); return 0; } @@ -447,8 +447,8 @@ static int opTEST_l_a16(uint32_t fetchdat) temp = geteal(); if (abrt) return 1; temp2 = regs[reg].l; setznp32(temp & temp2); - if (is486) cycles -= ((mod == 3) ? 1 : 2); - else cycles -= ((mod == 3) ? 2 : 5); + if (is486) CLOCK_CYCLES((mod == 3) ? 1 : 2); + else CLOCK_CYCLES((mod == 3) ? 2 : 5); return 0; } static int opTEST_l_a32(uint32_t fetchdat) @@ -458,8 +458,8 @@ static int opTEST_l_a32(uint32_t fetchdat) temp = geteal(); if (abrt) return 1; temp2 = regs[reg].l; setznp32(temp & temp2); - if (is486) cycles -= ((mod == 3) ? 1 : 2); - else cycles -= ((mod == 3) ? 2 : 5); + if (is486) CLOCK_CYCLES((mod == 3) ? 1 : 2); + else CLOCK_CYCLES((mod == 3) ? 2 : 5); return 0; } @@ -467,21 +467,21 @@ static int opTEST_AL(uint32_t fetchdat) { uint8_t temp = getbytef(); setznp8(AL & temp); - cycles -= timing_rr; + CLOCK_CYCLES(timing_rr); return 0; } static int opTEST_AX(uint32_t fetchdat) { uint16_t temp = getwordf(); setznp16(AX & temp); - cycles -= timing_rr; + CLOCK_CYCLES(timing_rr); return 0; } static int opTEST_EAX(uint32_t fetchdat) { uint32_t temp = getlong(); if (abrt) return 1; setznp32(EAX & temp); - cycles -= timing_rr; + CLOCK_CYCLES(timing_rr); return 0; } @@ -493,45 +493,45 @@ static int opTEST_EAX(uint32_t fetchdat) case 0x00: /*ADD ea, #*/ \ setea ## ea_width(dst + src); if (abrt) return 1; \ setadd ## flag_width(dst, src); \ - cycles -= (mod == 3) ? timing_rr : timing_mr; \ + CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mr); \ break; \ case 0x08: /*OR ea, #*/ \ dst |= src; \ setea ## ea_width(dst); if (abrt) return 1; \ setznp ## flag_width(dst); \ - cycles -= (mod == 3) ? timing_rr : timing_mr; \ + CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mr); \ break; \ case 0x10: /*ADC ea, #*/ \ setea ## ea_width(dst + src + tempc); if (abrt) return 1; \ setadc ## flag_width(dst, src); \ - cycles -= (mod == 3) ? timing_rr : timing_mr; \ + CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mr); \ break; \ case 0x18: /*SBB ea, #*/ \ setea ## ea_width(dst - (src + tempc)); if (abrt) return 1; \ setsbc ## flag_width(dst, src); \ - cycles -= (mod == 3) ? timing_rr : timing_mr; \ + CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mr); \ break; \ case 0x20: /*AND ea, #*/ \ dst &= src; \ setea ## ea_width(dst); if (abrt) return 1; \ setznp ## flag_width(dst); \ - cycles -= (mod == 3) ? timing_rr : timing_mr; \ + CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mr); \ break; \ case 0x28: /*SUB ea, #*/ \ setea ## ea_width(dst - src); if (abrt) return 1; \ setsub ## flag_width(dst, src); \ - cycles -= (mod == 3) ? timing_rr : timing_mr; \ + CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mr); \ break; \ case 0x30: /*XOR ea, #*/ \ dst ^= src; \ setea ## ea_width(dst); if (abrt) return 1; \ setznp ## flag_width(dst); \ - cycles -= (mod == 3) ? timing_rr : timing_mr; \ + CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mr); \ break; \ case 0x38: /*CMP ea, #*/ \ setsub ## flag_width(dst, src); \ - if (is486) cycles -= ((mod == 3) ? 1 : 2); \ - else cycles -= ((mod == 3) ? 2 : 7); \ + if (is486) CLOCK_CYCLES((mod == 3) ? 1 : 2); \ + else CLOCK_CYCLES((mod == 3) ? 2 : 7); \ break; \ } diff --git a/src/x86_ops_atomic.h b/src/x86_ops_atomic.h index 6627c4a..3b4dc6a 100644 --- a/src/x86_ops_atomic.h +++ b/src/x86_ops_atomic.h @@ -13,7 +13,7 @@ static int opCMPXCHG_b_a16(uint32_t fetchdat) else AL = temp; if (abrt) return 1; setsub8(temp2, temp); - cycles -= (mod == 3) ? 6 : 10; + CLOCK_CYCLES((mod == 3) ? 6 : 10); return 0; } static int opCMPXCHG_b_a32(uint32_t fetchdat) @@ -31,7 +31,7 @@ static int opCMPXCHG_b_a32(uint32_t fetchdat) else AL = temp; if (abrt) return 1; setsub8(temp2, temp); - cycles -= (mod == 3) ? 6 : 10; + CLOCK_CYCLES((mod == 3) ? 6 : 10); return 0; } @@ -50,7 +50,7 @@ static int opCMPXCHG_w_a16(uint32_t fetchdat) else AX = temp; if (abrt) return 1; setsub16(temp2, temp); - cycles -= (mod == 3) ? 6 : 10; + CLOCK_CYCLES((mod == 3) ? 6 : 10); return 0; } static int opCMPXCHG_w_a32(uint32_t fetchdat) @@ -68,7 +68,7 @@ static int opCMPXCHG_w_a32(uint32_t fetchdat) else AX = temp; if (abrt) return 1; setsub16(temp2, temp); - cycles -= (mod == 3) ? 6 : 10; + CLOCK_CYCLES((mod == 3) ? 6 : 10); return 0; } @@ -87,7 +87,7 @@ static int opCMPXCHG_l_a16(uint32_t fetchdat) else EAX = temp; if (abrt) return 1; setsub32(temp2, temp); - cycles -= (mod == 3) ? 6 : 10; + CLOCK_CYCLES((mod == 3) ? 6 : 10); return 0; } static int opCMPXCHG_l_a32(uint32_t fetchdat) @@ -105,7 +105,7 @@ static int opCMPXCHG_l_a32(uint32_t fetchdat) else EAX = temp; if (abrt) return 1; setsub32(temp2, temp); - cycles -= (mod == 3) ? 6 : 10; + CLOCK_CYCLES((mod == 3) ? 6 : 10); return 0; } @@ -123,6 +123,7 @@ static int opXADD_b_a16(uint32_t fetchdat) seteab(temp + getr8(reg)); if (abrt) return 1; setadd8(temp, getr8(reg)); setr8(reg, temp); + CLOCK_CYCLES((mod == 3) ? 3 : 4); return 0; } static int opXADD_b_a32(uint32_t fetchdat) @@ -139,6 +140,7 @@ static int opXADD_b_a32(uint32_t fetchdat) seteab(temp + getr8(reg)); if (abrt) return 1; setadd8(temp, getr8(reg)); setr8(reg, temp); + CLOCK_CYCLES((mod == 3) ? 3 : 4); return 0; } @@ -156,6 +158,7 @@ static int opXADD_w_a16(uint32_t fetchdat) seteaw(temp + regs[reg].w); if (abrt) return 1; setadd16(temp, regs[reg].w); regs[reg].w = temp; + CLOCK_CYCLES((mod == 3) ? 3 : 4); return 0; } static int opXADD_w_a32(uint32_t fetchdat) @@ -172,6 +175,7 @@ static int opXADD_w_a32(uint32_t fetchdat) seteaw(temp + regs[reg].w); if (abrt) return 1; setadd16(temp, regs[reg].w); regs[reg].w = temp; + CLOCK_CYCLES((mod == 3) ? 3 : 4); return 0; } @@ -189,6 +193,7 @@ static int opXADD_l_a16(uint32_t fetchdat) seteal(temp + regs[reg].l); if (abrt) return 1; setadd32(temp, regs[reg].l); regs[reg].l = temp; + CLOCK_CYCLES((mod == 3) ? 3 : 4); return 0; } static int opXADD_l_a32(uint32_t fetchdat) @@ -205,5 +210,6 @@ static int opXADD_l_a32(uint32_t fetchdat) seteal(temp + regs[reg].l); if (abrt) return 1; setadd32(temp, regs[reg].l); regs[reg].l = temp; + CLOCK_CYCLES((mod == 3) ? 3 : 4); return 0; } diff --git a/src/x86_ops_bcd.h b/src/x86_ops_bcd.h index 2627402..1ef7210 100644 --- a/src/x86_ops_bcd.h +++ b/src/x86_ops_bcd.h @@ -10,7 +10,7 @@ static int opAAA(uint32_t fetchdat) else flags &= ~(A_FLAG | C_FLAG); AL &= 0xF; - cycles -= is486 ? 3 : 4; + CLOCK_CYCLES(is486 ? 3 : 4); return 0; } @@ -21,7 +21,7 @@ static int opAAD(uint32_t fetchdat) AL = (AH * base) + AL; AH = 0; setznp16(AX); - cycles -= (is486) ? 14 : 19; + CLOCK_CYCLES((is486) ? 14 : 19); return 0; } @@ -32,7 +32,7 @@ static int opAAM(uint32_t fetchdat) AH = AL / base; AL %= base; setznp16(AX); - cycles -= (is486) ? 15 : 17; + CLOCK_CYCLES((is486) ? 15 : 17); return 0; } @@ -48,7 +48,7 @@ static int opAAS(uint32_t fetchdat) else flags &= ~(A_FLAG | C_FLAG); AL &= 0xF; - cycles -= is486 ? 3 : 4; + CLOCK_CYCLES(is486 ? 3 : 4); return 0; } @@ -73,7 +73,7 @@ static int opDAA(uint32_t fetchdat) tempw = flags & (C_FLAG | A_FLAG); setznp8(AL); flags |= tempw; - cycles -= 4; + CLOCK_CYCLES(4); return 0; } @@ -99,7 +99,7 @@ static int opDAS(uint32_t fetchdat) tempw = flags & (C_FLAG | A_FLAG); setznp8(AL); flags |= tempw; - cycles -= 4; + CLOCK_CYCLES(4); return 0; } diff --git a/src/x86_ops_bit.h b/src/x86_ops_bit.h index 8eee1bf..0be04aa 100644 --- a/src/x86_ops_bit.h +++ b/src/x86_ops_bit.h @@ -10,7 +10,7 @@ static int opBT_w_r_a16(uint32_t fetchdat) if (temp & (1 << (regs[reg].w & 15))) flags |= C_FLAG; else flags &= ~C_FLAG; - cycles -= 3; + CLOCK_CYCLES(3); return 0; } static int opBT_w_r_a32(uint32_t fetchdat) @@ -24,7 +24,7 @@ static int opBT_w_r_a32(uint32_t fetchdat) if (temp & (1 << (regs[reg].w & 15))) flags |= C_FLAG; else flags &= ~C_FLAG; - cycles -= 3; + CLOCK_CYCLES(3); return 0; } static int opBT_l_r_a16(uint32_t fetchdat) @@ -38,7 +38,7 @@ static int opBT_l_r_a16(uint32_t fetchdat) if (temp & (1 << (regs[reg].l & 31))) flags |= C_FLAG; else flags &= ~C_FLAG; - cycles -= 3; + CLOCK_CYCLES(3); return 0; } static int opBT_l_r_a32(uint32_t fetchdat) @@ -52,7 +52,7 @@ static int opBT_l_r_a32(uint32_t fetchdat) if (temp & (1 << (regs[reg].l & 31))) flags |= C_FLAG; else flags &= ~C_FLAG; - cycles -= 3; + CLOCK_CYCLES(3); return 0; } @@ -72,7 +72,7 @@ static int opBT_l_r_a32(uint32_t fetchdat) if (tempc) flags |= C_FLAG; \ else flags &= ~C_FLAG; \ \ - cycles -= 6; \ + CLOCK_CYCLES(6); \ return 0; \ } \ static int opBT ## name ## _w_r_a32(uint32_t fetchdat) \ @@ -90,7 +90,7 @@ static int opBT_l_r_a32(uint32_t fetchdat) if (tempc) flags |= C_FLAG; \ else flags &= ~C_FLAG; \ \ - cycles -= 6; \ + CLOCK_CYCLES(6); \ return 0; \ } \ static int opBT ## name ## _l_r_a16(uint32_t fetchdat) \ @@ -108,7 +108,7 @@ static int opBT_l_r_a32(uint32_t fetchdat) if (tempc) flags |= C_FLAG; \ else flags &= ~C_FLAG; \ \ - cycles -= 6; \ + CLOCK_CYCLES(6); \ return 0; \ } \ static int opBT ## name ## _l_r_a32(uint32_t fetchdat) \ @@ -126,7 +126,7 @@ static int opBT_l_r_a32(uint32_t fetchdat) if (tempc) flags |= C_FLAG; \ else flags &= ~C_FLAG; \ \ - cycles -= 6; \ + CLOCK_CYCLES(6); \ return 0; \ } @@ -150,7 +150,7 @@ static int opBA_w_a16(uint32_t fetchdat) case 0x20: /*BT w,imm*/ if (tempc) flags |= C_FLAG; else flags &= ~C_FLAG; - cycles -= 3; + CLOCK_CYCLES(3); return 0; case 0x28: /*BTS w,imm*/ temp |= (1 << count); @@ -171,7 +171,7 @@ static int opBA_w_a16(uint32_t fetchdat) seteaw(temp); if (abrt) return 1; if (tempc) flags |= C_FLAG; else flags &= ~C_FLAG; - cycles -= 6; + CLOCK_CYCLES(6); return 0; } static int opBA_w_a32(uint32_t fetchdat) @@ -190,7 +190,7 @@ static int opBA_w_a32(uint32_t fetchdat) case 0x20: /*BT w,imm*/ if (tempc) flags |= C_FLAG; else flags &= ~C_FLAG; - cycles -= 3; + CLOCK_CYCLES(3); return 0; case 0x28: /*BTS w,imm*/ temp |= (1 << count); @@ -211,7 +211,7 @@ static int opBA_w_a32(uint32_t fetchdat) seteaw(temp); if (abrt) return 1; if (tempc) flags |= C_FLAG; else flags &= ~C_FLAG; - cycles -= 6; + CLOCK_CYCLES(6); return 0; } @@ -231,7 +231,7 @@ static int opBA_l_a16(uint32_t fetchdat) case 0x20: /*BT w,imm*/ if (tempc) flags |= C_FLAG; else flags &= ~C_FLAG; - cycles -= 3; + CLOCK_CYCLES(3); return 0; case 0x28: /*BTS w,imm*/ temp |= (1 << count); @@ -252,7 +252,7 @@ static int opBA_l_a16(uint32_t fetchdat) seteal(temp); if (abrt) return 1; if (tempc) flags |= C_FLAG; else flags &= ~C_FLAG; - cycles -= 6; + CLOCK_CYCLES(6); return 0; } static int opBA_l_a32(uint32_t fetchdat) @@ -271,7 +271,7 @@ static int opBA_l_a32(uint32_t fetchdat) case 0x20: /*BT w,imm*/ if (tempc) flags |= C_FLAG; else flags &= ~C_FLAG; - cycles -= 3; + CLOCK_CYCLES(3); return 0; case 0x28: /*BTS w,imm*/ temp |= (1 << count); @@ -292,6 +292,6 @@ static int opBA_l_a32(uint32_t fetchdat) seteal(temp); if (abrt) return 1; if (tempc) flags |= C_FLAG; else flags &= ~C_FLAG; - cycles -= 6; + CLOCK_CYCLES(6); return 0; } diff --git a/src/x86_ops_bitscan.h b/src/x86_ops_bitscan.h index 5c314e0..e2bd60c 100644 --- a/src/x86_ops_bitscan.h +++ b/src/x86_ops_bitscan.h @@ -6,7 +6,7 @@ flags &= ~Z_FLAG; \ for (c = start; c != end; c += dir) \ { \ - cycles -= time; \ + CLOCK_CYCLES(time); \ if (temp & (1 << c)) \ { \ dest = c; \ @@ -26,7 +26,7 @@ static int opBSF_w_a16(uint32_t fetchdat) BS_common(0, 16, 1, regs[reg].w, (is486) ? 1 : 3); - cycles -= (is486) ? 6 : 10; + CLOCK_CYCLES((is486) ? 6 : 10); return 0; } static int opBSF_w_a32(uint32_t fetchdat) @@ -38,7 +38,7 @@ static int opBSF_w_a32(uint32_t fetchdat) BS_common(0, 16, 1, regs[reg].w, (is486) ? 1 : 3); - cycles -= (is486) ? 6 : 10; + CLOCK_CYCLES((is486) ? 6 : 10); return 0; } static int opBSF_l_a16(uint32_t fetchdat) @@ -50,7 +50,7 @@ static int opBSF_l_a16(uint32_t fetchdat) BS_common(0, 32, 1, regs[reg].l, (is486) ? 1 : 3); - cycles -= (is486) ? 6 : 10; + CLOCK_CYCLES((is486) ? 6 : 10); return 0; } static int opBSF_l_a32(uint32_t fetchdat) @@ -62,7 +62,7 @@ static int opBSF_l_a32(uint32_t fetchdat) BS_common(0, 32, 1, regs[reg].l, (is486) ? 1 : 3); - cycles -= (is486) ? 6 : 10; + CLOCK_CYCLES((is486) ? 6 : 10); return 0; } @@ -75,7 +75,7 @@ static int opBSR_w_a16(uint32_t fetchdat) BS_common(15, -1, -1, regs[reg].w, 3); - cycles -= (is486) ? 6 : 10; + CLOCK_CYCLES((is486) ? 6 : 10); return 0; } static int opBSR_w_a32(uint32_t fetchdat) @@ -87,7 +87,7 @@ static int opBSR_w_a32(uint32_t fetchdat) BS_common(15, -1, -1, regs[reg].w, 3); - cycles -= (is486) ? 6 : 10; + CLOCK_CYCLES((is486) ? 6 : 10); return 0; } static int opBSR_l_a16(uint32_t fetchdat) @@ -99,7 +99,7 @@ static int opBSR_l_a16(uint32_t fetchdat) BS_common(31, -1, -1, regs[reg].l, 3); - cycles -= (is486) ? 6 : 10; + CLOCK_CYCLES((is486) ? 6 : 10); return 0; } static int opBSR_l_a32(uint32_t fetchdat) @@ -111,7 +111,7 @@ static int opBSR_l_a32(uint32_t fetchdat) BS_common(31, -1, -1, regs[reg].l, 3); - cycles -= (is486) ? 6 : 10; + CLOCK_CYCLES((is486) ? 6 : 10); return 0; } diff --git a/src/x86_ops_call.h b/src/x86_ops_call.h index 3c697a8..24fb06a 100644 --- a/src/x86_ops_call.h +++ b/src/x86_ops_call.h @@ -60,7 +60,7 @@ static int opCALL_far_w(uint32_t fetchdat) CALL_FAR_w(new_cs, new_pc); CPU_BLOCK_END(); - cycles -= is486 ? 18 : 17; + CLOCK_CYCLES(is486 ? 18 : 17); return 0; } static int opCALL_far_l(uint32_t fetchdat) @@ -74,7 +74,7 @@ static int opCALL_far_l(uint32_t fetchdat) CALL_FAR_l(new_cs, new_pc); CPU_BLOCK_END(); - cycles -= is486 ? 18 : 17; + CLOCK_CYCLES(is486 ? 18 : 17); return 0; } @@ -94,21 +94,21 @@ static int opFF_w_a16(uint32_t fetchdat) temp = geteaw(); if (abrt) return 1; seteaw(temp + 1); if (abrt) return 1; setadd16nc(temp, 1); - cycles -= (mod == 3) ? timing_rr : timing_mm; + CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mm); break; case 0x08: /*DEC w*/ temp = geteaw(); if (abrt) return 1; seteaw(temp - 1); if (abrt) return 1; setsub16nc(temp, 1); - cycles -= (mod == 3) ? timing_rr : timing_mm; + CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mm); break; case 0x10: /*CALL*/ new_pc = geteaw(); if (abrt) return 1; PUSH_W(pc); pc = new_pc; CPU_BLOCK_END(); - if (is486) cycles -= 5; - else cycles -= ((mod == 3) ? 7 : 10); + if (is486) CLOCK_CYCLES(5); + else CLOCK_CYCLES((mod == 3) ? 7 : 10); break; case 0x18: /*CALL far*/ new_pc = readmemw(easeg, eaaddr); @@ -117,14 +117,14 @@ static int opFF_w_a16(uint32_t fetchdat) CALL_FAR_w(new_cs, new_pc); CPU_BLOCK_END(); - cycles -= is486 ? 17 : 22; + CLOCK_CYCLES(is486 ? 17 : 22); break; case 0x20: /*JMP*/ new_pc = geteaw(); if (abrt) return 1; pc = new_pc; CPU_BLOCK_END(); - if (is486) cycles -= 5; - else cycles -= ((mod == 3) ? 7 : 10); + if (is486) CLOCK_CYCLES(5); + else CLOCK_CYCLES((mod == 3) ? 7 : 10); break; case 0x28: /*JMP far*/ oxpc = pc; @@ -133,12 +133,12 @@ static int opFF_w_a16(uint32_t fetchdat) pc = new_pc; loadcsjmp(new_cs, oxpc); if (abrt) return 1; CPU_BLOCK_END(); - cycles -= is486 ? 13 : 12; + CLOCK_CYCLES(is486 ? 13 : 12); break; case 0x30: /*PUSH w*/ temp = geteaw(); if (abrt) return 1; PUSH_W(temp); - cycles -= ((mod == 3) ? 2 : 5); + CLOCK_CYCLES((mod == 3) ? 2 : 5); break; default: @@ -162,21 +162,21 @@ static int opFF_w_a32(uint32_t fetchdat) temp = geteaw(); if (abrt) return 1; seteaw(temp + 1); if (abrt) return 1; setadd16nc(temp, 1); - cycles -= (mod == 3) ? timing_rr : timing_mm; + CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mm); break; case 0x08: /*DEC w*/ temp = geteaw(); if (abrt) return 1; seteaw(temp - 1); if (abrt) return 1; setsub16nc(temp, 1); - cycles -= (mod == 3) ? timing_rr : timing_mm; + CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mm); break; case 0x10: /*CALL*/ new_pc = geteaw(); if (abrt) return 1; PUSH_W(pc); pc = new_pc; CPU_BLOCK_END(); - if (is486) cycles -= 5; - else cycles -= ((mod == 3) ? 7 : 10); + if (is486) CLOCK_CYCLES(5); + else CLOCK_CYCLES((mod == 3) ? 7 : 10); break; case 0x18: /*CALL far*/ new_pc = readmemw(easeg, eaaddr); @@ -185,14 +185,14 @@ static int opFF_w_a32(uint32_t fetchdat) CALL_FAR_w(new_cs, new_pc); CPU_BLOCK_END(); - cycles -= is486 ? 17 : 22; + CLOCK_CYCLES(is486 ? 17 : 22); break; case 0x20: /*JMP*/ new_pc = geteaw(); if (abrt) return 1; pc = new_pc; CPU_BLOCK_END(); - if (is486) cycles -= 5; - else cycles -= ((mod == 3) ? 7 : 10); + if (is486) CLOCK_CYCLES(5); + else CLOCK_CYCLES((mod == 3) ? 7 : 10); break; case 0x28: /*JMP far*/ oxpc = pc; @@ -201,12 +201,12 @@ static int opFF_w_a32(uint32_t fetchdat) pc = new_pc; loadcsjmp(new_cs, oxpc); if (abrt) return 1; CPU_BLOCK_END(); - cycles -= is486 ? 13 : 12; + CLOCK_CYCLES(is486 ? 13 : 12); break; case 0x30: /*PUSH w*/ temp = geteaw(); if (abrt) return 1; PUSH_W(temp); - cycles -= ((mod == 3) ? 2 : 5); + CLOCK_CYCLES((mod == 3) ? 2 : 5); break; default: @@ -231,21 +231,21 @@ static int opFF_l_a16(uint32_t fetchdat) temp = geteal(); if (abrt) return 1; seteal(temp + 1); if (abrt) return 1; setadd32nc(temp, 1); - cycles -= (mod == 3) ? timing_rr : timing_mm; + CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mm); break; case 0x08: /*DEC l*/ temp = geteal(); if (abrt) return 1; seteal(temp - 1); if (abrt) return 1; setsub32nc(temp, 1); - cycles -= (mod == 3) ? timing_rr : timing_mm; + CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mm); break; case 0x10: /*CALL*/ new_pc = geteal(); if (abrt) return 1; PUSH_L(pc); pc = new_pc; CPU_BLOCK_END(); - if (is486) cycles -= 5; - else cycles -= ((mod == 3) ? 7 : 10); + if (is486) CLOCK_CYCLES(5); + else CLOCK_CYCLES((mod == 3) ? 7 : 10); break; case 0x18: /*CALL far*/ new_pc = readmeml(easeg, eaaddr); @@ -254,14 +254,14 @@ static int opFF_l_a16(uint32_t fetchdat) CALL_FAR_l(new_cs, new_pc); CPU_BLOCK_END(); - cycles -= is486 ? 17 : 22; + CLOCK_CYCLES(is486 ? 17 : 22); break; case 0x20: /*JMP*/ new_pc = geteal(); if (abrt) return 1; pc = new_pc; CPU_BLOCK_END(); - if (is486) cycles -= 5; - else cycles -= ((mod == 3) ? 7 : 10); + if (is486) CLOCK_CYCLES(5); + else CLOCK_CYCLES((mod == 3) ? 7 : 10); break; case 0x28: /*JMP far*/ oxpc = pc; @@ -270,12 +270,12 @@ static int opFF_l_a16(uint32_t fetchdat) pc = new_pc; loadcsjmp(new_cs, oxpc); if (abrt) return 1; CPU_BLOCK_END(); - cycles -= is486 ? 13 : 12; + CLOCK_CYCLES(is486 ? 13 : 12); break; case 0x30: /*PUSH l*/ temp = geteal(); if (abrt) return 1; PUSH_L(temp); - cycles -= ((mod == 3) ? 2 : 5); + CLOCK_CYCLES((mod == 3) ? 2 : 5); break; default: @@ -299,21 +299,21 @@ static int opFF_l_a32(uint32_t fetchdat) temp = geteal(); if (abrt) return 1; seteal(temp + 1); if (abrt) return 1; setadd32nc(temp, 1); - cycles -= (mod == 3) ? timing_rr : timing_mm; + CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mm); break; case 0x08: /*DEC l*/ temp = geteal(); if (abrt) return 1; seteal(temp - 1); if (abrt) return 1; setsub32nc(temp, 1); - cycles -= (mod == 3) ? timing_rr : timing_mm; + CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mm); break; case 0x10: /*CALL*/ new_pc = geteal(); if (abrt) return 1; PUSH_L(pc); if (abrt) return 1; pc = new_pc; CPU_BLOCK_END(); - if (is486) cycles -= 5; - else cycles -= ((mod == 3) ? 7 : 10); + if (is486) CLOCK_CYCLES(5); + else CLOCK_CYCLES((mod == 3) ? 7 : 10); break; case 0x18: /*CALL far*/ new_pc = readmeml(easeg, eaaddr); @@ -322,14 +322,14 @@ static int opFF_l_a32(uint32_t fetchdat) CALL_FAR_l(new_cs, new_pc); CPU_BLOCK_END(); - cycles -= is486 ? 17 : 22; + CLOCK_CYCLES(is486 ? 17 : 22); break; case 0x20: /*JMP*/ new_pc = geteal(); if (abrt) return 1; pc = new_pc; CPU_BLOCK_END(); - if (is486) cycles -= 5; - else cycles -= ((mod == 3) ? 7 : 10); + if (is486) CLOCK_CYCLES(5); + else CLOCK_CYCLES((mod == 3) ? 7 : 10); break; case 0x28: /*JMP far*/ oxpc = pc; @@ -338,12 +338,12 @@ static int opFF_l_a32(uint32_t fetchdat) pc = new_pc; loadcsjmp(new_cs, oxpc); if (abrt) return 1; CPU_BLOCK_END(); - cycles -= is486 ? 13 : 12; + CLOCK_CYCLES(is486 ? 13 : 12); break; case 0x30: /*PUSH l*/ temp = geteal(); if (abrt) return 1; PUSH_L(temp); - cycles -= ((mod == 3) ? 2 : 5); + CLOCK_CYCLES((mod == 3) ? 2 : 5); break; default: diff --git a/src/x86_ops_flag.h b/src/x86_ops_flag.h index bc50538..a6444cf 100644 --- a/src/x86_ops_flag.h +++ b/src/x86_ops_flag.h @@ -2,7 +2,7 @@ static int opCMC(uint32_t fetchdat) { flags_rebuild(); flags ^= C_FLAG; - cycles -= 2; + CLOCK_CYCLES(2); return 0; } @@ -11,13 +11,13 @@ static int opCLC(uint32_t fetchdat) { flags_rebuild(); flags &= ~C_FLAG; - cycles -= 2; + CLOCK_CYCLES(2); return 0; } static int opCLD(uint32_t fetchdat) { flags &= ~D_FLAG; - cycles -= 2; + CLOCK_CYCLES(2); return 0; } static int opCLI(uint32_t fetchdat) @@ -32,7 +32,7 @@ static int opCLI(uint32_t fetchdat) CPU_BLOCK_END(); - cycles -= 3; + CLOCK_CYCLES(3); return 0; } @@ -40,13 +40,13 @@ static int opSTC(uint32_t fetchdat) { flags_rebuild(); flags |= C_FLAG; - cycles -= 2; + CLOCK_CYCLES(2); return 0; } static int opSTD(uint32_t fetchdat) { flags |= D_FLAG; - cycles -= 2; + CLOCK_CYCLES(2); return 0; } static int opSTI(uint32_t fetchdat) @@ -61,7 +61,7 @@ static int opSTI(uint32_t fetchdat) CPU_BLOCK_END(); - cycles -= 2; + CLOCK_CYCLES(2); return 0; } @@ -69,14 +69,14 @@ static int opSAHF(uint32_t fetchdat) { flags_rebuild(); flags = (flags & 0xff00) | (AH & 0xd5) | 2; - cycles -= 3; + CLOCK_CYCLES(3); return 0; } static int opLAHF(uint32_t fetchdat) { flags_rebuild(); AH = flags & 0xff; - cycles -= 3; + CLOCK_CYCLES(3); return 0; } @@ -89,7 +89,7 @@ static int opPUSHF(uint32_t fetchdat) } flags_rebuild(); PUSH_W(flags); - cycles -= 4; + CLOCK_CYCLES(4); return abrt; } static int opPUSHFD(uint32_t fetchdat) @@ -104,7 +104,7 @@ static int opPUSHFD(uint32_t fetchdat) else tempw = eflags & 4; flags_rebuild(); PUSH_L(flags | (tempw << 16)); - cycles -= 4; + CLOCK_CYCLES(4); return abrt; } @@ -126,7 +126,7 @@ static int opPOPF_286(uint32_t fetchdat) else flags = (flags & 0x3200) | (tempw & 0x4dd5) | 2; flags_extract(); - cycles -= 5; + CLOCK_CYCLES(5); return 0; } static int opPOPF(uint32_t fetchdat) @@ -146,7 +146,7 @@ static int opPOPF(uint32_t fetchdat) else flags = (flags & 0x3200) | (tempw & 0xcdd5) | 2; flags_extract(); - cycles -= 5; + CLOCK_CYCLES(5); return 0; } static int opPOPFD(uint32_t fetchdat) @@ -173,6 +173,6 @@ static int opPOPFD(uint32_t fetchdat) flags_extract(); - cycles -= 5; + CLOCK_CYCLES(5); return 0; } diff --git a/src/x86_ops_fpu.h b/src/x86_ops_fpu.h index fc1c162..d8ef076 100644 --- a/src/x86_ops_fpu.h +++ b/src/x86_ops_fpu.h @@ -77,6 +77,6 @@ static int opWAIT(uint32_t fetchdat) x86_int(7); return 1; } - cycles -= 4; + CLOCK_CYCLES(4); return 0; } diff --git a/src/x86_ops_inc_dec.h b/src/x86_ops_inc_dec.h index b4dfd02..59f1793 100644 --- a/src/x86_ops_inc_dec.h +++ b/src/x86_ops_inc_dec.h @@ -3,7 +3,7 @@ { \ setflags(reg, 1); \ reg += inc; \ - cycles -= timing_rr; \ + CLOCK_CYCLES(timing_rr); \ return 0; \ } @@ -61,7 +61,7 @@ static int opINCDEC_b_a16(uint32_t fetchdat) seteab(temp + 1); if (abrt) return 1; setadd8nc(temp, 1); } - cycles -= (mod == 3) ? timing_rr : timing_mm; + CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mm); return 0; } static int opINCDEC_b_a32(uint32_t fetchdat) @@ -81,6 +81,6 @@ static int opINCDEC_b_a32(uint32_t fetchdat) seteab(temp + 1); if (abrt) return 1; setadd8nc(temp, 1); } - cycles -= (mod == 3) ? timing_rr : timing_mm; + CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mm); return 0; } diff --git a/src/x86_ops_int.h b/src/x86_ops_int.h index 2ec151d..ee0580e 100644 --- a/src/x86_ops_int.h +++ b/src/x86_ops_int.h @@ -6,7 +6,7 @@ static int opINT3(uint32_t fetchdat) return 1; } x86_int_sw(3); - cycles -= (is486) ? 44 : 59; + CLOCK_CYCLES((is486) ? 44 : 59); return 1; } @@ -71,7 +71,7 @@ static int opINTO(uint32_t fetchdat) x86_int_sw(4); return 1; } - cycles -= 3; + CLOCK_CYCLES(3); return 0; } diff --git a/src/x86_ops_io.h b/src/x86_ops_io.h index bf5b782..3c9fcd7 100644 --- a/src/x86_ops_io.h +++ b/src/x86_ops_io.h @@ -3,7 +3,7 @@ static int opIN_AL_imm(uint32_t fetchdat) uint16_t port = (uint16_t)getbytef(); check_io_perm(port); AL = inb(port); - cycles -= 12; + CLOCK_CYCLES(12); return 0; } static int opIN_AX_imm(uint32_t fetchdat) @@ -12,7 +12,7 @@ static int opIN_AX_imm(uint32_t fetchdat) check_io_perm(port); check_io_perm(port + 1); AX = inw(port); - cycles -= 12; + CLOCK_CYCLES(12); return 0; } static int opIN_EAX_imm(uint32_t fetchdat) @@ -23,7 +23,7 @@ static int opIN_EAX_imm(uint32_t fetchdat) check_io_perm(port + 2); check_io_perm(port + 3); EAX = inl(port); - cycles -= 12; + CLOCK_CYCLES(12); return 0; } @@ -32,7 +32,7 @@ static int opOUT_AL_imm(uint32_t fetchdat) uint16_t port = (uint16_t)getbytef(); check_io_perm(port); outb(port, AL); - cycles -= 10; + CLOCK_CYCLES(10); return 0; } static int opOUT_AX_imm(uint32_t fetchdat) @@ -41,7 +41,7 @@ static int opOUT_AX_imm(uint32_t fetchdat) check_io_perm(port); check_io_perm(port + 1); outw(port, AX); - cycles -= 10; + CLOCK_CYCLES(10); return 0; } static int opOUT_EAX_imm(uint32_t fetchdat) @@ -52,7 +52,7 @@ static int opOUT_EAX_imm(uint32_t fetchdat) check_io_perm(port + 2); check_io_perm(port + 3); outl(port, EAX); - cycles -= 10; + CLOCK_CYCLES(10); return 0; } @@ -60,7 +60,7 @@ static int opIN_AL_DX(uint32_t fetchdat) { check_io_perm(DX); AL = inb(DX); - cycles -= 12; + CLOCK_CYCLES(12); return 0; } static int opIN_AX_DX(uint32_t fetchdat) @@ -68,7 +68,7 @@ static int opIN_AX_DX(uint32_t fetchdat) check_io_perm(DX); check_io_perm(DX + 1); AX = inw(DX); - cycles -= 12; + CLOCK_CYCLES(12); return 0; } static int opIN_EAX_DX(uint32_t fetchdat) @@ -78,7 +78,7 @@ static int opIN_EAX_DX(uint32_t fetchdat) check_io_perm(DX + 2); check_io_perm(DX + 3); EAX = inl(DX); - cycles -= 12; + CLOCK_CYCLES(12); return 0; } @@ -86,7 +86,7 @@ static int opOUT_AL_DX(uint32_t fetchdat) { check_io_perm(DX); outb(DX, AL); - cycles -= 11; + CLOCK_CYCLES(11); return 0; } static int opOUT_AX_DX(uint32_t fetchdat) @@ -95,7 +95,7 @@ static int opOUT_AX_DX(uint32_t fetchdat) check_io_perm(DX); check_io_perm(DX + 1); outw(DX, AX); - cycles -= 11; + CLOCK_CYCLES(11); return 0; } static int opOUT_EAX_DX(uint32_t fetchdat) @@ -105,6 +105,6 @@ static int opOUT_EAX_DX(uint32_t fetchdat) check_io_perm(DX + 2); check_io_perm(DX + 3); outl(DX, EAX); - cycles -= 11; + CLOCK_CYCLES(11); return 0; } diff --git a/src/x86_ops_jump.h b/src/x86_ops_jump.h index f5b6870..cf66872 100644 --- a/src/x86_ops_jump.h +++ b/src/x86_ops_jump.h @@ -19,11 +19,11 @@ static int opJ ## condition(uint32_t fetchdat) \ { \ int8_t offset = (int8_t)getbytef(); \ - cycles -= timing_bnt; \ + CLOCK_CYCLES(timing_bnt); \ if (cond_ ## condition) \ { \ pc += offset; \ - cycles -= timing_bt; \ + CLOCK_CYCLES_ALWAYS(timing_bt); \ CPU_BLOCK_END(); \ return 1; \ } \ @@ -33,11 +33,11 @@ static int opJ ## condition ## _w(uint32_t fetchdat) \ { \ int16_t offset = (int16_t)getwordf(); \ - cycles -= timing_bnt; \ + CLOCK_CYCLES(timing_bnt); \ if (cond_ ## condition) \ { \ pc += offset; \ - cycles -= timing_bt; \ + CLOCK_CYCLES_ALWAYS(timing_bt); \ CPU_BLOCK_END(); \ return 1; \ } \ @@ -47,11 +47,11 @@ static int opJ ## condition ## _l(uint32_t fetchdat) \ { \ uint32_t offset = getlong(); if (abrt) return 1; \ - cycles -= timing_bnt; \ + CLOCK_CYCLES(timing_bnt); \ if (cond_ ## condition) \ { \ pc += offset; \ - cycles -= timing_bt; \ + CLOCK_CYCLES_ALWAYS(timing_bt); \ CPU_BLOCK_END(); \ return 1; \ } \ @@ -81,7 +81,7 @@ static int opLOOPNE_w(uint32_t fetchdat) { int8_t offset = (int8_t)getbytef(); CX--; - cycles -= (is486) ? 7 : 11; + CLOCK_CYCLES((is486) ? 7 : 11); if (CX && !ZF_SET()) { pc += offset; @@ -94,7 +94,7 @@ static int opLOOPNE_l(uint32_t fetchdat) { int8_t offset = (int8_t)getbytef(); ECX--; - cycles -= (is486) ? 7 : 11; + CLOCK_CYCLES((is486) ? 7 : 11); if (ECX && !ZF_SET()) { pc += offset; @@ -108,7 +108,7 @@ static int opLOOPE_w(uint32_t fetchdat) { int8_t offset = (int8_t)getbytef(); CX--; - cycles -= (is486) ? 7 : 11; + CLOCK_CYCLES((is486) ? 7 : 11); if (CX && ZF_SET()) { pc += offset; @@ -121,7 +121,7 @@ static int opLOOPE_l(uint32_t fetchdat) { int8_t offset = (int8_t)getbytef(); ECX--; - cycles -= (is486) ? 7 : 11; + CLOCK_CYCLES((is486) ? 7 : 11); if (ECX && ZF_SET()) { pc += offset; @@ -135,7 +135,7 @@ static int opLOOP_w(uint32_t fetchdat) { int8_t offset = (int8_t)getbytef(); CX--; - cycles -= (is486) ? 7 : 11; + CLOCK_CYCLES((is486) ? 7 : 11); if (CX) { pc += offset; @@ -148,7 +148,7 @@ static int opLOOP_l(uint32_t fetchdat) { int8_t offset = (int8_t)getbytef(); ECX--; - cycles -= (is486) ? 7 : 11; + CLOCK_CYCLES((is486) ? 7 : 11); if (ECX) { pc += offset; @@ -161,11 +161,11 @@ static int opLOOP_l(uint32_t fetchdat) static int opJCXZ(uint32_t fetchdat) { int8_t offset = (int8_t)getbytef(); - cycles -= 5; + CLOCK_CYCLES(5); if (!CX) { pc += offset; - cycles -= 4; + CLOCK_CYCLES(4); CPU_BLOCK_END(); return 1; } @@ -174,11 +174,11 @@ static int opJCXZ(uint32_t fetchdat) static int opJECXZ(uint32_t fetchdat) { int8_t offset = (int8_t)getbytef(); - cycles -= 5; + CLOCK_CYCLES(5); if (!ECX) { pc += offset; - cycles -= 4; + CLOCK_CYCLES(4); CPU_BLOCK_END(); return 1; } @@ -191,7 +191,7 @@ static int opJMP_r8(uint32_t fetchdat) int8_t offset = (int8_t)getbytef(); pc += offset; CPU_BLOCK_END(); - cycles -= (is486) ? 3 : 7; + CLOCK_CYCLES((is486) ? 3 : 7); return 0; } static int opJMP_r16(uint32_t fetchdat) @@ -199,7 +199,7 @@ static int opJMP_r16(uint32_t fetchdat) int16_t offset = (int16_t)getwordf(); pc += offset; CPU_BLOCK_END(); - cycles -= (is486) ? 3 : 7; + CLOCK_CYCLES((is486) ? 3 : 7); return 0; } static int opJMP_r32(uint32_t fetchdat) @@ -207,7 +207,7 @@ static int opJMP_r32(uint32_t fetchdat) int32_t offset = (int32_t)getlong(); if (abrt) return 1; pc += offset; CPU_BLOCK_END(); - cycles -= (is486) ? 3 : 7; + CLOCK_CYCLES((is486) ? 3 : 7); return 0; } @@ -219,7 +219,7 @@ static int opJMP_far_a16(uint32_t fetchdat) pc = addr; loadcsjmp(seg, oxpc); CPU_BLOCK_END(); - cycles -= (is486) ? 17 : 12; + CLOCK_CYCLES((is486) ? 17 : 12); return 0; } static int opJMP_far_a32(uint32_t fetchdat) @@ -230,7 +230,7 @@ static int opJMP_far_a32(uint32_t fetchdat) pc = addr; loadcsjmp(seg, oxpc); CPU_BLOCK_END(); - cycles -= (is486) ? 17 : 12; + CLOCK_CYCLES((is486) ? 17 : 12); return 0; } @@ -240,7 +240,7 @@ static int opCALL_r16(uint32_t fetchdat) PUSH_W(pc); pc += addr; CPU_BLOCK_END(); - cycles -= (is486) ? 3 : 7; + CLOCK_CYCLES((is486) ? 3 : 7); return 0; } static int opCALL_r32(uint32_t fetchdat) @@ -249,7 +249,7 @@ static int opCALL_r32(uint32_t fetchdat) PUSH_L(pc); pc += addr; CPU_BLOCK_END(); - cycles -= (is486) ? 3 : 7; + CLOCK_CYCLES((is486) ? 3 : 7); return 0; } @@ -261,7 +261,7 @@ static int opRET_w(uint32_t fetchdat) pc = ret; CPU_BLOCK_END(); - cycles -= (is486) ? 5 : 10; + CLOCK_CYCLES((is486) ? 5 : 10); return 0; } static int opRET_l(uint32_t fetchdat) @@ -272,7 +272,7 @@ static int opRET_l(uint32_t fetchdat) pc = ret; CPU_BLOCK_END(); - cycles -= (is486) ? 5 : 10; + CLOCK_CYCLES((is486) ? 5 : 10); return 0; } @@ -287,7 +287,7 @@ static int opRET_w_imm(uint32_t fetchdat) pc = ret; CPU_BLOCK_END(); - cycles -= (is486) ? 5 : 10; + CLOCK_CYCLES((is486) ? 5 : 10); return 0; } static int opRET_l_imm(uint32_t fetchdat) @@ -301,7 +301,7 @@ static int opRET_l_imm(uint32_t fetchdat) pc = ret; CPU_BLOCK_END(); - cycles -= (is486) ? 5 : 10; + CLOCK_CYCLES((is486) ? 5 : 10); return 0; } diff --git a/src/x86_ops_misc.h b/src/x86_ops_misc.h index ba8eea9..fb685d6 100644 --- a/src/x86_ops_misc.h +++ b/src/x86_ops_misc.h @@ -1,38 +1,38 @@ static int opCBW(uint32_t fetchdat) { AH = (AL & 0x80) ? 0xff : 0; - cycles -= 3; + CLOCK_CYCLES(3); return 0; } static int opCWDE(uint32_t fetchdat) { EAX = (AX & 0x8000) ? (0xffff0000 | AX) : AX; - cycles -= 3; + CLOCK_CYCLES(3); return 0; } static int opCWD(uint32_t fetchdat) { DX = (AX & 0x8000) ? 0xFFFF : 0; - cycles -= 2; + CLOCK_CYCLES(2); return 0; } static int opCDQ(uint32_t fetchdat) { EDX = (EAX & 0x80000000) ? 0xffffffff : 0; - cycles -= 2; + CLOCK_CYCLES(2); return 0; } static int opNOP(uint32_t fetchdat) { - cycles -= (is486) ? 1 : 3; + CLOCK_CYCLES((is486) ? 1 : 3); return 0; } static int opSETALC(uint32_t fetchdat) { AL = (CF_SET()) ? 0xff : 0; - cycles -= timing_rr; + CLOCK_CYCLES(timing_rr); return 0; } @@ -52,24 +52,24 @@ static int opF6_a16(uint32_t fetchdat) case 0x00: /*TEST b,#8*/ src = readmemb(cs, pc); pc++; if (abrt) return 1; setznp8(src & dst); - if (is486) cycles -= ((mod == 3) ? 1 : 2); - else cycles -= ((mod == 3) ? 2 : 5); + if (is486) CLOCK_CYCLES((mod == 3) ? 1 : 2); + else CLOCK_CYCLES((mod == 3) ? 2 : 5); break; case 0x10: /*NOT b*/ seteab(~dst); if (abrt) return 1; - cycles -= (mod == 3) ? timing_rr : timing_mm; + CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mm); break; case 0x18: /*NEG b*/ seteab(0 - dst); if (abrt) return 1; setsub8(0, dst); - cycles -= (mod == 3) ? timing_rr : timing_mm; + CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mm); break; case 0x20: /*MUL AL,b*/ AX = AL * dst; flags_rebuild(); if (AH) flags |= (C_FLAG | V_FLAG); else flags &= ~(C_FLAG | V_FLAG); - cycles -= 13; + CLOCK_CYCLES(13); break; case 0x28: /*IMUL AL,b*/ tempws = (int)((int8_t)AL) * (int)((int8_t)dst); @@ -77,7 +77,7 @@ static int opF6_a16(uint32_t fetchdat) flags_rebuild(); if (((int16_t)AX >> 7) != 0 && ((int16_t)AX >> 7) != -1) flags |= (C_FLAG | V_FLAG); else flags &= ~(C_FLAG | V_FLAG); - cycles -= 14; + CLOCK_CYCLES(14); break; case 0x30: /*DIV AL,b*/ src16 = AX; @@ -96,7 +96,7 @@ static int opF6_a16(uint32_t fetchdat) { x86_int(0); } - cycles -= is486 ? 16 : 14; + CLOCK_CYCLES(is486 ? 16 : 14); break; case 0x38: /*IDIV AL,b*/ tempws = (int)(int16_t)AX; @@ -117,7 +117,7 @@ static int opF6_a16(uint32_t fetchdat) // pclog("IDIVb exception - %X / %08X = %X\n", tempws, dst, tempws2); x86_int(0); } - cycles -= 19; + CLOCK_CYCLES(19); break; default: @@ -140,24 +140,24 @@ static int opF6_a32(uint32_t fetchdat) case 0x00: /*TEST b,#8*/ src = readmemb(cs, pc); pc++; if (abrt) return 1; setznp8(src & dst); - if (is486) cycles -= ((mod == 3) ? 1 : 2); - else cycles -= ((mod == 3) ? 2 : 5); + if (is486) CLOCK_CYCLES((mod == 3) ? 1 : 2); + else CLOCK_CYCLES((mod == 3) ? 2 : 5); break; case 0x10: /*NOT b*/ seteab(~dst); if (abrt) return 1; - cycles -= (mod == 3) ? timing_rr : timing_mm; + CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mm); break; case 0x18: /*NEG b*/ seteab(0 - dst); if (abrt) return 1; setsub8(0, dst); - cycles -= (mod == 3) ? timing_rr : timing_mm; + CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mm); break; case 0x20: /*MUL AL,b*/ AX = AL * dst; flags_rebuild(); if (AH) flags |= (C_FLAG | V_FLAG); else flags &= ~(C_FLAG | V_FLAG); - cycles -= 13; + CLOCK_CYCLES(13); break; case 0x28: /*IMUL AL,b*/ tempws = (int)((int8_t)AL) * (int)((int8_t)dst); @@ -165,7 +165,7 @@ static int opF6_a32(uint32_t fetchdat) flags_rebuild(); if (((int16_t)AX >> 7) != 0 && ((int16_t)AX >> 7) != -1) flags |= (C_FLAG | V_FLAG); else flags &= ~(C_FLAG | V_FLAG); - cycles -= 14; + CLOCK_CYCLES(14); break; case 0x30: /*DIV AL,b*/ src16 = AX; @@ -184,7 +184,7 @@ static int opF6_a32(uint32_t fetchdat) { x86_int(0); } - cycles -= is486 ? 16 : 14; + CLOCK_CYCLES(is486 ? 16 : 14); break; case 0x38: /*IDIV AL,b*/ tempws = (int)(int16_t)AX; @@ -205,7 +205,7 @@ static int opF6_a32(uint32_t fetchdat) // pclog("IDIVb exception - %X / %08X = %X\n", tempws, dst, tempws2); x86_int(0); } - cycles -= 19; + CLOCK_CYCLES(19); break; default: @@ -231,17 +231,17 @@ static int opF7_w_a16(uint32_t fetchdat) case 0x00: /*TEST w*/ src = getword(); if (abrt) return 1; setznp16(src & dst); - if (is486) cycles -= ((mod == 3) ? 1 : 2); - else cycles -= ((mod == 3) ? 2 : 5); + if (is486) CLOCK_CYCLES((mod == 3) ? 1 : 2); + else CLOCK_CYCLES((mod == 3) ? 2 : 5); break; case 0x10: /*NOT w*/ seteaw(~dst); if (abrt) return 1; - cycles -= (mod == 3) ? timing_rr : timing_mm; + CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mm); break; case 0x18: /*NEG w*/ seteaw(0 - dst); if (abrt) return 1; setsub16(0, dst); - cycles -= (mod == 3) ? timing_rr : timing_mm; + CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mm); break; case 0x20: /*MUL AX,w*/ templ = AX * dst; @@ -250,7 +250,7 @@ static int opF7_w_a16(uint32_t fetchdat) flags_rebuild(); if (DX) flags |= (C_FLAG | V_FLAG); else flags &= ~(C_FLAG | V_FLAG); - cycles -= 21; + CLOCK_CYCLES(21); break; case 0x28: /*IMUL AX,w*/ templ = (int)((int16_t)AX) * (int)((int16_t)dst); @@ -259,7 +259,7 @@ static int opF7_w_a16(uint32_t fetchdat) flags_rebuild(); if (((int32_t)templ >> 15) != 0 && ((int32_t)templ >> 15) != -1) flags |= (C_FLAG | V_FLAG); else flags &= ~(C_FLAG | V_FLAG); - cycles -= 22; + CLOCK_CYCLES(22); break; case 0x30: /*DIV AX,w*/ templ = (DX << 16) | AX; @@ -275,7 +275,7 @@ static int opF7_w_a16(uint32_t fetchdat) // fatal("DIVw BY 0 %04X:%04X %i\n",cs>>4,pc,ins); x86_int(0); } - cycles -= is486 ? 24 : 22; + CLOCK_CYCLES(is486 ? 24 : 22); break; case 0x38: /*IDIV AX,w*/ tempws = (int)((DX << 16)|AX); @@ -292,7 +292,7 @@ static int opF7_w_a16(uint32_t fetchdat) // pclog("IDIVw exception - %X / %08X = %X\n",tempws, dst, tempws2); x86_int(0); } - cycles -= 27; + CLOCK_CYCLES(27); break; default: @@ -315,17 +315,17 @@ static int opF7_w_a32(uint32_t fetchdat) case 0x00: /*TEST w*/ src = getword(); if (abrt) return 1; setznp16(src & dst); - if (is486) cycles -= ((mod == 3) ? 1 : 2); - else cycles -= ((mod == 3) ? 2 : 5); + if (is486) CLOCK_CYCLES((mod == 3) ? 1 : 2); + else CLOCK_CYCLES((mod == 3) ? 2 : 5); break; case 0x10: /*NOT w*/ seteaw(~dst); if (abrt) return 1; - cycles -= (mod == 3) ? timing_rr : timing_mm; + CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mm); break; case 0x18: /*NEG w*/ seteaw(0 - dst); if (abrt) return 1; setsub16(0, dst); - cycles -= (mod == 3) ? timing_rr : timing_mm; + CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mm); break; case 0x20: /*MUL AX,w*/ templ = AX * dst; @@ -334,7 +334,7 @@ static int opF7_w_a32(uint32_t fetchdat) flags_rebuild(); if (DX) flags |= (C_FLAG | V_FLAG); else flags &= ~(C_FLAG | V_FLAG); - cycles -= 21; + CLOCK_CYCLES(21); break; case 0x28: /*IMUL AX,w*/ templ = (int)((int16_t)AX) * (int)((int16_t)dst); @@ -343,7 +343,7 @@ static int opF7_w_a32(uint32_t fetchdat) flags_rebuild(); if (((int32_t)templ >> 15) != 0 && ((int32_t)templ >> 15) != -1) flags |= (C_FLAG | V_FLAG); else flags &= ~(C_FLAG | V_FLAG); - cycles -= 22; + CLOCK_CYCLES(22); break; case 0x30: /*DIV AX,w*/ templ = (DX << 16) | AX; @@ -359,7 +359,7 @@ static int opF7_w_a32(uint32_t fetchdat) // fatal("DIVw BY 0 %04X:%04X %i\n",cs>>4,pc,ins); x86_int(0); } - cycles -= is486 ? 24 : 22; + CLOCK_CYCLES(is486 ? 24 : 22); break; case 0x38: /*IDIV AX,w*/ tempws = (int)((DX << 16)|AX); @@ -376,7 +376,7 @@ static int opF7_w_a32(uint32_t fetchdat) // pclog("IDIVw exception - %X / %08X = %X\n", tempws, dst, tempws2); x86_int(0); } - cycles -= 27; + CLOCK_CYCLES(27); break; default: @@ -399,17 +399,17 @@ static int opF7_l_a16(uint32_t fetchdat) case 0x00: /*TEST l*/ src = getlong(); if (abrt) return 1; setznp32(src & dst); - if (is486) cycles -= ((mod == 3) ? 1 : 2); - else cycles -= ((mod == 3) ? 2 : 5); + if (is486) CLOCK_CYCLES((mod == 3) ? 1 : 2); + else CLOCK_CYCLES((mod == 3) ? 2 : 5); break; case 0x10: /*NOT l*/ seteal(~dst); if (abrt) return 1; - cycles -= (mod == 3) ? timing_rr : timing_mml; + CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mml); break; case 0x18: /*NEG l*/ seteal(0 - dst); if (abrt) return 1; setsub32(0, dst); - cycles -= (mod == 3) ? timing_rr : timing_mml; + CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mml); break; case 0x20: /*MUL EAX,l*/ temp64 = (uint64_t)EAX * (uint64_t)dst; @@ -418,7 +418,7 @@ static int opF7_l_a16(uint32_t fetchdat) flags_rebuild(); if (EDX) flags |= (C_FLAG|V_FLAG); else flags &= ~(C_FLAG|V_FLAG); - cycles -= 21; + CLOCK_CYCLES(21); break; case 0x28: /*IMUL EAX,l*/ temp64 = (int64_t)(int32_t)EAX * (int64_t)(int32_t)dst; @@ -427,19 +427,19 @@ static int opF7_l_a16(uint32_t fetchdat) flags_rebuild(); if (((int64_t)temp64 >> 31) != 0 && ((int64_t)temp64 >> 31) != -1) flags |= (C_FLAG | V_FLAG); else flags &= ~(C_FLAG | V_FLAG); - cycles -= 38; + CLOCK_CYCLES(38); break; case 0x30: /*DIV EAX,l*/ if (divl(dst)) return 1; if (!cpu_iscyrix) setznp32(EAX); /*Not a Cyrix*/ - cycles -= (is486) ? 40 : 38; + CLOCK_CYCLES((is486) ? 40 : 38); break; case 0x38: /*IDIV EAX,l*/ if (idivl((int32_t)dst)) return 1; if (!cpu_iscyrix) setznp32(EAX); /*Not a Cyrix*/ - cycles -= 43; + CLOCK_CYCLES(43); break; default: @@ -461,17 +461,17 @@ static int opF7_l_a32(uint32_t fetchdat) case 0x00: /*TEST l*/ src = getlong(); if (abrt) return 1; setznp32(src & dst); - if (is486) cycles -= ((mod == 3) ? 1 : 2); - else cycles -= ((mod == 3) ? 2 : 5); + if (is486) CLOCK_CYCLES((mod == 3) ? 1 : 2); + else CLOCK_CYCLES((mod == 3) ? 2 : 5); break; case 0x10: /*NOT l*/ seteal(~dst); if (abrt) return 1; - cycles -= (mod == 3) ? timing_rr : timing_mml; + CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mml); break; case 0x18: /*NEG l*/ seteal(0 - dst); if (abrt) return 1; setsub32(0, dst); - cycles -= (mod == 3) ? timing_rr : timing_mml; + CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mml); break; case 0x20: /*MUL EAX,l*/ temp64 = (uint64_t)EAX * (uint64_t)dst; @@ -480,7 +480,7 @@ static int opF7_l_a32(uint32_t fetchdat) flags_rebuild(); if (EDX) flags |= (C_FLAG|V_FLAG); else flags &= ~(C_FLAG|V_FLAG); - cycles -= 21; + CLOCK_CYCLES(21); break; case 0x28: /*IMUL EAX,l*/ temp64 = (int64_t)(int32_t)EAX * (int64_t)(int32_t)dst; @@ -489,19 +489,19 @@ static int opF7_l_a32(uint32_t fetchdat) flags_rebuild(); if (((int64_t)temp64 >> 31) != 0 && ((int64_t)temp64 >> 31) != -1) flags |= (C_FLAG | V_FLAG); else flags &= ~(C_FLAG | V_FLAG); - cycles -= 38; + CLOCK_CYCLES(38); break; case 0x30: /*DIV EAX,l*/ if (divl(dst)) return 1; if (!cpu_iscyrix) setznp32(EAX); /*Not a Cyrix*/ - cycles -= (is486) ? 40 : 38; + CLOCK_CYCLES((is486) ? 40 : 38); break; case 0x38: /*IDIV EAX,l*/ if (idivl((int32_t)dst)) return 1; if (!cpu_iscyrix) setznp32(EAX); /*Not a Cyrix*/ - cycles -= 43; + CLOCK_CYCLES(43); break; default: @@ -521,11 +521,11 @@ static int opHLT(uint32_t fetchdat) } if (!((flags&I_FLAG) && pic_intpending)) { - cycles -= 100; + CLOCK_CYCLES(100); pc--; } else - cycles -= 5; + CLOCK_CYCLES(5); CPU_BLOCK_END(); @@ -535,7 +535,7 @@ static int opHLT(uint32_t fetchdat) static int opLOCK(uint32_t fetchdat) { - cycles -= 4; + CLOCK_CYCLES(4); return 0; } @@ -556,7 +556,7 @@ static int opBOUND_w_a16(uint32_t fetchdat) return 1; } - cycles -= is486 ? 7 : 10; + CLOCK_CYCLES(is486 ? 7 : 10); return 0; } static int opBOUND_w_a32(uint32_t fetchdat) @@ -574,7 +574,7 @@ static int opBOUND_w_a32(uint32_t fetchdat) return 1; } - cycles -= is486 ? 7 : 10; + CLOCK_CYCLES(is486 ? 7 : 10); return 0; } @@ -593,7 +593,7 @@ static int opBOUND_l_a16(uint32_t fetchdat) return 1; } - cycles -= is486 ? 7 : 10; + CLOCK_CYCLES(is486 ? 7 : 10); return 0; } static int opBOUND_l_a32(uint32_t fetchdat) @@ -611,7 +611,7 @@ static int opBOUND_l_a32(uint32_t fetchdat) return 1; } - cycles -= is486 ? 7 : 10; + CLOCK_CYCLES(is486 ? 7 : 10); return 0; } @@ -625,7 +625,7 @@ static int opCLTS(uint32_t fetchdat) return 1; } cr0 &= ~8; - cycles -= 5; + CLOCK_CYCLES(5); return 0; } @@ -636,7 +636,7 @@ static int opINVD(uint32_t fetchdat) x86illegal(); return 1; } - cycles -= 1000; + CLOCK_CYCLES(1000); CPU_BLOCK_END(); return 0; } @@ -647,7 +647,7 @@ static int opWBINVD(uint32_t fetchdat) x86illegal(); return 1; } - cycles -= 10000; + CLOCK_CYCLES(10000); CPU_BLOCK_END(); return 0; } @@ -675,7 +675,7 @@ static int opLOADALL(uint32_t fetchdat) cs = readmemw(0, 0x83C) | (readmemb(0, 0x83E) << 16); ss = readmemw(0, 0x842) | (readmemb(0, 0x844) << 16); ds = readmemw(0, 0x848) | (readmemb(0, 0x84A) << 16); - cycles-=195; + CLOCK_CYCLES(195); return 0; } @@ -684,7 +684,7 @@ static int opCPUID(uint32_t fetchdat) if (CPUID) { cpu_CPUID(); - cycles -= 9; + CLOCK_CYCLES(9); return 0; } pc = oldpc; @@ -697,7 +697,7 @@ static int opRDMSR(uint32_t fetchdat) if (cpu_hasMSR) { cpu_RDMSR(); - cycles -= 9; + CLOCK_CYCLES(9); return 0; } pc = oldpc; @@ -710,7 +710,7 @@ static int opWRMSR(uint32_t fetchdat) if (cpu_hasMSR) { cpu_WRMSR(); - cycles -= 9; + CLOCK_CYCLES(9); return 0; } pc = oldpc; diff --git a/src/x86_ops_mmx.h b/src/x86_ops_mmx.h index 4a31c3f..702070a 100644 --- a/src/x86_ops_mmx.h +++ b/src/x86_ops_mmx.h @@ -7,13 +7,13 @@ if (mod == 3) \ { \ src = MM[rm]; \ - cycles--; \ + CLOCK_CYCLES(1); \ } \ else \ { \ src.l[0] = readmeml(easeg, eaaddr); \ src.l[1] = readmeml(easeg, eaaddr + 4); if (abrt) return 1; \ - cycles -= 2; \ + CLOCK_CYCLES(2); \ } #define MMX_ENTER() \ @@ -44,6 +44,6 @@ static int opEMMS(uint32_t fetchdat) return 1; } x87_emms(); - cycles -= 100; /*Guess*/ + CLOCK_CYCLES(100); /*Guess*/ return 0; } diff --git a/src/x86_ops_mmx_arith.h b/src/x86_ops_mmx_arith.h index d98c6bf..4fcc9c4 100644 --- a/src/x86_ops_mmx_arith.h +++ b/src/x86_ops_mmx_arith.h @@ -288,7 +288,7 @@ static int opPMULLW_a16(uint32_t fetchdat) MM[reg].w[1] *= MM[rm].w[1]; MM[reg].w[2] *= MM[rm].w[2]; MM[reg].w[3] *= MM[rm].w[3]; - cycles--; + CLOCK_CYCLES(1); } else { @@ -300,7 +300,7 @@ static int opPMULLW_a16(uint32_t fetchdat) MM[reg].w[1] *= src.w[1]; MM[reg].w[2] *= src.w[2]; MM[reg].w[3] *= src.w[3]; - cycles -= 2; + CLOCK_CYCLES(2); } return 0; } @@ -315,7 +315,7 @@ static int opPMULLW_a32(uint32_t fetchdat) MM[reg].w[1] *= MM[rm].w[1]; MM[reg].w[2] *= MM[rm].w[2]; MM[reg].w[3] *= MM[rm].w[3]; - cycles--; + CLOCK_CYCLES(1); } else { @@ -327,7 +327,7 @@ static int opPMULLW_a32(uint32_t fetchdat) MM[reg].w[1] *= src.w[1]; MM[reg].w[2] *= src.w[2]; MM[reg].w[3] *= src.w[3]; - cycles -= 2; + CLOCK_CYCLES(2); } return 0; } @@ -343,7 +343,7 @@ static int opPMULHW_a16(uint32_t fetchdat) MM[reg].w[1] = ((int32_t)MM[reg].sw[1] * (int32_t)MM[rm].sw[1]) >> 16; MM[reg].w[2] = ((int32_t)MM[reg].sw[2] * (int32_t)MM[rm].sw[2]) >> 16; MM[reg].w[3] = ((int32_t)MM[reg].sw[3] * (int32_t)MM[rm].sw[3]) >> 16; - cycles--; + CLOCK_CYCLES(1); } else { @@ -355,7 +355,7 @@ static int opPMULHW_a16(uint32_t fetchdat) MM[reg].w[1] = ((int32_t)MM[reg].sw[1] * (int32_t)src.sw[1]) >> 16; MM[reg].w[2] = ((int32_t)MM[reg].sw[2] * (int32_t)src.sw[2]) >> 16; MM[reg].w[3] = ((int32_t)MM[reg].sw[3] * (int32_t)src.sw[3]) >> 16; - cycles -= 2; + CLOCK_CYCLES(2); } return 0; } @@ -370,7 +370,7 @@ static int opPMULHW_a32(uint32_t fetchdat) MM[reg].w[1] = ((int32_t)MM[reg].sw[1] * (int32_t)MM[rm].sw[1]) >> 16; MM[reg].w[2] = ((int32_t)MM[reg].sw[2] * (int32_t)MM[rm].sw[2]) >> 16; MM[reg].w[3] = ((int32_t)MM[reg].sw[3] * (int32_t)MM[rm].sw[3]) >> 16; - cycles--; + CLOCK_CYCLES(1); } else { @@ -382,7 +382,7 @@ static int opPMULHW_a32(uint32_t fetchdat) MM[reg].w[1] = ((int32_t)MM[reg].sw[1] * (int32_t)src.sw[1]) >> 16; MM[reg].w[2] = ((int32_t)MM[reg].sw[2] * (int32_t)src.sw[2]) >> 16; MM[reg].w[3] = ((int32_t)MM[reg].sw[3] * (int32_t)src.sw[3]) >> 16; - cycles -= 2; + CLOCK_CYCLES(2); } return 0; } diff --git a/src/x86_ops_mmx_mov.h b/src/x86_ops_mmx_mov.h index 30f169e..dcc9868 100644 --- a/src/x86_ops_mmx_mov.h +++ b/src/x86_ops_mmx_mov.h @@ -7,7 +7,7 @@ static int opMOVD_l_mm_a16(uint32_t fetchdat) { MM[reg].l[0] = regs[rm].l; MM[reg].l[1] = 0; - cycles--; + CLOCK_CYCLES(1); } else { @@ -17,7 +17,7 @@ static int opMOVD_l_mm_a16(uint32_t fetchdat) MM[reg].l[0] = dst; MM[reg].l[1] = 0; - cycles -= 2; + CLOCK_CYCLES(2); } return 0; } @@ -30,7 +30,7 @@ static int opMOVD_l_mm_a32(uint32_t fetchdat) { MM[reg].l[0] = regs[rm].l; MM[reg].l[1] = 0; - cycles--; + CLOCK_CYCLES(1); } else { @@ -40,7 +40,7 @@ static int opMOVD_l_mm_a32(uint32_t fetchdat) MM[reg].l[0] = dst; MM[reg].l[1] = 0; - cycles -= 2; + CLOCK_CYCLES(2); } return 0; } @@ -53,13 +53,13 @@ static int opMOVD_mm_l_a16(uint32_t fetchdat) if (mod == 3) { regs[rm].l = MM[reg].l[0]; - cycles--; + CLOCK_CYCLES(1); } else { CHECK_WRITE(ea_seg, eaaddr, eaaddr + 3); writememl(easeg, eaaddr, MM[reg].l[0]); if (abrt) return 1; - cycles -= 2; + CLOCK_CYCLES(2); } return 0; } @@ -71,13 +71,13 @@ static int opMOVD_mm_l_a32(uint32_t fetchdat) if (mod == 3) { regs[rm].l = MM[reg].l[0]; - cycles--; + CLOCK_CYCLES(1); } else { CHECK_WRITE(ea_seg, eaaddr, eaaddr + 3); writememl(easeg, eaaddr, MM[reg].l[0]); if (abrt) return 1; - cycles -= 2; + CLOCK_CYCLES(2); } return 0; } @@ -90,7 +90,7 @@ static int opMOVQ_q_mm_a16(uint32_t fetchdat) if (mod == 3) { MM[reg].q = MM[rm].q; - cycles--; + CLOCK_CYCLES(1); } else { @@ -100,7 +100,7 @@ static int opMOVQ_q_mm_a16(uint32_t fetchdat) dst[1] = readmeml(easeg, eaaddr + 4); if (abrt) return 1; MM[reg].l[0] = dst[0]; MM[reg].l[1] = dst[1]; - cycles -= 2; + CLOCK_CYCLES(2); } return 0; } @@ -112,7 +112,7 @@ static int opMOVQ_q_mm_a32(uint32_t fetchdat) if (mod == 3) { MM[reg].q = MM[rm].q; - cycles--; + CLOCK_CYCLES(1); } else { @@ -122,7 +122,7 @@ static int opMOVQ_q_mm_a32(uint32_t fetchdat) dst[1] = readmeml(easeg, eaaddr + 4); if (abrt) return 1; MM[reg].l[0] = dst[0]; MM[reg].l[1] = dst[1]; - cycles -= 2; + CLOCK_CYCLES(2); } return 0; } @@ -135,14 +135,14 @@ static int opMOVQ_mm_q_a16(uint32_t fetchdat) if (mod == 3) { MM[rm].q = MM[reg].q; - cycles--; + CLOCK_CYCLES(1); } else { CHECK_WRITE(ea_seg, eaaddr, eaaddr + 7); writememl(easeg, eaaddr, MM[reg].l[0]); writememl(easeg, eaaddr + 4, MM[reg].l[1]); if (abrt) return 1; - cycles -= 2; + CLOCK_CYCLES(2); } return 0; } @@ -154,14 +154,14 @@ static int opMOVQ_mm_q_a32(uint32_t fetchdat) if (mod == 3) { MM[rm].q = MM[reg].q; - cycles--; + CLOCK_CYCLES(1); } else { CHECK_WRITE(ea_seg, eaaddr, eaaddr + 7); writememl(easeg, eaaddr, MM[reg].l[0]); writememl(easeg, eaaddr + 4, MM[reg].l[1]); if (abrt) return 1; - cycles -= 2; + CLOCK_CYCLES(2); } return 0; } diff --git a/src/x86_ops_mmx_pack.h b/src/x86_ops_mmx_pack.h index b98cd9e..35e1bce 100644 --- a/src/x86_ops_mmx_pack.h +++ b/src/x86_ops_mmx_pack.h @@ -6,7 +6,7 @@ static int opPUNPCKLDQ_a16(uint32_t fetchdat) if (mod == 3) { MM[reg].l[1] = MM[rm].l[0]; - cycles--; + CLOCK_CYCLES(1); } else { @@ -15,7 +15,7 @@ static int opPUNPCKLDQ_a16(uint32_t fetchdat) src = readmeml(easeg, eaaddr); if (abrt) return 0; MM[reg].l[1] = src; - cycles -= 2; + CLOCK_CYCLES(2); } return 0; } @@ -27,7 +27,7 @@ static int opPUNPCKLDQ_a32(uint32_t fetchdat) if (mod == 3) { MM[reg].l[1] = MM[rm].l[0]; - cycles--; + CLOCK_CYCLES(1); } else { @@ -36,7 +36,7 @@ static int opPUNPCKLDQ_a32(uint32_t fetchdat) src = readmeml(easeg, eaaddr); if (abrt) return 0; MM[reg].l[1] = src; - cycles -= 2; + CLOCK_CYCLES(2); } return 0; } diff --git a/src/x86_ops_mmx_shift.h b/src/x86_ops_mmx_shift.h index e3e3a48..21b6dc2 100644 --- a/src/x86_ops_mmx_shift.h +++ b/src/x86_ops_mmx_shift.h @@ -2,12 +2,12 @@ if (mod == 3) \ { \ shift = MM[rm].b[0]; \ - cycles--; \ + CLOCK_CYCLES(1); \ } \ else \ { \ shift = readmemb(easeg, eaaddr); if (abrt) return 0; \ - cycles -= 2; \ + CLOCK_CYCLES(2); \ } static int opPSxxW_imm(uint32_t fetchdat) @@ -58,7 +58,7 @@ static int opPSxxW_imm(uint32_t fetchdat) return 0; } - cycles--; + CLOCK_CYCLES(1); return 0; } @@ -229,7 +229,7 @@ static int opPSxxD_imm(uint32_t fetchdat) return 0; } - cycles--; + CLOCK_CYCLES(1); return 0; } @@ -381,7 +381,7 @@ static int opPSxxQ_imm(uint32_t fetchdat) return 0; } - cycles--; + CLOCK_CYCLES(1); return 0; } diff --git a/src/x86_ops_mov.h b/src/x86_ops_mov.h index 884f7b4..f3323cf 100644 --- a/src/x86_ops_mov.h +++ b/src/x86_ops_mov.h @@ -1,98 +1,98 @@ static int opMOV_AL_imm(uint32_t fetchdat) { AL = getbytef(); - cycles -= timing_rr; + CLOCK_CYCLES(timing_rr); return 0; } static int opMOV_AH_imm(uint32_t fetchdat) { AH = getbytef(); - cycles -= timing_rr; + CLOCK_CYCLES(timing_rr); return 0; } static int opMOV_BL_imm(uint32_t fetchdat) { BL = getbytef(); - cycles -= timing_rr; + CLOCK_CYCLES(timing_rr); return 0; } static int opMOV_BH_imm(uint32_t fetchdat) { BH = getbytef(); - cycles -= timing_rr; + CLOCK_CYCLES(timing_rr); return 0; } static int opMOV_CL_imm(uint32_t fetchdat) { CL = getbytef(); - cycles -= timing_rr; + CLOCK_CYCLES(timing_rr); return 0; } static int opMOV_CH_imm(uint32_t fetchdat) { CH = getbytef(); - cycles -= timing_rr; + CLOCK_CYCLES(timing_rr); return 0; } static int opMOV_DL_imm(uint32_t fetchdat) { DL = getbytef(); - cycles -= timing_rr; + CLOCK_CYCLES(timing_rr); return 0; } static int opMOV_DH_imm(uint32_t fetchdat) { DH = getbytef(); - cycles -= timing_rr; + CLOCK_CYCLES(timing_rr); return 0; } static int opMOV_AX_imm(uint32_t fetchdat) { AX = getwordf(); - cycles -= timing_rr; + CLOCK_CYCLES(timing_rr); return 0; } static int opMOV_BX_imm(uint32_t fetchdat) { BX = getwordf(); - cycles -= timing_rr; + CLOCK_CYCLES(timing_rr); return 0; } static int opMOV_CX_imm(uint32_t fetchdat) { CX = getwordf(); - cycles -= timing_rr; + CLOCK_CYCLES(timing_rr); return 0; } static int opMOV_DX_imm(uint32_t fetchdat) { DX = getwordf(); - cycles -= timing_rr; + CLOCK_CYCLES(timing_rr); return 0; } static int opMOV_SI_imm(uint32_t fetchdat) { SI = getwordf(); - cycles -= timing_rr; + CLOCK_CYCLES(timing_rr); return 0; } static int opMOV_DI_imm(uint32_t fetchdat) { DI = getwordf(); - cycles -= timing_rr; + CLOCK_CYCLES(timing_rr); return 0; } static int opMOV_BP_imm(uint32_t fetchdat) { BP = getwordf(); - cycles -= timing_rr; + CLOCK_CYCLES(timing_rr); return 0; } static int opMOV_SP_imm(uint32_t fetchdat) { SP = getwordf(); - cycles -= timing_rr; + CLOCK_CYCLES(timing_rr); return 0; } @@ -100,56 +100,56 @@ static int opMOV_EAX_imm(uint32_t fetchdat) { uint32_t templ = getlong(); if (abrt) return 1; EAX = templ; - cycles -= timing_rr; + CLOCK_CYCLES(timing_rr); return 0; } static int opMOV_EBX_imm(uint32_t fetchdat) { uint32_t templ = getlong(); if (abrt) return 1; EBX = templ; - cycles -= timing_rr; + CLOCK_CYCLES(timing_rr); return 0; } static int opMOV_ECX_imm(uint32_t fetchdat) { uint32_t templ = getlong(); if (abrt) return 1; ECX = templ; - cycles -= timing_rr; + CLOCK_CYCLES(timing_rr); return 0; } static int opMOV_EDX_imm(uint32_t fetchdat) { uint32_t templ = getlong(); if (abrt) return 1; EDX = templ; - cycles -= timing_rr; + CLOCK_CYCLES(timing_rr); return 0; } static int opMOV_ESI_imm(uint32_t fetchdat) { uint32_t templ = getlong(); if (abrt) return 1; ESI = templ; - cycles -= timing_rr; + CLOCK_CYCLES(timing_rr); return 0; } static int opMOV_EDI_imm(uint32_t fetchdat) { uint32_t templ = getlong(); if (abrt) return 1; EDI = templ; - cycles -= timing_rr; + CLOCK_CYCLES(timing_rr); return 0; } static int opMOV_EBP_imm(uint32_t fetchdat) { uint32_t templ = getlong(); if (abrt) return 1; EBP = templ; - cycles -= timing_rr; + CLOCK_CYCLES(timing_rr); return 0; } static int opMOV_ESP_imm(uint32_t fetchdat) { uint32_t templ = getlong(); if (abrt) return 1; ESP = templ; - cycles -= timing_rr; + CLOCK_CYCLES(timing_rr); return 0; } @@ -159,7 +159,7 @@ static int opMOV_b_imm_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); temp = readmemb(cs,pc); pc++; if (abrt) return 1; seteab(temp); - cycles -= timing_rr; + CLOCK_CYCLES(timing_rr); return abrt; } static int opMOV_b_imm_a32(uint32_t fetchdat) @@ -168,7 +168,7 @@ static int opMOV_b_imm_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); temp = getbyte(); if (abrt) return 1; seteab(temp); - cycles -= timing_rr; + CLOCK_CYCLES(timing_rr); return abrt; } @@ -178,7 +178,7 @@ static int opMOV_w_imm_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); temp = getword(); if (abrt) return 1; seteaw(temp); - cycles -= timing_rr; + CLOCK_CYCLES(timing_rr); return abrt; } static int opMOV_w_imm_a32(uint32_t fetchdat) @@ -187,7 +187,7 @@ static int opMOV_w_imm_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); temp = getword(); if (abrt) return 1; seteaw(temp); - cycles -= timing_rr; + CLOCK_CYCLES(timing_rr); return abrt; } static int opMOV_l_imm_a16(uint32_t fetchdat) @@ -196,7 +196,7 @@ static int opMOV_l_imm_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); temp = getlong(); if (abrt) return 1; seteal(temp); - cycles -= timing_rr; + CLOCK_CYCLES(timing_rr); return abrt; } static int opMOV_l_imm_a32(uint32_t fetchdat) @@ -205,7 +205,7 @@ static int opMOV_l_imm_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); temp = getlong(); if (abrt) return 1; seteal(temp); - cycles -= timing_rr; + CLOCK_CYCLES(timing_rr); return abrt; } @@ -215,7 +215,7 @@ static int opMOV_AL_a16(uint32_t fetchdat) uint16_t addr = getwordf(); uint8_t temp = readmemb(ea_seg->base, addr); if (abrt) return 1; AL = temp; - cycles -= (is486) ? 1 : 4; + CLOCK_CYCLES((is486) ? 1 : 4); return 0; } static int opMOV_AL_a32(uint32_t fetchdat) @@ -223,7 +223,7 @@ static int opMOV_AL_a32(uint32_t fetchdat) uint32_t addr = getlong(); uint8_t temp = readmemb(ea_seg->base, addr); if (abrt) return 1; AL = temp; - cycles -= (is486) ? 1 : 4; + CLOCK_CYCLES((is486) ? 1 : 4); return 0; } static int opMOV_AX_a16(uint32_t fetchdat) @@ -231,7 +231,7 @@ static int opMOV_AX_a16(uint32_t fetchdat) uint16_t addr = getwordf(); uint16_t temp = readmemw(ea_seg->base, addr); if (abrt) return 1; AX = temp; - cycles -= (is486) ? 1 : 4; + CLOCK_CYCLES((is486) ? 1 : 4); return 0; } static int opMOV_AX_a32(uint32_t fetchdat) @@ -239,7 +239,7 @@ static int opMOV_AX_a32(uint32_t fetchdat) uint32_t addr = getlong(); uint16_t temp = readmemw(ea_seg->base, addr); if (abrt) return 1; AX = temp; - cycles -= (is486) ? 1 : 4; + CLOCK_CYCLES((is486) ? 1 : 4); return 0; } static int opMOV_EAX_a16(uint32_t fetchdat) @@ -247,7 +247,7 @@ static int opMOV_EAX_a16(uint32_t fetchdat) uint16_t addr = getwordf(); uint32_t temp = readmeml(ea_seg->base, addr); if (abrt) return 1; EAX = temp; - cycles -= (is486) ? 1 : 4; + CLOCK_CYCLES((is486) ? 1 : 4); return 0; } static int opMOV_EAX_a32(uint32_t fetchdat) @@ -255,7 +255,7 @@ static int opMOV_EAX_a32(uint32_t fetchdat) uint32_t addr = getlong(); uint32_t temp = readmeml(ea_seg->base, addr); if (abrt) return 1; EAX = temp; - cycles -= (is486) ? 1 : 4; + CLOCK_CYCLES((is486) ? 1 : 4); return 0; } @@ -263,42 +263,42 @@ static int opMOV_a16_AL(uint32_t fetchdat) { uint16_t addr = getwordf(); writememb(ea_seg->base, addr, AL); - cycles -= (is486) ? 1 : 2; + CLOCK_CYCLES((is486) ? 1 : 2); return abrt; } static int opMOV_a32_AL(uint32_t fetchdat) { uint32_t addr = getlong(); writememb(ea_seg->base, addr, AL); - cycles -= (is486) ? 1 : 2; + CLOCK_CYCLES((is486) ? 1 : 2); return abrt; } static int opMOV_a16_AX(uint32_t fetchdat) { uint16_t addr = getwordf(); writememw(ea_seg->base, addr, AX); - cycles -= (is486) ? 1 : 2; + CLOCK_CYCLES((is486) ? 1 : 2); return abrt; } static int opMOV_a32_AX(uint32_t fetchdat) { uint32_t addr = getlong(); if (abrt) return 1; writememw(ea_seg->base, addr, AX); - cycles -= (is486) ? 1 : 2; + CLOCK_CYCLES((is486) ? 1 : 2); return abrt; } static int opMOV_a16_EAX(uint32_t fetchdat) { uint16_t addr = getwordf(); writememl(ea_seg->base, addr, EAX); - cycles -= (is486) ? 1 : 2; + CLOCK_CYCLES((is486) ? 1 : 2); return abrt; } static int opMOV_a32_EAX(uint32_t fetchdat) { uint32_t addr = getlong(); if (abrt) return 1; writememl(ea_seg->base, addr, EAX); - cycles -= (is486) ? 1 : 2; + CLOCK_CYCLES((is486) ? 1 : 2); return abrt; } @@ -308,7 +308,7 @@ static int opLEA_w_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); ILLEGAL_ON(mod == 3); regs[reg].w = eaaddr; - cycles -= timing_rr; + CLOCK_CYCLES(timing_rr); return 0; } static int opLEA_w_a32(uint32_t fetchdat) @@ -316,7 +316,7 @@ static int opLEA_w_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); ILLEGAL_ON(mod == 3); regs[reg].w = eaaddr; - cycles -= timing_rr; + CLOCK_CYCLES(timing_rr); return 0; } @@ -325,7 +325,7 @@ static int opLEA_l_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); ILLEGAL_ON(mod == 3); regs[reg].l = eaaddr & 0xffff; - cycles -= timing_rr; + CLOCK_CYCLES(timing_rr); return 0; } static int opLEA_l_a32(uint32_t fetchdat) @@ -333,7 +333,7 @@ static int opLEA_l_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); ILLEGAL_ON(mod == 3); regs[reg].l = eaaddr; - cycles -= timing_rr; + CLOCK_CYCLES(timing_rr); return 0; } @@ -344,7 +344,7 @@ static int opXLAT_a16(uint32_t fetchdat) uint32_t addr = (BX + AL)&0xFFFF; uint8_t temp = readmemb(ea_seg->base, addr); if (abrt) return 1; AL = temp; - cycles -= 5; + CLOCK_CYCLES(5); return 0; } static int opXLAT_a32(uint32_t fetchdat) @@ -352,7 +352,7 @@ static int opXLAT_a32(uint32_t fetchdat) uint32_t addr = EBX + AL; uint8_t temp = readmemb(ea_seg->base, addr); if (abrt) return 1; AL = temp; - cycles -= 5; + CLOCK_CYCLES(5); return 0; } @@ -362,14 +362,14 @@ static int opMOV_b_r_a16(uint32_t fetchdat) { pc++; setr8(fetchdat & 7, getr8((fetchdat >> 3) & 7)); - cycles -= timing_rr; + CLOCK_CYCLES(timing_rr); } else { fetch_ea_16(fetchdat); CHECK_WRITE(ea_seg, eaaddr, eaaddr); seteab(getr8(reg)); - cycles -= is486 ? 1 : 2; + CLOCK_CYCLES(is486 ? 1 : 2); } return abrt; } @@ -379,14 +379,14 @@ static int opMOV_b_r_a32(uint32_t fetchdat) { pc++; setr8(fetchdat & 7, getr8((fetchdat >> 3) & 7)); - cycles -= timing_rr; + CLOCK_CYCLES(timing_rr); } else { fetch_ea_32(fetchdat); CHECK_WRITE(ea_seg, eaaddr, eaaddr); seteab(getr8(reg)); - cycles -= is486 ? 1 : 2; + CLOCK_CYCLES(is486 ? 1 : 2); } return abrt; } @@ -396,14 +396,14 @@ static int opMOV_w_r_a16(uint32_t fetchdat) { pc++; regs[fetchdat & 7].w = regs[(fetchdat >> 3) & 7].w; - cycles -= timing_rr; + CLOCK_CYCLES(timing_rr); } else { fetch_ea_16(fetchdat); CHECK_WRITE(ea_seg, eaaddr, eaaddr+1); seteaw(regs[reg].w); - cycles -= is486 ? 1 : 2; + CLOCK_CYCLES(is486 ? 1 : 2); } return abrt; } @@ -413,14 +413,14 @@ static int opMOV_w_r_a32(uint32_t fetchdat) { pc++; regs[fetchdat & 7].w = regs[(fetchdat >> 3) & 7].w; - cycles -= timing_rr; + CLOCK_CYCLES(timing_rr); } else { fetch_ea_32(fetchdat); CHECK_WRITE(ea_seg, eaaddr, eaaddr+1); seteaw(regs[reg].w); - cycles -= is486 ? 1 : 2; + CLOCK_CYCLES(is486 ? 1 : 2); } return abrt; } @@ -430,14 +430,14 @@ static int opMOV_l_r_a16(uint32_t fetchdat) { pc++; regs[fetchdat & 7].l = regs[(fetchdat >> 3) & 7].l; - cycles -= timing_rr; + CLOCK_CYCLES(timing_rr); } else { fetch_ea_16(fetchdat); CHECK_WRITE(ea_seg, eaaddr, eaaddr+3); seteal(regs[reg].l); - cycles -= is486 ? 1 : 2; + CLOCK_CYCLES(is486 ? 1 : 2); } return abrt; } @@ -447,14 +447,14 @@ static int opMOV_l_r_a32(uint32_t fetchdat) { pc++; regs[fetchdat & 7].l = regs[(fetchdat >> 3) & 7].l; - cycles -= timing_rr; + CLOCK_CYCLES(timing_rr); } else { fetch_ea_32(fetchdat); CHECK_WRITE(ea_seg, eaaddr, eaaddr+3); seteal(regs[reg].l); - cycles -= is486 ? 1 : 2; + CLOCK_CYCLES(is486 ? 1 : 2); } return abrt; } @@ -465,7 +465,7 @@ static int opMOV_r_b_a16(uint32_t fetchdat) { pc++; setr8((fetchdat >> 3) & 7, getr8(fetchdat & 7)); - cycles -= timing_rr; + CLOCK_CYCLES(timing_rr); } else { @@ -474,7 +474,7 @@ static int opMOV_r_b_a16(uint32_t fetchdat) CHECK_READ(ea_seg, eaaddr, eaaddr); temp = geteab(); if (abrt) return 1; setr8(reg, temp); - cycles -= is486 ? 1 : 4; + CLOCK_CYCLES(is486 ? 1 : 4); } return 0; } @@ -484,7 +484,7 @@ static int opMOV_r_b_a32(uint32_t fetchdat) { pc++; setr8((fetchdat >> 3) & 7, getr8(fetchdat & 7)); - cycles -= timing_rr; + CLOCK_CYCLES(timing_rr); } else { @@ -493,7 +493,7 @@ static int opMOV_r_b_a32(uint32_t fetchdat) CHECK_READ(ea_seg, eaaddr, eaaddr); temp = geteab(); if (abrt) return 1; setr8(reg, temp); - cycles -= is486 ? 1 : 4; + CLOCK_CYCLES(is486 ? 1 : 4); } return 0; } @@ -503,7 +503,7 @@ static int opMOV_r_w_a16(uint32_t fetchdat) { pc++; regs[(fetchdat >> 3) & 7].w = regs[fetchdat & 7].w; - cycles -= timing_rr; + CLOCK_CYCLES(timing_rr); } else { @@ -512,7 +512,7 @@ static int opMOV_r_w_a16(uint32_t fetchdat) CHECK_READ(ea_seg, eaaddr, eaaddr+1); temp = geteaw(); if (abrt) return 1; regs[reg].w = temp; - cycles -= (is486) ? 1 : 4; + CLOCK_CYCLES((is486) ? 1 : 4); } return 0; } @@ -522,7 +522,7 @@ static int opMOV_r_w_a32(uint32_t fetchdat) { pc++; regs[(fetchdat >> 3) & 7].w = regs[fetchdat & 7].w; - cycles -= timing_rr; + CLOCK_CYCLES(timing_rr); } else { @@ -531,7 +531,7 @@ static int opMOV_r_w_a32(uint32_t fetchdat) CHECK_READ(ea_seg, eaaddr, eaaddr+1); temp = geteaw(); if (abrt) return 1; regs[reg].w = temp; - cycles -= (is486) ? 1 : 4; + CLOCK_CYCLES((is486) ? 1 : 4); } return 0; } @@ -541,7 +541,7 @@ static int opMOV_r_l_a16(uint32_t fetchdat) { pc++; regs[(fetchdat >> 3) & 7].l = regs[fetchdat & 7].l; - cycles -= timing_rr; + CLOCK_CYCLES(timing_rr); } else { @@ -550,7 +550,7 @@ static int opMOV_r_l_a16(uint32_t fetchdat) CHECK_READ(ea_seg, eaaddr, eaaddr+3); temp = geteal(); if (abrt) return 1; regs[reg].l = temp; - cycles -= is486 ? 1 : 4; + CLOCK_CYCLES(is486 ? 1 : 4); } return 0; } @@ -560,7 +560,7 @@ static int opMOV_r_l_a32(uint32_t fetchdat) { pc++; regs[(fetchdat >> 3) & 7].l = regs[fetchdat & 7].l; - cycles -= timing_rr; + CLOCK_CYCLES(timing_rr); } else { @@ -569,7 +569,7 @@ static int opMOV_r_l_a32(uint32_t fetchdat) CHECK_READ(ea_seg, eaaddr, eaaddr+3); temp = geteal(); if (abrt) return 1; regs[reg].l = temp; - cycles -= is486 ? 1 : 4; + CLOCK_CYCLES(is486 ? 1 : 4); } return 0; } diff --git a/src/x86_ops_mov_ctrl.h b/src/x86_ops_mov_ctrl.h index 5f08852..9213080 100644 --- a/src/x86_ops_mov_ctrl.h +++ b/src/x86_ops_mov_ctrl.h @@ -31,7 +31,7 @@ static int opMOV_r_CRx_a16(uint32_t fetchdat) x86illegal(); break; } - cycles -= 6; + CLOCK_CYCLES(6); return 0; } static int opMOV_r_CRx_a32(uint32_t fetchdat) @@ -67,7 +67,7 @@ static int opMOV_r_CRx_a32(uint32_t fetchdat) x86illegal(); break; } - cycles -= 6; + CLOCK_CYCLES(6); return 0; } @@ -81,7 +81,7 @@ static int opMOV_r_DRx_a16(uint32_t fetchdat) } fetch_ea_16(fetchdat); regs[rm].l = 0; - cycles -= 6; + CLOCK_CYCLES(6); return 0; } static int opMOV_r_DRx_a32(uint32_t fetchdat) @@ -94,7 +94,7 @@ static int opMOV_r_DRx_a32(uint32_t fetchdat) } fetch_ea_32(fetchdat); regs[rm].l = 0; - cycles -= 6; + CLOCK_CYCLES(6); return 0; } @@ -135,7 +135,7 @@ static int opMOV_CRx_r_a16(uint32_t fetchdat) x86illegal(); break; } - cycles -= 10; + CLOCK_CYCLES(10); return 0; } static int opMOV_CRx_r_a32(uint32_t fetchdat) @@ -175,7 +175,7 @@ static int opMOV_CRx_r_a32(uint32_t fetchdat) x86illegal(); break; } - cycles -= 10; + CLOCK_CYCLES(10); return 0; } @@ -188,7 +188,7 @@ static int opMOV_DRx_r_a16(uint32_t fetchdat) return 1; } fetch_ea_16(fetchdat); - cycles -= 6; + CLOCK_CYCLES(6); return 0; } static int opMOV_DRx_r_a32(uint32_t fetchdat) @@ -200,7 +200,7 @@ static int opMOV_DRx_r_a32(uint32_t fetchdat) return 1; } fetch_ea_16(fetchdat); - cycles -= 6; + CLOCK_CYCLES(6); return 0; } @@ -214,7 +214,7 @@ static int opMOV_r_TRx_a16(uint32_t fetchdat) } fetch_ea_16(fetchdat); regs[rm].l = 0; - cycles -= 6; + CLOCK_CYCLES(6); return 0; } static int opMOV_r_TRx_a32(uint32_t fetchdat) @@ -227,7 +227,7 @@ static int opMOV_r_TRx_a32(uint32_t fetchdat) } fetch_ea_32(fetchdat); regs[rm].l = 0; - cycles -= 6; + CLOCK_CYCLES(6); return 0; } @@ -240,7 +240,7 @@ static int opMOV_TRx_r_a16(uint32_t fetchdat) return 1; } fetch_ea_16(fetchdat); - cycles -= 6; + CLOCK_CYCLES(6); return 0; } static int opMOV_TRx_r_a32(uint32_t fetchdat) @@ -252,7 +252,7 @@ static int opMOV_TRx_r_a32(uint32_t fetchdat) return 1; } fetch_ea_16(fetchdat); - cycles -= 6; + CLOCK_CYCLES(6); return 0; } diff --git a/src/x86_ops_mov_seg.h b/src/x86_ops_mov_seg.h index 866dcdc..993a7df 100644 --- a/src/x86_ops_mov_seg.h +++ b/src/x86_ops_mov_seg.h @@ -24,7 +24,7 @@ static int opMOV_w_seg_a16(uint32_t fetchdat) break; } - cycles -= ((mod == 3) ? 2 : 3); + CLOCK_CYCLES((mod == 3) ? 2 : 3); return abrt; } static int opMOV_w_seg_a32(uint32_t fetchdat) @@ -53,7 +53,7 @@ static int opMOV_w_seg_a32(uint32_t fetchdat) break; } - cycles -= ((mod == 3) ? 2 : 3); + CLOCK_CYCLES((mod == 3) ? 2 : 3); return abrt; } @@ -89,7 +89,7 @@ static int opMOV_l_seg_a16(uint32_t fetchdat) break; } - cycles -= ((mod == 3) ? 2 : 3); + CLOCK_CYCLES((mod == 3) ? 2 : 3); return abrt; } static int opMOV_l_seg_a32(uint32_t fetchdat) @@ -124,7 +124,7 @@ static int opMOV_l_seg_a32(uint32_t fetchdat) break; } - cycles -= ((mod == 3) ? 2 : 3); + CLOCK_CYCLES((mod == 3) ? 2 : 3); return abrt; } @@ -163,7 +163,7 @@ static int opMOV_seg_w_a16(uint32_t fetchdat) break; } - cycles -= ((mod == 3) ? 2 : 5); + CLOCK_CYCLES((mod == 3) ? 2 : 5); return abrt; } static int opMOV_seg_w_a32(uint32_t fetchdat) @@ -201,7 +201,7 @@ static int opMOV_seg_w_a32(uint32_t fetchdat) break; } - cycles -= ((mod == 3) ? 2 : 5); + CLOCK_CYCLES((mod == 3) ? 2 : 5); return abrt; } @@ -217,7 +217,7 @@ static int opLDS_w_a16(uint32_t fetchdat) loadseg(seg, &_ds); if (abrt) return 1; regs[reg].w = addr; - cycles -= 7; + CLOCK_CYCLES(7); return 0; } static int opLDS_w_a32(uint32_t fetchdat) @@ -231,7 +231,7 @@ static int opLDS_w_a32(uint32_t fetchdat) loadseg(seg, &_ds); if (abrt) return 1; regs[reg].w = addr; - cycles -= 7; + CLOCK_CYCLES(7); return 0; } static int opLDS_l_a16(uint32_t fetchdat) @@ -246,7 +246,7 @@ static int opLDS_l_a16(uint32_t fetchdat) loadseg(seg, &_ds); if (abrt) return 1; regs[reg].l = addr; - cycles -= 7; + CLOCK_CYCLES(7); return 0; } static int opLDS_l_a32(uint32_t fetchdat) @@ -261,7 +261,7 @@ static int opLDS_l_a32(uint32_t fetchdat) loadseg(seg, &_ds); if (abrt) return 1; regs[reg].l = addr; - cycles -= 7; + CLOCK_CYCLES(7); return 0; } @@ -276,7 +276,7 @@ static int opLSS_w_a16(uint32_t fetchdat) loadseg(seg, &_ss); if (abrt) return 1; regs[reg].w = addr; - cycles -= 7; + CLOCK_CYCLES(7); return 0; } static int opLSS_w_a32(uint32_t fetchdat) @@ -290,7 +290,7 @@ static int opLSS_w_a32(uint32_t fetchdat) loadseg(seg, &_ss); if (abrt) return 1; regs[reg].w = addr; - cycles -= 7; + CLOCK_CYCLES(7); return 0; } static int opLSS_l_a16(uint32_t fetchdat) @@ -305,7 +305,7 @@ static int opLSS_l_a16(uint32_t fetchdat) loadseg(seg, &_ss); if (abrt) return 1; regs[reg].l = addr; - cycles -= 7; + CLOCK_CYCLES(7); return 0; } static int opLSS_l_a32(uint32_t fetchdat) @@ -320,7 +320,7 @@ static int opLSS_l_a32(uint32_t fetchdat) loadseg(seg, &_ss); if (abrt) return 1; regs[reg].l = addr; - cycles -= 7; + CLOCK_CYCLES(7); return 0; } @@ -336,7 +336,7 @@ static int opLSS_l_a32(uint32_t fetchdat) loadseg(seg, &sel); if (abrt) return 1; \ regs[reg].w = addr; \ \ - cycles -= 7; \ + CLOCK_CYCLES(7); \ return 0; \ } \ \ @@ -351,7 +351,7 @@ static int opLSS_l_a32(uint32_t fetchdat) loadseg(seg, &sel); if (abrt) return 1; \ regs[reg].w = addr; \ \ - cycles -= 7; \ + CLOCK_CYCLES(7); \ return 0; \ } \ \ @@ -367,7 +367,7 @@ static int opLSS_l_a32(uint32_t fetchdat) loadseg(seg, &sel); if (abrt) return 1; \ regs[reg].l = addr; \ \ - cycles -= 7; \ + CLOCK_CYCLES(7); \ return 0; \ } \ \ @@ -383,7 +383,7 @@ static int opLSS_l_a32(uint32_t fetchdat) loadseg(seg, &sel); if (abrt) return 1; \ regs[reg].l = addr; \ \ - cycles -= 7; \ + CLOCK_CYCLES(7); \ return 0; \ } diff --git a/src/x86_ops_movx.h b/src/x86_ops_movx.h index c6fb2aa..b672008 100644 --- a/src/x86_ops_movx.h +++ b/src/x86_ops_movx.h @@ -6,7 +6,7 @@ static int opMOVZX_w_b_a16(uint32_t fetchdat) temp = geteab(); if (abrt) return 1; regs[reg].w = (uint16_t)temp; - cycles -= 3; + CLOCK_CYCLES(3); return 0; } static int opMOVZX_w_b_a32(uint32_t fetchdat) @@ -17,7 +17,7 @@ static int opMOVZX_w_b_a32(uint32_t fetchdat) temp = geteab(); if (abrt) return 1; regs[reg].w = (uint16_t)temp; - cycles -= 3; + CLOCK_CYCLES(3); return 0; } static int opMOVZX_l_b_a16(uint32_t fetchdat) @@ -28,7 +28,7 @@ static int opMOVZX_l_b_a16(uint32_t fetchdat) temp = geteab(); if (abrt) return 1; regs[reg].l = (uint32_t)temp; - cycles -= 3; + CLOCK_CYCLES(3); return 0; } static int opMOVZX_l_b_a32(uint32_t fetchdat) @@ -39,7 +39,7 @@ static int opMOVZX_l_b_a32(uint32_t fetchdat) temp = geteab(); if (abrt) return 1; regs[reg].l = (uint32_t)temp; - cycles -= 3; + CLOCK_CYCLES(3); return 0; } static int opMOVZX_w_w_a16(uint32_t fetchdat) @@ -50,7 +50,7 @@ static int opMOVZX_w_w_a16(uint32_t fetchdat) temp = geteaw(); if (abrt) return 1; regs[reg].w = temp; - cycles -= 3; + CLOCK_CYCLES(3); return 0; } static int opMOVZX_w_w_a32(uint32_t fetchdat) @@ -61,7 +61,7 @@ static int opMOVZX_w_w_a32(uint32_t fetchdat) temp = geteaw(); if (abrt) return 1; regs[reg].w = temp; - cycles -= 3; + CLOCK_CYCLES(3); return 0; } static int opMOVZX_l_w_a16(uint32_t fetchdat) @@ -72,7 +72,7 @@ static int opMOVZX_l_w_a16(uint32_t fetchdat) temp = geteaw(); if (abrt) return 1; regs[reg].l = (uint32_t)temp; - cycles -= 3; + CLOCK_CYCLES(3); return 0; } static int opMOVZX_l_w_a32(uint32_t fetchdat) @@ -83,7 +83,7 @@ static int opMOVZX_l_w_a32(uint32_t fetchdat) temp = geteaw(); if (abrt) return 1; regs[reg].l = (uint32_t)temp; - cycles -= 3; + CLOCK_CYCLES(3); return 0; } @@ -97,7 +97,7 @@ static int opMOVSX_w_b_a16(uint32_t fetchdat) if (temp & 0x80) regs[reg].w |= 0xff00; - cycles -= 3; + CLOCK_CYCLES(3); return 0; } static int opMOVSX_w_b_a32(uint32_t fetchdat) @@ -110,7 +110,7 @@ static int opMOVSX_w_b_a32(uint32_t fetchdat) if (temp & 0x80) regs[reg].w |= 0xff00; - cycles -= 3; + CLOCK_CYCLES(3); return 0; } static int opMOVSX_l_b_a16(uint32_t fetchdat) @@ -123,7 +123,7 @@ static int opMOVSX_l_b_a16(uint32_t fetchdat) if (temp & 0x80) regs[reg].l |= 0xffffff00; - cycles -= 3; + CLOCK_CYCLES(3); return 0; } static int opMOVSX_l_b_a32(uint32_t fetchdat) @@ -136,7 +136,7 @@ static int opMOVSX_l_b_a32(uint32_t fetchdat) if (temp & 0x80) regs[reg].l |= 0xffffff00; - cycles -= 3; + CLOCK_CYCLES(3); return 0; } static int opMOVSX_l_w_a16(uint32_t fetchdat) @@ -149,7 +149,7 @@ static int opMOVSX_l_w_a16(uint32_t fetchdat) if (temp & 0x8000) regs[reg].l |= 0xffff0000; - cycles -= 3; + CLOCK_CYCLES(3); return 0; } static int opMOVSX_l_w_a32(uint32_t fetchdat) @@ -162,6 +162,6 @@ static int opMOVSX_l_w_a32(uint32_t fetchdat) if (temp & 0x8000) regs[reg].l |= 0xffff0000; - cycles -= 3; + CLOCK_CYCLES(3); return 0; } diff --git a/src/x86_ops_msr.h b/src/x86_ops_msr.h index 425c563..4c33f0a 100644 --- a/src/x86_ops_msr.h +++ b/src/x86_ops_msr.h @@ -13,6 +13,6 @@ static int opRDTSC(uint32_t fetchdat) } EAX = tsc & 0xffffffff; EDX = tsc >> 32; - cycles--; + CLOCK_CYCLES(1); return 0; } diff --git a/src/x86_ops_mul.h b/src/x86_ops_mul.h index 67707e7..197f4ea 100644 --- a/src/x86_ops_mul.h +++ b/src/x86_ops_mul.h @@ -14,7 +14,7 @@ static int opIMUL_w_iw_a16(uint32_t fetchdat) else flags &= ~(C_FLAG | V_FLAG); regs[reg].w = templ & 0xffff; - cycles -= (mod == 3) ? 14 : 17; + CLOCK_CYCLES((mod == 3) ? 14 : 17); return 0; } static int opIMUL_w_iw_a32(uint32_t fetchdat) @@ -33,7 +33,7 @@ static int opIMUL_w_iw_a32(uint32_t fetchdat) else flags &= ~(C_FLAG | V_FLAG); regs[reg].w = templ & 0xffff; - cycles -= (mod == 3) ? 14 : 17; + CLOCK_CYCLES((mod == 3) ? 14 : 17); return 0; } @@ -53,7 +53,7 @@ static int opIMUL_l_il_a16(uint32_t fetchdat) else flags &= ~(C_FLAG | V_FLAG); regs[reg].l = temp64 & 0xffffffff; - cycles-=25; + CLOCK_CYCLES(25); return 0; } static int opIMUL_l_il_a32(uint32_t fetchdat) @@ -72,7 +72,7 @@ static int opIMUL_l_il_a32(uint32_t fetchdat) else flags &= ~(C_FLAG | V_FLAG); regs[reg].l = temp64 & 0xffffffff; - cycles-=25; + CLOCK_CYCLES(25); return 0; } @@ -93,7 +93,7 @@ static int opIMUL_w_ib_a16(uint32_t fetchdat) else flags &= ~(C_FLAG | V_FLAG); regs[reg].w = templ & 0xffff; - cycles -= (mod == 3) ? 14 : 17; + CLOCK_CYCLES((mod == 3) ? 14 : 17); return 0; } static int opIMUL_w_ib_a32(uint32_t fetchdat) @@ -113,7 +113,7 @@ static int opIMUL_w_ib_a32(uint32_t fetchdat) else flags &= ~(C_FLAG | V_FLAG); regs[reg].w = templ & 0xffff; - cycles -= (mod == 3) ? 14 : 17; + CLOCK_CYCLES((mod == 3) ? 14 : 17); return 0; } @@ -133,7 +133,7 @@ static int opIMUL_l_ib_a16(uint32_t fetchdat) else flags &= ~(C_FLAG | V_FLAG); regs[reg].l = temp64 & 0xffffffff; - cycles -= 20; + CLOCK_CYCLES(20); return 0; } static int opIMUL_l_ib_a32(uint32_t fetchdat) @@ -152,7 +152,7 @@ static int opIMUL_l_ib_a32(uint32_t fetchdat) else flags &= ~(C_FLAG | V_FLAG); regs[reg].l = temp64 & 0xffffffff; - cycles -= 20; + CLOCK_CYCLES(20); return 0; } @@ -170,7 +170,7 @@ static int opIMUL_w_w_a16(uint32_t fetchdat) if ((templ >> 15) != 0 && (templ >> 15) != -1) flags |= C_FLAG | V_FLAG; else flags &= ~(C_FLAG | V_FLAG); - cycles -= 18; + CLOCK_CYCLES(18); return 0; } static int opIMUL_w_w_a32(uint32_t fetchdat) @@ -185,7 +185,7 @@ static int opIMUL_w_w_a32(uint32_t fetchdat) if ((templ >> 15) != 0 && (templ >> 15) != -1) flags |= C_FLAG | V_FLAG; else flags &= ~(C_FLAG | V_FLAG); - cycles -= 18; + CLOCK_CYCLES(18); return 0; } @@ -201,7 +201,7 @@ static int opIMUL_l_l_a16(uint32_t fetchdat) if ((temp64 >> 31) != 0 && (temp64 >> 31) != -1) flags |= C_FLAG | V_FLAG; else flags &= ~(C_FLAG | V_FLAG); - cycles -= 30; + CLOCK_CYCLES(30); return 0; } static int opIMUL_l_l_a32(uint32_t fetchdat) @@ -216,7 +216,7 @@ static int opIMUL_l_l_a32(uint32_t fetchdat) if ((temp64 >> 31) != 0 && (temp64 >> 31) != -1) flags |= C_FLAG | V_FLAG; else flags &= ~(C_FLAG | V_FLAG); - cycles -= 30; + CLOCK_CYCLES(30); return 0; } diff --git a/src/x86_ops_pmode.h b/src/x86_ops_pmode.h index 6da1b5f..6d0cdf1 100644 --- a/src/x86_ops_pmode.h +++ b/src/x86_ops_pmode.h @@ -17,7 +17,7 @@ static int opARPL_a16(uint32_t fetchdat) else flags &= ~Z_FLAG; - cycles -= is486 ? 9 : 20; + CLOCK_CYCLES(is486 ? 9 : 20); return 0; } static int opARPL_a32(uint32_t fetchdat) @@ -39,7 +39,7 @@ static int opARPL_a32(uint32_t fetchdat) else flags &= ~Z_FLAG; - cycles -= is486 ? 9 : 20; + CLOCK_CYCLES(is486 ? 9 : 20); return 0; } @@ -83,7 +83,7 @@ static int opARPL_a32(uint32_t fetchdat) regs[reg].w = readmemw(0, ((sel & 4) ? ldt.base : gdt.base) + (sel & ~7) + 4) & 0xff00; \ cpl_override = 0; \ } \ - cycles -= 11; \ + CLOCK_CYCLES(11); \ return abrt; \ } @@ -138,8 +138,8 @@ opLAR(l_a32, fetch_ea_32, 1) regs[reg].w = readmemw(0, ((sel & 4) ? ldt.base : gdt.base) + (sel & ~7)); \ cpl_override = 0; \ } \ - cycles -= 10; \ - return abrt; \ + CLOCK_CYCLES(10); \ + return abrt; \ } opLSL(w_a16, fetch_ea_16, 0) @@ -160,11 +160,11 @@ static int op0F00_common(uint32_t fetchdat) { case 0x00: /*SLDT*/ seteaw(ldt.seg); - cycles -= 4; + CLOCK_CYCLES(4); break; case 0x08: /*STR*/ seteaw(tr.seg); - cycles -= 4; + CLOCK_CYCLES(4); break; case 0x10: /*LLDT*/ if ((CPL || eflags&VM_FLAG) && (cr0&1)) @@ -189,7 +189,7 @@ static int op0F00_common(uint32_t fetchdat) } ldt.base = base; ldt.seg = sel; - cycles -= 20; + CLOCK_CYCLES(20); break; case 0x18: /*LTR*/ if ((CPL || eflags&VM_FLAG) && (cr0&1)) @@ -214,7 +214,7 @@ static int op0F00_common(uint32_t fetchdat) tr.limit |= 0xFFF; } tr.base = base; - cycles -= 20; + CLOCK_CYCLES(20); break; case 0x20: /*VERR*/ sel = geteaw(); if (abrt) return 1; @@ -233,7 +233,7 @@ static int op0F00_common(uint32_t fetchdat) } if ((desc & 0x0800) && !(desc & 0x0200)) valid = 0; /*Non-readable code*/ if (valid) flags |= Z_FLAG; - cycles -= 20; + CLOCK_CYCLES(20); break; case 0x28: /*VERW*/ sel = geteaw(); if (abrt) return 1; @@ -250,7 +250,7 @@ static int op0F00_common(uint32_t fetchdat) if (desc & 0x0800) valid = 0; /*Code*/ if (!(desc & 0x0200)) valid = 0; /*Read-only data*/ if (valid) flags |= Z_FLAG; - cycles -= 20; + CLOCK_CYCLES(20); break; default: @@ -292,7 +292,7 @@ static int op0F01_common(uint32_t fetchdat, int is32, int is286) if (is286) base |= 0xff000000; writememl(easeg, eaaddr + 2, base); - cycles -= 7; + CLOCK_CYCLES(7); break; case 0x08: /*SIDT*/ seteaw(idt.limit); @@ -300,7 +300,7 @@ static int op0F01_common(uint32_t fetchdat, int is32, int is286) if (is286) base |= 0xff000000; writememl(easeg, eaaddr + 2, base); - cycles -= 7; + CLOCK_CYCLES(7); break; case 0x10: /*LGDT*/ if ((CPL || eflags&VM_FLAG) && (cr0&1)) @@ -316,7 +316,7 @@ static int op0F01_common(uint32_t fetchdat, int is32, int is286) gdt.limit = limit; gdt.base = base; if (!is32) gdt.base &= 0xffffff; - cycles -= 11; + CLOCK_CYCLES(11); break; case 0x18: /*LIDT*/ if ((CPL || eflags&VM_FLAG) && (cr0&1)) @@ -332,13 +332,13 @@ static int op0F01_common(uint32_t fetchdat, int is32, int is286) idt.limit = limit; idt.base = base; if (!is32) idt.base &= 0xffffff; - cycles -= 11; + CLOCK_CYCLES(11); break; case 0x20: /*SMSW*/ if (is486) seteaw(msw); else seteaw(msw | 0xFF00); - cycles -= 2; + CLOCK_CYCLES(2); break; case 0x30: /*LMSW*/ if ((CPL || eflags&VM_FLAG) && (msw&1)) @@ -362,7 +362,7 @@ static int op0F01_common(uint32_t fetchdat, int is32, int is286) break; } mmu_invalidate(ds + eaaddr); - cycles -= 12; + CLOCK_CYCLES(12); break; } diff --git a/src/x86_ops_prefix.h b/src/x86_ops_prefix.h index 5fb0e51..775a7ad 100644 --- a/src/x86_ops_prefix.h +++ b/src/x86_ops_prefix.h @@ -7,7 +7,7 @@ static int op ## name ## _w_a16(uint32_t fetchdat) \ \ ea_seg = &seg; \ ssegs = 1; \ - cycles -= 4; \ + CLOCK_CYCLES(4); \ \ return x86_opcodes[fetchdat & 0xff](fetchdat >> 8); \ } \ @@ -20,7 +20,7 @@ static int op ## name ## _l_a16(uint32_t fetchdat) \ \ ea_seg = &seg; \ ssegs = 1; \ - cycles -= 4; \ + CLOCK_CYCLES(4); \ \ return x86_opcodes[(fetchdat & 0xff) | 0x100](fetchdat >> 8); \ } \ @@ -33,7 +33,7 @@ static int op ## name ## _w_a32(uint32_t fetchdat) \ \ ea_seg = &seg; \ ssegs = 1; \ - cycles -= 4; \ + CLOCK_CYCLES(4); \ \ return x86_opcodes[(fetchdat & 0xff) | 0x200](fetchdat >> 8); \ } \ @@ -46,7 +46,7 @@ static int op ## name ## _l_a32(uint32_t fetchdat) \ \ ea_seg = &seg; \ ssegs = 1; \ - cycles -= 4; \ + CLOCK_CYCLES(4); \ \ return x86_opcodes[(fetchdat & 0xff) | 0x300](fetchdat >> 8); \ } @@ -65,7 +65,7 @@ static int op_66(uint32_t fetchdat) /*Data size select*/ pc++; op32 = ((use32 & 0x100) ^ 0x100) | (op32 & 0x200); - cycles -= 2; + CLOCK_CYCLES(2); return x86_opcodes[(fetchdat & 0xff) | op32](fetchdat >> 8); } static int op_67(uint32_t fetchdat) /*Address size select*/ @@ -75,6 +75,6 @@ static int op_67(uint32_t fetchdat) /*Address size select*/ pc++; op32 = ((use32 & 0x200) ^ 0x200) | (op32 & 0x100); - cycles -= 2; + CLOCK_CYCLES(2); return x86_opcodes[(fetchdat & 0xff) | op32](fetchdat >> 8); } diff --git a/src/x86_ops_ret.h b/src/x86_ops_ret.h index 46f5b8a..71fd4f4 100644 --- a/src/x86_ops_ret.h +++ b/src/x86_ops_ret.h @@ -18,7 +18,7 @@ if (abrt) return 1; \ if (stack32) ESP += 4 + stack_offset; \ else SP += 4 + stack_offset; \ - cycles -= is486 ? 13 : 18; + CLOCK_CYCLES(is486 ? 13 : 18); #define RETF_a32(stack_offset) \ if ((msw&1) && !(eflags&VM_FLAG)) \ @@ -40,7 +40,7 @@ if (abrt) return 1; \ if (stack32) ESP += 8 + stack_offset; \ else SP += 8 + stack_offset; \ - cycles -= is486 ? 13 : 18; + CLOCK_CYCLES(is486 ? 13 : 18); static int opRETF_a16(uint32_t fetchdat) { @@ -104,7 +104,7 @@ static int opIRET_286(uint32_t fetchdat) loadcs(new_cs); } flags_extract(); - cycles -= is486 ? 15 : 22; + CLOCK_CYCLES(is486 ? 15 : 22); nmi_enable = 1; CPU_BLOCK_END(); return abrt; @@ -144,7 +144,7 @@ static int opIRET(uint32_t fetchdat) loadcs(new_cs); } flags_extract(); - cycles -= is486 ? 15 : 22; + CLOCK_CYCLES(is486 ? 15 : 22); nmi_enable = 1; CPU_BLOCK_END(); return abrt; @@ -186,7 +186,7 @@ static int opIRETD(uint32_t fetchdat) loadcs(new_cs); } flags_extract(); - cycles -= is486 ? 15 : 22; + CLOCK_CYCLES(is486 ? 15 : 22); nmi_enable = 1; CPU_BLOCK_END(); return abrt; diff --git a/src/x86_ops_set.h b/src/x86_ops_set.h index aaadf4b..028e249 100644 --- a/src/x86_ops_set.h +++ b/src/x86_ops_set.h @@ -3,7 +3,7 @@ { \ fetch_ea_16(fetchdat); \ seteab((cond_ ## condition) ? 1 : 0); \ - cycles -= 4; \ + CLOCK_CYCLES(4); \ return abrt; \ } \ \ @@ -11,7 +11,7 @@ { \ fetch_ea_32(fetchdat); \ seteab((cond_ ## condition) ? 1 : 0); \ - cycles -= 4; \ + CLOCK_CYCLES(4); \ return abrt; \ } diff --git a/src/x86_ops_shift.h b/src/x86_ops_shift.h index 71c5e7c..bc2fe76 100644 --- a/src/x86_ops_shift.h +++ b/src/x86_ops_shift.h @@ -16,7 +16,7 @@ flags &= ~(C_FLAG | V_FLAG); \ if (temp2) flags |= C_FLAG; \ if ((flags & C_FLAG) ^ (temp >> 7)) flags |= V_FLAG; \ - cycles -= ((mod == 3) ? 3 : 7); \ + CLOCK_CYCLES((mod == 3) ? 3 : 7); \ break; \ case 0x08: /*ROR b,CL*/ \ while (c > 0) \ @@ -30,51 +30,51 @@ flags &= ~(C_FLAG | V_FLAG); \ if (temp2) flags |= C_FLAG; \ if ((temp ^ (temp >> 1)) & 0x40) flags |= V_FLAG; \ - cycles -= ((mod == 3) ? 3 : 7); \ + CLOCK_CYCLES((mod == 3) ? 3 : 7); \ break; \ case 0x10: /*RCL b,CL*/ \ temp2 = flags & C_FLAG; \ + if (is486) CLOCK_CYCLES_ALWAYS(c); \ while (c > 0) \ { \ tempc = temp2 ? 1 : 0; \ temp2 = temp & 0x80; \ temp = (temp << 1) | tempc; \ c--; \ - if (is486) cycles--; \ } \ seteab(temp); if (abrt) return 1; \ flags &= ~(C_FLAG | V_FLAG); \ if (temp2) flags |= C_FLAG; \ if ((flags & C_FLAG) ^ (temp >> 7)) flags |= V_FLAG; \ - cycles -= ((mod == 3) ? 9 : 10); \ + CLOCK_CYCLES((mod == 3) ? 9 : 10); \ break; \ case 0x18: /*RCR b,CL*/ \ temp2 = flags & C_FLAG; \ + if (is486) CLOCK_CYCLES_ALWAYS(c); \ while (c > 0) \ { \ tempc = temp2 ? 0x80 : 0; \ temp2 = temp & 1; \ temp = (temp >> 1) | tempc; \ c--; \ - if (is486) cycles--; \ } \ seteab(temp); if (abrt) return 1; \ flags &= ~(C_FLAG | V_FLAG); \ if (temp2) flags |= C_FLAG; \ if ((temp ^ (temp >> 1)) & 0x40) flags |= V_FLAG; \ - cycles -= ((mod == 3) ? 9 : 10); \ + CLOCK_CYCLES((mod == 3) ? 9 : 10); \ break; \ case 0x20: case 0x30: /*SHL b,CL*/ \ seteab(temp << c); if (abrt) return 1; \ set_flags_shift(FLAGS_SHL8, temp_orig, c, (temp << c) & 0xff); \ if ((temp << (c - 1)) & 0x80) flags |= C_FLAG; \ - cycles -= ((mod == 3) ? 3 : 7); \ + CLOCK_CYCLES((mod == 3) ? 3 : 7); \ break; \ case 0x28: /*SHR b,CL*/ \ seteab(temp >> c); if (abrt) return 1; \ set_flags_shift(FLAGS_SHR8, temp_orig, c, temp >> c); \ if ((temp >> (c - 1)) & 1) flags |= C_FLAG; \ - cycles -= ((mod == 3) ? 3 : 7); \ + CLOCK_CYCLES((mod == 3) ? 3 : 7); \ break; \ case 0x38: /*SAR b,CL*/ \ tempc = ((temp >> (c - 1)) & 1); \ @@ -87,7 +87,7 @@ seteab(temp); if (abrt) return 1; \ set_flags_shift(FLAGS_SAR8, temp_orig, c, temp); \ if (tempc) flags |= C_FLAG; \ - cycles -= ((mod == 3) ? 3 : 7); \ + CLOCK_CYCLES((mod == 3) ? 3 : 7); \ break; \ } \ } @@ -110,7 +110,7 @@ flags &= ~(C_FLAG | V_FLAG); \ if (temp2) flags |= C_FLAG; \ if ((flags & C_FLAG) ^ (temp >> 15)) flags |= V_FLAG; \ - cycles -= ((mod == 3) ? 3 : 7); \ + CLOCK_CYCLES((mod == 3) ? 3 : 7); \ break; \ case 0x08: /*ROR w, c*/ \ while (c > 0) \ @@ -124,51 +124,51 @@ flags &= ~(C_FLAG | V_FLAG); \ if (temp2) flags |= C_FLAG; \ if ((temp ^ (temp >> 1)) & 0x4000) flags |= V_FLAG; \ - cycles -= ((mod == 3) ? 3 : 7); \ + CLOCK_CYCLES((mod == 3) ? 3 : 7); \ break; \ case 0x10: /*RCL w, c*/ \ temp2 = flags & C_FLAG; \ + if (is486) CLOCK_CYCLES_ALWAYS(c); \ while (c > 0) \ { \ tempc = temp2 ? 1 : 0; \ temp2 = temp & 0x8000; \ temp = (temp << 1) | tempc; \ c--; \ - if (is486) cycles--; \ } \ seteaw(temp); if (abrt) return 1; \ flags &= ~(C_FLAG | V_FLAG); \ if (temp2) flags |= C_FLAG; \ if ((flags & C_FLAG) ^ (temp >> 15)) flags |= V_FLAG; \ - cycles -= ((mod == 3) ? 9 : 10); \ + CLOCK_CYCLES((mod == 3) ? 9 : 10); \ break; \ case 0x18: /*RCR w, c*/ \ temp2 = flags & C_FLAG; \ + if (is486) CLOCK_CYCLES_ALWAYS(c); \ while (c > 0) \ { \ tempc = temp2 ? 0x8000 : 0; \ temp2 = temp & 1; \ temp = (temp >> 1) | tempc; \ c--; \ - if (is486) cycles--; \ } \ seteaw(temp); if (abrt) return 1; \ flags &= ~(C_FLAG | V_FLAG); \ if (temp2) flags |= C_FLAG; \ if ((temp ^ (temp >> 1)) & 0x4000) flags |= V_FLAG; \ - cycles -= ((mod == 3) ? 9 : 10); \ + CLOCK_CYCLES((mod == 3) ? 9 : 10); \ break; \ case 0x20: case 0x30: /*SHL w, c*/ \ seteaw(temp << c); if (abrt) return 1; \ set_flags_shift(FLAGS_SHL16, temp_orig, c, (temp << c) & 0xffff); \ if ((temp << (c - 1)) & 0x8000) flags |= C_FLAG; \ - cycles -= ((mod == 3) ? 3 : 7); \ + CLOCK_CYCLES((mod == 3) ? 3 : 7); \ break; \ case 0x28: /*SHR w, c*/ \ seteaw(temp >> c); if (abrt) return 1; \ set_flags_shift(FLAGS_SHR16, temp_orig, c, temp >> c); \ if ((temp >> (c - 1)) & 1) flags |= C_FLAG; \ - cycles -= ((mod == 3) ? 3 : 7); \ + CLOCK_CYCLES((mod == 3) ? 3 : 7); \ break; \ case 0x38: /*SAR w, c*/ \ tempc = ((temp >> (c - 1)) & 1); \ @@ -181,7 +181,7 @@ seteaw(temp); if (abrt) return 1; \ set_flags_shift(FLAGS_SAR16, temp_orig, c, temp); \ if (tempc) flags |= C_FLAG; \ - cycles -= ((mod == 3) ? 3 : 7); \ + CLOCK_CYCLES((mod == 3) ? 3 : 7); \ break; \ } \ } @@ -204,7 +204,7 @@ flags &= ~(C_FLAG | V_FLAG); \ if (temp2) flags |= C_FLAG; \ if ((flags & C_FLAG) ^ (temp >> 31)) flags |= V_FLAG; \ - cycles -= ((mod == 3) ? 3 : 7); \ + CLOCK_CYCLES((mod == 3) ? 3 : 7); \ break; \ case 0x08: /*ROR l, c*/ \ while (c > 0) \ @@ -218,51 +218,51 @@ flags &= ~(C_FLAG | V_FLAG); \ if (temp2) flags |= C_FLAG; \ if ((temp ^ (temp >> 1)) & 0x40000000) flags |= V_FLAG; \ - cycles -= ((mod == 3) ? 3 : 7); \ + CLOCK_CYCLES((mod == 3) ? 3 : 7); \ break; \ case 0x10: /*RCL l, c*/ \ temp2 = flags & C_FLAG; \ + if (is486) CLOCK_CYCLES_ALWAYS(c); \ while (c > 0) \ { \ tempc = temp2 ? 1 : 0; \ temp2 = temp & 0x80000000; \ temp = (temp << 1) | tempc; \ c--; \ - if (is486) cycles--; \ } \ seteal(temp); if (abrt) return 1; \ flags &= ~(C_FLAG | V_FLAG); \ if (temp2) flags |= C_FLAG; \ if ((flags & C_FLAG) ^ (temp >> 31)) flags |= V_FLAG; \ - cycles -= ((mod == 3) ? 9 : 10); \ + CLOCK_CYCLES((mod == 3) ? 9 : 10); \ break; \ case 0x18: /*RCR l, c*/ \ temp2 = flags & C_FLAG; \ + if (is486) CLOCK_CYCLES_ALWAYS(c); \ while (c > 0) \ { \ tempc = temp2 ? 0x80000000 : 0; \ temp2 = temp & 1; \ temp = (temp >> 1) | tempc; \ c--; \ - if (is486) cycles--; \ } \ seteal(temp); if (abrt) return 1; \ flags &= ~(C_FLAG | V_FLAG); \ if (temp2) flags |= C_FLAG; \ if ((temp ^ (temp >> 1)) & 0x40000000) flags |= V_FLAG; \ - cycles -= ((mod == 3) ? 9 : 10); \ + CLOCK_CYCLES((mod == 3) ? 9 : 10); \ break; \ case 0x20: case 0x30: /*SHL l, c*/ \ seteal(temp << c); if (abrt) return 1; \ set_flags_shift(FLAGS_SHL32, temp_orig, c, temp << c); \ if ((temp << (c - 1)) & 0x80000000) flags |= C_FLAG; \ - cycles -= ((mod == 3) ? 3 : 7); \ + CLOCK_CYCLES((mod == 3) ? 3 : 7); \ break; \ case 0x28: /*SHR l, c*/ \ seteal(temp >> c); if (abrt) return 1; \ set_flags_shift(FLAGS_SHR32, temp_orig, c, temp >> c); \ if ((temp >> (c - 1)) & 1) flags |= C_FLAG; \ - cycles -= ((mod == 3) ? 3 : 7); \ + CLOCK_CYCLES((mod == 3) ? 3 : 7); \ break; \ case 0x38: /*SAR l, c*/ \ tempc = ((temp >> (c - 1)) & 1); \ @@ -275,7 +275,7 @@ seteal(temp); if (abrt) return 1; \ set_flags_shift(FLAGS_SAR32, temp_orig, c, temp); \ if (tempc) flags |= C_FLAG; \ - cycles -= ((mod == 3) ? 3 : 7); \ + CLOCK_CYCLES((mod == 3) ? 3 : 7); \ break; \ } \ } @@ -555,7 +555,7 @@ static int opD3_l_a32(uint32_t fetchdat) count = getbyte() & 31; \ operation(); \ \ - cycles -= 3; \ + CLOCK_CYCLES(3); \ return 0; \ } \ static int op ## operation ## _CL_a16(uint32_t fetchdat) \ @@ -566,7 +566,7 @@ static int opD3_l_a32(uint32_t fetchdat) count = CL & 31; \ operation(); \ \ - cycles -= 3; \ + CLOCK_CYCLES(3); \ return 0; \ } \ static int op ## operation ## _i_a32(uint32_t fetchdat) \ @@ -577,7 +577,7 @@ static int opD3_l_a32(uint32_t fetchdat) count = getbyte() & 31; \ operation(); \ \ - cycles -= 3; \ + CLOCK_CYCLES(3); \ return 0; \ } \ static int op ## operation ## _CL_a32(uint32_t fetchdat) \ @@ -588,7 +588,7 @@ static int opD3_l_a32(uint32_t fetchdat) count = CL & 31; \ operation(); \ \ - cycles -= 3; \ + CLOCK_CYCLES(3); \ return 0; \ } diff --git a/src/x86_ops_stack.h b/src/x86_ops_stack.h index 5986a3c..edb9424 100644 --- a/src/x86_ops_stack.h +++ b/src/x86_ops_stack.h @@ -2,7 +2,7 @@ static int opPUSH_ ## reg (uint32_t fetchdat) \ { \ PUSH_W(reg); \ - cycles -= (is486) ? 1 : 2; \ + CLOCK_CYCLES((is486) ? 1 : 2); \ return abrt; \ } @@ -10,7 +10,7 @@ static int opPUSH_ ## reg (uint32_t fetchdat) \ { \ PUSH_L(reg); \ - cycles -= (is486) ? 1 : 2; \ + CLOCK_CYCLES((is486) ? 1 : 2); \ return abrt; \ } @@ -18,7 +18,7 @@ static int opPOP_ ## reg (uint32_t fetchdat) \ { \ reg = POP_W(); \ - cycles -= (is486) ? 1 : 4; \ + CLOCK_CYCLES((is486) ? 1 : 4); \ return abrt; \ } @@ -26,7 +26,7 @@ static int opPOP_ ## reg (uint32_t fetchdat) \ { \ reg = POP_L(); \ - cycles -= (is486) ? 1 : 4; \ + CLOCK_CYCLES((is486) ? 1 : 4); \ return abrt; \ } @@ -93,7 +93,7 @@ static int opPUSHA_w(uint32_t fetchdat) writememw(ss, ((SP - 16) & 0xFFFF), DI); if (!abrt) SP -= 16; } - cycles -= (is486) ? 11 : 18; + CLOCK_CYCLES((is486) ? 11 : 18); return abrt; } static int opPUSHA_l(uint32_t fetchdat) @@ -122,7 +122,7 @@ static int opPUSHA_l(uint32_t fetchdat) writememl(ss, ((SP - 32) & 0xFFFF), EDI); if (!abrt) SP -= 32; } - cycles -= (is486) ? 11 : 18; + CLOCK_CYCLES((is486) ? 11 : 18); return abrt; } @@ -150,7 +150,7 @@ static int opPOPA_w(uint32_t fetchdat) AX = readmemw(ss, ((SP + 14) & 0xFFFF)); if (abrt) return 1; SP += 16; } - cycles -= (is486) ? 9 : 24; + CLOCK_CYCLES((is486) ? 9 : 24); return 0; } static int opPOPA_l(uint32_t fetchdat) @@ -177,7 +177,7 @@ static int opPOPA_l(uint32_t fetchdat) EAX = readmeml(ss, ((SP + 28) & 0xFFFF)); if (abrt) return 1; SP += 32; } - cycles -= (is486) ? 9 : 24; + CLOCK_CYCLES((is486) ? 9 : 24); return 0; } @@ -185,14 +185,14 @@ static int opPUSH_imm_w(uint32_t fetchdat) { uint16_t val = getwordf(); PUSH_W(val); - cycles -= 2; + CLOCK_CYCLES(2); return abrt; } static int opPUSH_imm_l(uint32_t fetchdat) { uint32_t val = getlong(); if (abrt) return 1; PUSH_L(val); - cycles -= 2; + CLOCK_CYCLES(2); return abrt; } @@ -203,7 +203,7 @@ static int opPUSH_imm_bw(uint32_t fetchdat) if (tempw & 0x80) tempw |= 0xFF00; PUSH_W(tempw); - cycles -= 2; + CLOCK_CYCLES(2); return abrt; } static int opPUSH_imm_bl(uint32_t fetchdat) @@ -213,7 +213,7 @@ static int opPUSH_imm_bl(uint32_t fetchdat) if (templ & 0x80) templ |= 0xFFFFFF00; PUSH_L(templ); - cycles -= 2; + CLOCK_CYCLES(2); return abrt; } @@ -231,8 +231,8 @@ static int opPOPW_a16(uint32_t fetchdat) else SP -= 2; } - if (is486) cycles -= ((mod == 3) ? 1 : 6); - else cycles -= ((mod == 3) ? 4 : 5); + if (is486) CLOCK_CYCLES((mod == 3) ? 1 : 6); + else CLOCK_CYCLES((mod == 3) ? 4 : 5); return abrt; } static int opPOPW_a32(uint32_t fetchdat) @@ -249,8 +249,8 @@ static int opPOPW_a32(uint32_t fetchdat) else SP -= 2; } - if (is486) cycles -= ((mod == 3) ? 1 : 6); - else cycles -= ((mod == 3) ? 4 : 5); + if (is486) CLOCK_CYCLES((mod == 3) ? 1 : 6); + else CLOCK_CYCLES((mod == 3) ? 4 : 5); return abrt; } @@ -268,8 +268,8 @@ static int opPOPL_a16(uint32_t fetchdat) else SP -= 4; } - if (is486) cycles -= ((mod == 3) ? 1 : 6); - else cycles -= ((mod == 3) ? 4 : 5); + if (is486) CLOCK_CYCLES((mod == 3) ? 1 : 6); + else CLOCK_CYCLES((mod == 3) ? 4 : 5); return abrt; } static int opPOPL_a32(uint32_t fetchdat) @@ -286,8 +286,8 @@ static int opPOPL_a32(uint32_t fetchdat) else SP -= 4; } - if (is486) cycles -= ((mod == 3) ? 1 : 6); - else cycles -= ((mod == 3) ? 4 : 5); + if (is486) CLOCK_CYCLES((mod == 3) ? 1 : 6); + else CLOCK_CYCLES((mod == 3) ? 4 : 5); return abrt; } @@ -312,17 +312,17 @@ static int opENTER_w(uint32_t fetchdat) if (abrt) { ESP = tempESP; EBP = tempEBP; return 1; } PUSH_W(tempw); if (abrt) { ESP = tempESP; EBP = tempEBP; return 1; } - cycles -= (is486) ? 3 : 4; + CLOCK_CYCLES((is486) ? 3 : 4); } PUSH_W(frame_ptr); if (abrt) { ESP = tempESP; EBP = tempEBP; return 1; } - cycles -= (is486) ? 3 : 5; + CLOCK_CYCLES((is486) ? 3 : 5); } BP = frame_ptr; if (stack32) ESP -= offset; else SP -= offset; - cycles -= (is486) ? 14 : 10; + CLOCK_CYCLES((is486) ? 14 : 10); return 0; } static int opENTER_l(uint32_t fetchdat) @@ -345,17 +345,17 @@ static int opENTER_l(uint32_t fetchdat) if (abrt) { ESP = tempESP; EBP = tempEBP; return 1; } PUSH_L(templ); if (abrt) { ESP = tempESP; EBP = tempEBP; return 1; } - cycles -= (is486) ? 3 : 4; + CLOCK_CYCLES((is486) ? 3 : 4); } PUSH_L(frame_ptr); if (abrt) { ESP = tempESP; EBP = tempEBP; return 1; } - cycles -= (is486) ? 3 : 5; + CLOCK_CYCLES((is486) ? 3 : 5); } EBP = frame_ptr; if (stack32) ESP -= offset; else SP -= offset; - cycles -= (is486) ? 14 : 10; + CLOCK_CYCLES((is486) ? 14 : 10); return 0; } @@ -370,7 +370,7 @@ static int opLEAVE_w(uint32_t fetchdat) if (abrt) { ESP = tempESP; return 1; } BP = temp; - cycles -= 4; + CLOCK_CYCLES(4); return 0; } static int opLEAVE_l(uint32_t fetchdat) @@ -383,7 +383,7 @@ static int opLEAVE_l(uint32_t fetchdat) if (abrt) { ESP = tempESP; return 1; } EBP = temp; - cycles -= 4; + CLOCK_CYCLES(4); return 0; } @@ -392,14 +392,14 @@ static int opLEAVE_l(uint32_t fetchdat) static int opPUSH_ ## seg ## _w(uint32_t fetchdat) \ { \ PUSH_W(seg); \ - cycles -= 2; \ - return abrt; \ + CLOCK_CYCLES(2); \ + return abrt; \ } \ static int opPUSH_ ## seg ## _l(uint32_t fetchdat) \ { \ PUSH_L(seg); \ - cycles -= 2; \ - return abrt; \ + CLOCK_CYCLES(2); \ + return abrt; \ } #define POP_SEG_OPS(seg, realseg) \ @@ -409,8 +409,8 @@ static int opLEAVE_l(uint32_t fetchdat) uint32_t temp_esp = ESP; \ temp_seg = POP_W(); if (abrt) return 1; \ loadseg(temp_seg, realseg); if (abrt) ESP = temp_esp; \ - cycles -= is486 ? 3 : 7; \ - return abrt; \ + CLOCK_CYCLES(is486 ? 3 : 7); \ + return abrt; \ } \ static int opPOP_ ## seg ## _l(uint32_t fetchdat) \ { \ @@ -418,8 +418,8 @@ static int opLEAVE_l(uint32_t fetchdat) uint32_t temp_esp = ESP; \ temp_seg = POP_L(); if (abrt) return 1; \ loadseg(temp_seg & 0xffff, realseg); if (abrt) ESP = temp_esp; \ - cycles -= is486 ? 3 : 7; \ - return abrt; \ + CLOCK_CYCLES(is486 ? 3 : 7); \ + return abrt; \ } diff --git a/src/x86_ops_string.h b/src/x86_ops_string.h index 544047c..91f779b 100644 --- a/src/x86_ops_string.h +++ b/src/x86_ops_string.h @@ -4,7 +4,7 @@ static int opMOVSB_a16(uint32_t fetchdat) writememb(es, DI, temp); if (abrt) return 1; if (flags & D_FLAG) { DI--; SI--; } else { DI++; SI++; } - cycles -= 7; + CLOCK_CYCLES(7); return 0; } static int opMOVSB_a32(uint32_t fetchdat) @@ -13,7 +13,7 @@ static int opMOVSB_a32(uint32_t fetchdat) writememb(es, EDI, temp); if (abrt) return 1; if (flags & D_FLAG) { EDI--; ESI--; } else { EDI++; ESI++; } - cycles -= 7; + CLOCK_CYCLES(7); return 0; } @@ -23,7 +23,7 @@ static int opMOVSW_a16(uint32_t fetchdat) writememw(es, DI, temp); if (abrt) return 1; if (flags & D_FLAG) { DI -= 2; SI -= 2; } else { DI += 2; SI += 2; } - cycles -= 7; + CLOCK_CYCLES(7); return 0; } static int opMOVSW_a32(uint32_t fetchdat) @@ -32,7 +32,7 @@ static int opMOVSW_a32(uint32_t fetchdat) writememw(es, EDI, temp); if (abrt) return 1; if (flags & D_FLAG) { EDI -= 2; ESI -= 2; } else { EDI += 2; ESI += 2; } - cycles -= 7; + CLOCK_CYCLES(7); return 0; } @@ -42,7 +42,7 @@ static int opMOVSL_a16(uint32_t fetchdat) writememl(es, DI, temp); if (abrt) return 1; if (flags & D_FLAG) { DI -= 4; SI -= 4; } else { DI += 4; SI += 4; } - cycles -= 7; + CLOCK_CYCLES(7); return 0; } static int opMOVSL_a32(uint32_t fetchdat) @@ -51,7 +51,7 @@ static int opMOVSL_a32(uint32_t fetchdat) writememl(es, EDI, temp); if (abrt) return 1; if (flags & D_FLAG) { EDI -= 4; ESI -= 4; } else { EDI += 4; ESI += 4; } - cycles -= 7; + CLOCK_CYCLES(7); return 0; } @@ -63,7 +63,7 @@ static int opCMPSB_a16(uint32_t fetchdat) setsub8(src, dst); if (flags & D_FLAG) { DI--; SI--; } else { DI++; SI++; } - cycles -= (is486) ? 8 : 10; + CLOCK_CYCLES((is486) ? 8 : 10); return 0; } static int opCMPSB_a32(uint32_t fetchdat) @@ -73,7 +73,7 @@ static int opCMPSB_a32(uint32_t fetchdat) setsub8(src, dst); if (flags & D_FLAG) { EDI--; ESI--; } else { EDI++; ESI++; } - cycles -= (is486) ? 8 : 10; + CLOCK_CYCLES((is486) ? 8 : 10); return 0; } @@ -84,7 +84,7 @@ static int opCMPSW_a16(uint32_t fetchdat) setsub16(src, dst); if (flags & D_FLAG) { DI -= 2; SI -= 2; } else { DI += 2; SI += 2; } - cycles -= (is486) ? 8 : 10; + CLOCK_CYCLES((is486) ? 8 : 10); return 0; } static int opCMPSW_a32(uint32_t fetchdat) @@ -94,7 +94,7 @@ static int opCMPSW_a32(uint32_t fetchdat) setsub16(src, dst); if (flags & D_FLAG) { EDI -= 2; ESI -= 2; } else { EDI += 2; ESI += 2; } - cycles -= (is486) ? 8 : 10; + CLOCK_CYCLES((is486) ? 8 : 10); return 0; } @@ -105,7 +105,7 @@ static int opCMPSL_a16(uint32_t fetchdat) setsub32(src, dst); if (flags & D_FLAG) { DI -= 4; SI -= 4; } else { DI += 4; SI += 4; } - cycles -= (is486) ? 8 : 10; + CLOCK_CYCLES((is486) ? 8 : 10); return 0; } static int opCMPSL_a32(uint32_t fetchdat) @@ -115,7 +115,7 @@ static int opCMPSL_a32(uint32_t fetchdat) setsub32(src, dst); if (flags & D_FLAG) { EDI -= 4; ESI -= 4; } else { EDI += 4; ESI += 4; } - cycles -= (is486) ? 8 : 10; + CLOCK_CYCLES((is486) ? 8 : 10); return 0; } @@ -124,7 +124,7 @@ static int opSTOSB_a16(uint32_t fetchdat) writememb(es, DI, AL); if (abrt) return 1; if (flags & D_FLAG) DI--; else DI++; - cycles -= 4; + CLOCK_CYCLES(4); return 0; } static int opSTOSB_a32(uint32_t fetchdat) @@ -132,7 +132,7 @@ static int opSTOSB_a32(uint32_t fetchdat) writememb(es, EDI, AL); if (abrt) return 1; if (flags & D_FLAG) EDI--; else EDI++; - cycles -= 4; + CLOCK_CYCLES(4); return 0; } @@ -141,7 +141,7 @@ static int opSTOSW_a16(uint32_t fetchdat) writememw(es, DI, AX); if (abrt) return 1; if (flags & D_FLAG) DI -= 2; else DI += 2; - cycles -= 4; + CLOCK_CYCLES(4); return 0; } static int opSTOSW_a32(uint32_t fetchdat) @@ -149,7 +149,7 @@ static int opSTOSW_a32(uint32_t fetchdat) writememw(es, EDI, AX); if (abrt) return 1; if (flags & D_FLAG) EDI -= 2; else EDI += 2; - cycles -= 4; + CLOCK_CYCLES(4); return 0; } @@ -158,7 +158,7 @@ static int opSTOSL_a16(uint32_t fetchdat) writememl(es, DI, EAX); if (abrt) return 1; if (flags & D_FLAG) DI -= 4; else DI += 4; - cycles -= 4; + CLOCK_CYCLES(4); return 0; } static int opSTOSL_a32(uint32_t fetchdat) @@ -166,7 +166,7 @@ static int opSTOSL_a32(uint32_t fetchdat) writememl(es, EDI, EAX); if (abrt) return 1; if (flags & D_FLAG) EDI -= 4; else EDI += 4; - cycles -= 4; + CLOCK_CYCLES(4); return 0; } @@ -177,7 +177,7 @@ static int opLODSB_a16(uint32_t fetchdat) AL = temp; if (flags & D_FLAG) SI--; else SI++; - cycles -= 5; + CLOCK_CYCLES(5); return 0; } static int opLODSB_a32(uint32_t fetchdat) @@ -186,7 +186,7 @@ static int opLODSB_a32(uint32_t fetchdat) AL = temp; if (flags & D_FLAG) ESI--; else ESI++; - cycles -= 5; + CLOCK_CYCLES(5); return 0; } @@ -196,7 +196,7 @@ static int opLODSW_a16(uint32_t fetchdat) AX = temp; if (flags & D_FLAG) SI -= 2; else SI += 2; - cycles -= 5; + CLOCK_CYCLES(5); return 0; } static int opLODSW_a32(uint32_t fetchdat) @@ -205,7 +205,7 @@ static int opLODSW_a32(uint32_t fetchdat) AX = temp; if (flags & D_FLAG) ESI -= 2; else ESI += 2; - cycles -= 5; + CLOCK_CYCLES(5); return 0; } @@ -215,7 +215,7 @@ static int opLODSL_a16(uint32_t fetchdat) EAX = temp; if (flags & D_FLAG) SI -= 4; else SI += 4; - cycles -= 5; + CLOCK_CYCLES(5); return 0; } static int opLODSL_a32(uint32_t fetchdat) @@ -224,7 +224,7 @@ static int opLODSL_a32(uint32_t fetchdat) EAX = temp; if (flags & D_FLAG) ESI -= 4; else ESI += 4; - cycles -= 5; + CLOCK_CYCLES(5); return 0; } @@ -235,7 +235,7 @@ static int opSCASB_a16(uint32_t fetchdat) setsub8(AL, temp); if (flags & D_FLAG) DI--; else DI++; - cycles -= 7; + CLOCK_CYCLES(7); return 0; } static int opSCASB_a32(uint32_t fetchdat) @@ -244,7 +244,7 @@ static int opSCASB_a32(uint32_t fetchdat) setsub8(AL, temp); if (flags & D_FLAG) EDI--; else EDI++; - cycles -= 7; + CLOCK_CYCLES(7); return 0; } @@ -254,7 +254,7 @@ static int opSCASW_a16(uint32_t fetchdat) setsub16(AX, temp); if (flags & D_FLAG) DI -= 2; else DI += 2; - cycles -= 7; + CLOCK_CYCLES(7); return 0; } static int opSCASW_a32(uint32_t fetchdat) @@ -263,7 +263,7 @@ static int opSCASW_a32(uint32_t fetchdat) setsub16(AX, temp); if (flags & D_FLAG) EDI -= 2; else EDI += 2; - cycles -= 7; + CLOCK_CYCLES(7); return 0; } @@ -273,7 +273,7 @@ static int opSCASL_a16(uint32_t fetchdat) setsub32(EAX, temp); if (flags & D_FLAG) DI -= 4; else DI += 4; - cycles -= 7; + CLOCK_CYCLES(7); return 0; } static int opSCASL_a32(uint32_t fetchdat) @@ -282,7 +282,7 @@ static int opSCASL_a32(uint32_t fetchdat) setsub32(EAX, temp); if (flags & D_FLAG) EDI -= 4; else EDI += 4; - cycles -= 7; + CLOCK_CYCLES(7); return 0; } @@ -294,7 +294,7 @@ static int opINSB_a16(uint32_t fetchdat) writememb(es, DI, temp); if (abrt) return 1; if (flags & D_FLAG) DI--; else DI++; - cycles -= 15; + CLOCK_CYCLES(15); return 0; } static int opINSB_a32(uint32_t fetchdat) @@ -305,7 +305,7 @@ static int opINSB_a32(uint32_t fetchdat) writememb(es, EDI, temp); if (abrt) return 1; if (flags & D_FLAG) EDI--; else EDI++; - cycles -= 15; + CLOCK_CYCLES(15); return 0; } @@ -318,7 +318,7 @@ static int opINSW_a16(uint32_t fetchdat) writememw(es, DI, temp); if (abrt) return 1; if (flags & D_FLAG) DI -= 2; else DI += 2; - cycles -= 15; + CLOCK_CYCLES(15); return 0; } static int opINSW_a32(uint32_t fetchdat) @@ -330,7 +330,7 @@ static int opINSW_a32(uint32_t fetchdat) writememw(es, EDI, temp); if (abrt) return 1; if (flags & D_FLAG) EDI -= 2; else EDI += 2; - cycles -= 15; + CLOCK_CYCLES(15); return 0; } @@ -345,7 +345,7 @@ static int opINSL_a16(uint32_t fetchdat) writememl(es, DI, temp); if (abrt) return 1; if (flags & D_FLAG) DI -= 4; else DI += 4; - cycles -= 15; + CLOCK_CYCLES(15); return 0; } static int opINSL_a32(uint32_t fetchdat) @@ -359,7 +359,7 @@ static int opINSL_a32(uint32_t fetchdat) writememl(es, EDI, temp); if (abrt) return 1; if (flags & D_FLAG) EDI -= 4; else EDI += 4; - cycles -= 15; + CLOCK_CYCLES(15); return 0; } @@ -370,7 +370,7 @@ static int opOUTSB_a16(uint32_t fetchdat) if (flags & D_FLAG) SI--; else SI++; outb(DX, temp); - cycles -= 14; + CLOCK_CYCLES(14); return 0; } static int opOUTSB_a32(uint32_t fetchdat) @@ -380,7 +380,7 @@ static int opOUTSB_a32(uint32_t fetchdat) if (flags & D_FLAG) ESI--; else ESI++; outb(DX, temp); - cycles -= 14; + CLOCK_CYCLES(14); return 0; } @@ -392,7 +392,7 @@ static int opOUTSW_a16(uint32_t fetchdat) if (flags & D_FLAG) SI -= 2; else SI += 2; outw(DX, temp); - cycles -= 14; + CLOCK_CYCLES(14); return 0; } static int opOUTSW_a32(uint32_t fetchdat) @@ -403,7 +403,7 @@ static int opOUTSW_a32(uint32_t fetchdat) if (flags & D_FLAG) ESI -= 2; else ESI += 2; outw(DX, temp); - cycles -= 14; + CLOCK_CYCLES(14); return 0; } @@ -417,7 +417,7 @@ static int opOUTSL_a16(uint32_t fetchdat) if (flags & D_FLAG) SI -= 4; else SI += 4; outl(EDX, temp); - cycles -= 14; + CLOCK_CYCLES(14); return 0; } static int opOUTSL_a32(uint32_t fetchdat) @@ -430,6 +430,6 @@ static int opOUTSL_a32(uint32_t fetchdat) if (flags & D_FLAG) ESI -= 4; else ESI += 4; outl(EDX, temp); - cycles -= 14; + CLOCK_CYCLES(14); return 0; } diff --git a/src/x86_ops_xchg.h b/src/x86_ops_xchg.h index 4dd626b..b007bf6 100644 --- a/src/x86_ops_xchg.h +++ b/src/x86_ops_xchg.h @@ -5,7 +5,7 @@ static int opXCHG_b_a16(uint32_t fetchdat) temp = geteab(); if (abrt) return 1; seteab(getr8(reg)); if (abrt) return 1; setr8(reg, temp); - cycles -= ((mod == 3) ? 3 : 5); + CLOCK_CYCLES((mod == 3) ? 3 : 5); return 0; } static int opXCHG_b_a32(uint32_t fetchdat) @@ -15,7 +15,7 @@ static int opXCHG_b_a32(uint32_t fetchdat) temp = geteab(); if (abrt) return 1; seteab(getr8(reg)); if (abrt) return 1; setr8(reg, temp); - cycles -= ((mod == 3) ? 3 : 5); + CLOCK_CYCLES((mod == 3) ? 3 : 5); return 0; } @@ -26,7 +26,7 @@ static int opXCHG_w_a16(uint32_t fetchdat) temp = geteaw(); if (abrt) return 1; seteaw(regs[reg].w); if (abrt) return 1; regs[reg].w = temp; - cycles -= ((mod == 3) ? 3 : 5); + CLOCK_CYCLES((mod == 3) ? 3 : 5); return 0; } static int opXCHG_w_a32(uint32_t fetchdat) @@ -36,7 +36,7 @@ static int opXCHG_w_a32(uint32_t fetchdat) temp = geteaw(); if (abrt) return 1; seteaw(regs[reg].w); if (abrt) return 1; regs[reg].w = temp; - cycles -= ((mod == 3) ? 3 : 5); + CLOCK_CYCLES((mod == 3) ? 3 : 5); return 0; } @@ -47,7 +47,7 @@ static int opXCHG_l_a16(uint32_t fetchdat) temp = geteal(); if (abrt) return 1; seteal(regs[reg].l); if (abrt) return 1; regs[reg].l = temp; - cycles -= ((mod == 3) ? 3 : 5); + CLOCK_CYCLES((mod == 3) ? 3 : 5); return 0; } static int opXCHG_l_a32(uint32_t fetchdat) @@ -57,7 +57,7 @@ static int opXCHG_l_a32(uint32_t fetchdat) temp = geteal(); if (abrt) return 1; seteal(regs[reg].l); if (abrt) return 1; regs[reg].l = temp; - cycles -= ((mod == 3) ? 3 : 5); + CLOCK_CYCLES((mod == 3) ? 3 : 5); return 0; } @@ -67,7 +67,7 @@ static int opXCHG_AX_BX(uint32_t fetchdat) uint16_t temp = AX; AX = BX; BX = temp; - cycles -= 3; + CLOCK_CYCLES(3); return 0; } static int opXCHG_AX_CX(uint32_t fetchdat) @@ -75,7 +75,7 @@ static int opXCHG_AX_CX(uint32_t fetchdat) uint16_t temp = AX; AX = CX; CX = temp; - cycles -= 3; + CLOCK_CYCLES(3); return 0; } static int opXCHG_AX_DX(uint32_t fetchdat) @@ -83,7 +83,7 @@ static int opXCHG_AX_DX(uint32_t fetchdat) uint16_t temp = AX; AX = DX; DX = temp; - cycles -= 3; + CLOCK_CYCLES(3); return 0; } static int opXCHG_AX_SI(uint32_t fetchdat) @@ -91,7 +91,7 @@ static int opXCHG_AX_SI(uint32_t fetchdat) uint16_t temp = AX; AX = SI; SI = temp; - cycles -= 3; + CLOCK_CYCLES(3); return 0; } static int opXCHG_AX_DI(uint32_t fetchdat) @@ -99,7 +99,7 @@ static int opXCHG_AX_DI(uint32_t fetchdat) uint16_t temp = AX; AX = DI; DI = temp; - cycles -= 3; + CLOCK_CYCLES(3); return 0; } static int opXCHG_AX_BP(uint32_t fetchdat) @@ -107,7 +107,7 @@ static int opXCHG_AX_BP(uint32_t fetchdat) uint16_t temp = AX; AX = BP; BP = temp; - cycles -= 3; + CLOCK_CYCLES(3); return 0; } static int opXCHG_AX_SP(uint32_t fetchdat) @@ -115,7 +115,7 @@ static int opXCHG_AX_SP(uint32_t fetchdat) uint16_t temp = AX; AX = SP; SP = temp; - cycles -= 3; + CLOCK_CYCLES(3); return 0; } @@ -124,7 +124,7 @@ static int opXCHG_EAX_EBX(uint32_t fetchdat) uint32_t temp = EAX; EAX = EBX; EBX = temp; - cycles -= 3; + CLOCK_CYCLES(3); return 0; } static int opXCHG_EAX_ECX(uint32_t fetchdat) @@ -132,7 +132,7 @@ static int opXCHG_EAX_ECX(uint32_t fetchdat) uint32_t temp = EAX; EAX = ECX; ECX = temp; - cycles -= 3; + CLOCK_CYCLES(3); return 0; } static int opXCHG_EAX_EDX(uint32_t fetchdat) @@ -140,7 +140,7 @@ static int opXCHG_EAX_EDX(uint32_t fetchdat) uint32_t temp = EAX; EAX = EDX; EDX = temp; - cycles -= 3; + CLOCK_CYCLES(3); return 0; } static int opXCHG_EAX_ESI(uint32_t fetchdat) @@ -148,7 +148,7 @@ static int opXCHG_EAX_ESI(uint32_t fetchdat) uint32_t temp = EAX; EAX = ESI; ESI = temp; - cycles -= 3; + CLOCK_CYCLES(3); return 0; } static int opXCHG_EAX_EDI(uint32_t fetchdat) @@ -156,7 +156,7 @@ static int opXCHG_EAX_EDI(uint32_t fetchdat) uint32_t temp = EAX; EAX = EDI; EDI = temp; - cycles -= 3; + CLOCK_CYCLES(3); return 0; } static int opXCHG_EAX_EBP(uint32_t fetchdat) @@ -164,7 +164,7 @@ static int opXCHG_EAX_EBP(uint32_t fetchdat) uint32_t temp = EAX; EAX = EBP; EBP = temp; - cycles -= 3; + CLOCK_CYCLES(3); return 0; } static int opXCHG_EAX_ESP(uint32_t fetchdat) @@ -172,7 +172,7 @@ static int opXCHG_EAX_ESP(uint32_t fetchdat) uint32_t temp = EAX; EAX = ESP; ESP = temp; - cycles -= 3; + CLOCK_CYCLES(3); return 0; } @@ -181,7 +181,7 @@ static int opXCHG_EAX_ESP(uint32_t fetchdat) static int opBSWAP_ ## reg(uint32_t fetchdat) \ { \ reg = (reg >> 24) | ((reg >> 8) & 0xff00) | ((reg << 8) & 0xff0000) | ((reg << 24) & 0xff000000); \ - cycles--; \ + CLOCK_CYCLES(1); \ return 0; \ } diff --git a/src/x87_ops_arith.h b/src/x87_ops_arith.h index 30a6503..65c5608 100644 --- a/src/x87_ops_arith.h +++ b/src/x87_ops_arith.h @@ -6,7 +6,8 @@ static int opFADD ## name ## _a ## a_size(uint32_t fetchdat) \ fetch_ea_ ## a_size(fetchdat); \ load_var = get(); if (abrt) return 1; \ ST(0) += use_var; \ - cycles -= 8; \ + CLOCK_CYCLES(8); \ + return 0; \ } \ static int opFCOM ## name ## _a ## a_size(uint32_t fetchdat) \ { \ @@ -17,7 +18,8 @@ static int opFCOM ## name ## _a ## a_size(uint32_t fetchdat) \ npxs &= ~(C0|C2|C3); \ if (ST(0) == use_var) npxs |= C3; \ else if (ST(0) < use_var) npxs |= C0; \ - cycles -= 4; \ + CLOCK_CYCLES(4); \ + return 0; \ } \ static int opFCOMP ## name ## _a ## a_size(uint32_t fetchdat) \ { \ @@ -29,7 +31,8 @@ static int opFCOMP ## name ## _a ## a_size(uint32_t fetchdat) \ if (ST(0) == use_var) npxs |= C3; \ else if (ST(0) < use_var) npxs |= C0; \ x87_pop(); \ - cycles -= 4; \ + CLOCK_CYCLES(4); \ + return 0; \ } \ static int opFDIV ## name ## _a ## a_size(uint32_t fetchdat) \ { \ @@ -38,7 +41,8 @@ static int opFDIV ## name ## _a ## a_size(uint32_t fetchdat) \ fetch_ea_ ## a_size(fetchdat); \ load_var = get(); if (abrt) return 1; \ x87_div(ST(0), ST(0), use_var); \ - cycles -= 73; \ + CLOCK_CYCLES(73); \ + return 0; \ } \ static int opFDIVR ## name ## _a ## a_size(uint32_t fetchdat) \ { \ @@ -47,7 +51,8 @@ static int opFDIVR ## name ## _a ## a_size(uint32_t fetchdat) \ fetch_ea_ ## a_size(fetchdat); \ load_var = get(); if (abrt) return 1; \ x87_div(ST(0), use_var, ST(0)); \ - cycles -= 73; \ + CLOCK_CYCLES(73); \ + return 0; \ } \ static int opFMUL ## name ## _a ## a_size(uint32_t fetchdat) \ { \ @@ -56,7 +61,8 @@ static int opFMUL ## name ## _a ## a_size(uint32_t fetchdat) \ fetch_ea_ ## a_size(fetchdat); \ load_var = get(); if (abrt) return 1; \ ST(0) *= use_var; \ - cycles -= 11; \ + CLOCK_CYCLES(11); \ + return 0; \ } \ static int opFSUB ## name ## _a ## a_size(uint32_t fetchdat) \ { \ @@ -65,7 +71,8 @@ static int opFSUB ## name ## _a ## a_size(uint32_t fetchdat) \ fetch_ea_ ## a_size(fetchdat); \ load_var = get(); if (abrt) return 1; \ ST(0) -= use_var; \ - cycles -= 8; \ + CLOCK_CYCLES(8); \ + return 0; \ } \ static int opFSUBR ## name ## _a ## a_size(uint32_t fetchdat) \ { \ @@ -74,7 +81,8 @@ static int opFSUBR ## name ## _a ## a_size(uint32_t fetchdat) \ fetch_ea_ ## a_size(fetchdat); \ load_var = get(); if (abrt) return 1; \ ST(0) = use_var - ST(0); \ - cycles -= 8; \ + CLOCK_CYCLES(8); \ + return 0; \ } @@ -97,7 +105,7 @@ static int opFADD(uint32_t fetchdat) pc++; if (fplog) pclog("FADD\n"); ST(0) = ST(0) + ST(fetchdat & 7); - cycles -= 8; + CLOCK_CYCLES(8); return 0; } static int opFADDr(uint32_t fetchdat) @@ -106,7 +114,7 @@ static int opFADDr(uint32_t fetchdat) pc++; if (fplog) pclog("FADD\n"); ST(fetchdat & 7) = ST(fetchdat & 7) + ST(0); - cycles -= 8; + CLOCK_CYCLES(8); return 0; } static int opFADDP(uint32_t fetchdat) @@ -116,7 +124,7 @@ static int opFADDP(uint32_t fetchdat) if (fplog) pclog("FADDP\n"); ST(fetchdat & 7) = ST(fetchdat & 7) + ST(0); x87_pop(); - cycles -= 8; + CLOCK_CYCLES(8); return 0; } @@ -128,7 +136,7 @@ static int opFCOM(uint32_t fetchdat) npxs &= ~(C0|C2|C3); if (ST(0) == ST(fetchdat & 7)) npxs |= C3; else if (ST(0) < ST(fetchdat & 7)) npxs |= C0; - cycles -= 4; + CLOCK_CYCLES(4); return 0; } @@ -141,7 +149,7 @@ static int opFCOMP(uint32_t fetchdat) if (ST(0) == ST(fetchdat & 7)) npxs |= C3; else if (ST(0) < ST(fetchdat & 7)) npxs |= C0; x87_pop(); - cycles -= 4; + CLOCK_CYCLES(4); return 0; } @@ -155,7 +163,7 @@ static int opFCOMPP(uint32_t fetchdat) else if (ST(0) < ST(1)) npxs |= C0; x87_pop(); x87_pop(); - cycles -= 4; + CLOCK_CYCLES(4); return 0; } static int opFUCOMPP(uint32_t fetchdat) @@ -168,7 +176,7 @@ static int opFUCOMPP(uint32_t fetchdat) else if (ST(0) < ST(1)) npxs |= C0; x87_pop(); x87_pop(); - cycles -= 5; + CLOCK_CYCLES(5); return 0; } @@ -178,7 +186,7 @@ static int opFDIV(uint32_t fetchdat) pc++; if (fplog) pclog("FDIV\n"); x87_div(ST(0), ST(0), ST(fetchdat & 7)); - cycles -= 73; + CLOCK_CYCLES(73); return 0; } static int opFDIVr(uint32_t fetchdat) @@ -187,7 +195,7 @@ static int opFDIVr(uint32_t fetchdat) pc++; if (fplog) pclog("FDIV\n"); x87_div(ST(fetchdat & 7), ST(fetchdat & 7), ST(0)); - cycles -= 73; + CLOCK_CYCLES(73); return 0; } static int opFDIVP(uint32_t fetchdat) @@ -197,7 +205,7 @@ static int opFDIVP(uint32_t fetchdat) if (fplog) pclog("FDIVP\n"); x87_div(ST(fetchdat & 7), ST(fetchdat & 7), ST(0)); x87_pop(); - cycles -= 73; + CLOCK_CYCLES(73); return 0; } @@ -207,7 +215,7 @@ static int opFDIVR(uint32_t fetchdat) pc++; if (fplog) pclog("FDIVR\n"); x87_div(ST(0), ST(fetchdat&7), ST(0)); - cycles -= 73; + CLOCK_CYCLES(73); return 0; } static int opFDIVRr(uint32_t fetchdat) @@ -216,7 +224,7 @@ static int opFDIVRr(uint32_t fetchdat) pc++; if (fplog) pclog("FDIVR\n"); x87_div(ST(fetchdat & 7), ST(0), ST(fetchdat & 7)); - cycles -= 73; + CLOCK_CYCLES(73); return 0; } static int opFDIVRP(uint32_t fetchdat) @@ -226,7 +234,7 @@ static int opFDIVRP(uint32_t fetchdat) if (fplog) pclog("FDIVR\n"); x87_div(ST(fetchdat & 7), ST(0), ST(fetchdat & 7)); x87_pop(); - cycles -= 73; + CLOCK_CYCLES(73); return 0; } @@ -236,7 +244,7 @@ static int opFMUL(uint32_t fetchdat) pc++; if (fplog) pclog("FMUL\n"); ST(0) = ST(0) * ST(fetchdat & 7); - cycles -= 16; + CLOCK_CYCLES(16); return 0; } static int opFMULr(uint32_t fetchdat) @@ -245,7 +253,7 @@ static int opFMULr(uint32_t fetchdat) pc++; if (fplog) pclog("FMUL\n"); ST(fetchdat & 7) = ST(0) * ST(fetchdat & 7); - cycles -= 16; + CLOCK_CYCLES(16); return 0; } static int opFMULP(uint32_t fetchdat) @@ -255,7 +263,7 @@ static int opFMULP(uint32_t fetchdat) if (fplog) pclog("FMULP\n"); ST(fetchdat & 7) = ST(0) * ST(fetchdat & 7); x87_pop(); - cycles -= 16; + CLOCK_CYCLES(16); return 0; } @@ -265,7 +273,7 @@ static int opFSUB(uint32_t fetchdat) pc++; if (fplog) pclog("FSUB\n"); ST(0) = ST(0) - ST(fetchdat & 7); - cycles -= 8; + CLOCK_CYCLES(8); return 0; } static int opFSUBr(uint32_t fetchdat) @@ -274,7 +282,7 @@ static int opFSUBr(uint32_t fetchdat) pc++; if (fplog) pclog("FSUB\n"); ST(fetchdat & 7) = ST(fetchdat & 7) - ST(0); - cycles -= 8; + CLOCK_CYCLES(8); return 0; } static int opFSUBP(uint32_t fetchdat) @@ -284,7 +292,7 @@ static int opFSUBP(uint32_t fetchdat) if (fplog) pclog("FSUBP\n"); ST(fetchdat & 7) = ST(fetchdat & 7) - ST(0); x87_pop(); - cycles -= 8; + CLOCK_CYCLES(8); return 0; } @@ -294,7 +302,7 @@ static int opFSUBR(uint32_t fetchdat) pc++; if (fplog) pclog("FSUBR\n"); ST(0) = ST(fetchdat & 7) - ST(0); - cycles -= 8; + CLOCK_CYCLES(8); return 0; } static int opFSUBRr(uint32_t fetchdat) @@ -303,7 +311,7 @@ static int opFSUBRr(uint32_t fetchdat) pc++; if (fplog) pclog("FSUBR\n"); ST(fetchdat & 7) = ST(0) - ST(fetchdat & 7); - cycles -= 8; + CLOCK_CYCLES(8); return 0; } static int opFSUBRP(uint32_t fetchdat) @@ -313,7 +321,7 @@ static int opFSUBRP(uint32_t fetchdat) if (fplog) pclog("FSUBRP\n"); ST(fetchdat & 7) = ST(0) - ST(fetchdat & 7); x87_pop(); - cycles -= 8; + CLOCK_CYCLES(8); return 0; } @@ -325,7 +333,7 @@ static int opFUCOM(uint32_t fetchdat) npxs &= ~(C0|C2|C3); if (ST(0) == ST(fetchdat&7)) npxs |= C3; else if (ST(0) < ST(fetchdat&7)) npxs |= C0; - cycles -= 4; + CLOCK_CYCLES(4); return 0; } @@ -338,6 +346,6 @@ static int opFUCOMP(uint32_t fetchdat) if (ST(0) == ST(fetchdat&7)) npxs |= C3; else if (ST(0) < ST(fetchdat&7)) npxs |= C0; x87_pop(); - cycles -= 4; + CLOCK_CYCLES(4); return 0; } diff --git a/src/x87_ops_loadstore.h b/src/x87_ops_loadstore.h index 9ac5f4f..b479837 100644 --- a/src/x87_ops_loadstore.h +++ b/src/x87_ops_loadstore.h @@ -7,7 +7,7 @@ static int opFILDiw_a16(uint32_t fetchdat) temp = geteaw(); if (abrt) return 1; if (fplog) pclog(" %f\n", (double)temp); x87_push((double)temp); - cycles -= 13; + CLOCK_CYCLES(13); return 0; } static int opFILDiw_a32(uint32_t fetchdat) @@ -19,7 +19,7 @@ static int opFILDiw_a32(uint32_t fetchdat) temp = geteaw(); if (abrt) return 1; if (fplog) pclog(" %f\n", (double)temp); x87_push((double)temp); - cycles -= 13; + CLOCK_CYCLES(13); return 0; } @@ -33,7 +33,7 @@ static int opFISTiw_a16(uint32_t fetchdat) /* if (temp64 > 32767 || temp64 < -32768) fatal("FISTw overflow %i\n", temp64);*/ seteaw((int16_t)temp64); - cycles -= 29; + CLOCK_CYCLES(29); return abrt; } static int opFISTiw_a32(uint32_t fetchdat) @@ -46,7 +46,7 @@ static int opFISTiw_a32(uint32_t fetchdat) /* if (temp64 > 32767 || temp64 < -32768) fatal("FISTw overflow %i\n", temp64);*/ seteaw((int16_t)temp64); - cycles -= 29; + CLOCK_CYCLES(29); return abrt; } @@ -61,7 +61,7 @@ static int opFISTPiw_a16(uint32_t fetchdat) fatal("FISTw overflow %i\n", temp64);*/ seteaw((int16_t)temp64); if (abrt) return 1; x87_pop(); - cycles -= 29; + CLOCK_CYCLES(29); return 0; } static int opFISTPiw_a32(uint32_t fetchdat) @@ -75,7 +75,7 @@ static int opFISTPiw_a32(uint32_t fetchdat) fatal("FISTw overflow %i\n", temp64);*/ seteaw((int16_t)temp64); if (abrt) return 1; x87_pop(); - cycles -= 29; + CLOCK_CYCLES(29); return 0; } @@ -88,7 +88,7 @@ static int opFILDiq_a16(uint32_t fetchdat) temp64 = geteaq(); if (abrt) return 1; if (fplog) pclog(" %f %08X %08X\n", (double)temp64, readmeml(easeg,eaaddr), readmeml(easeg,eaaddr+4)); x87_push((double)temp64); - cycles -= 10; + CLOCK_CYCLES(10); return 0; } static int opFILDiq_a32(uint32_t fetchdat) @@ -100,7 +100,7 @@ static int opFILDiq_a32(uint32_t fetchdat) temp64 = geteaq(); if (abrt) return 1; if (fplog) pclog(" %f %08X %08X\n", (double)temp64, readmeml(easeg,eaaddr), readmeml(easeg,eaaddr+4)); x87_push((double)temp64); - cycles -= 10; + CLOCK_CYCLES(10); return 0; } @@ -166,8 +166,8 @@ static int FISTPiq_a16(uint32_t fetchdat) temp64 = x87_fround(ST(0)); seteaq(temp64); if (abrt) return 1; x87_pop(); - cycles -= 29; - return 1; + CLOCK_CYCLES(29); + return 0; } static int FISTPiq_a32(uint32_t fetchdat) { @@ -178,8 +178,8 @@ static int FISTPiq_a32(uint32_t fetchdat) temp64 = x87_fround(ST(0)); seteaq(temp64); if (abrt) return 1; x87_pop(); - cycles -= 29; - return 1; + CLOCK_CYCLES(29); + return 0; } static int opFILDil_a16(uint32_t fetchdat) @@ -191,7 +191,7 @@ static int opFILDil_a16(uint32_t fetchdat) templ = geteal(); if (abrt) return 1; if (fplog) pclog(" %f %08X %i\n", (double)templ, templ, templ); x87_push((double)templ); - cycles -= 9; + CLOCK_CYCLES(9); return 0; } static int opFILDil_a32(uint32_t fetchdat) @@ -203,7 +203,7 @@ static int opFILDil_a32(uint32_t fetchdat) templ = geteal(); if (abrt) return 1; if (fplog) pclog(" %f %08X %i\n", (double)templ, templ, templ); x87_push((double)templ); - cycles -= 9; + CLOCK_CYCLES(9); return 0; } @@ -217,7 +217,7 @@ static int opFISTil_a16(uint32_t fetchdat) /* if (temp64 > 2147483647 || temp64 < -2147483647) fatal("FISTl out of range! %i\n", temp64);*/ seteal((int32_t)temp64); - cycles -= 28; + CLOCK_CYCLES(28); return abrt; } static int opFISTil_a32(uint32_t fetchdat) @@ -230,7 +230,7 @@ static int opFISTil_a32(uint32_t fetchdat) /* if (temp64 > 2147483647 || temp64 < -2147483647) fatal("FISTl out of range! %i\n", temp64);*/ seteal((int32_t)temp64); - cycles -= 28; + CLOCK_CYCLES(28); return abrt; } @@ -245,7 +245,7 @@ static int opFISTPil_a16(uint32_t fetchdat) fatal("FISTl out of range! %i\n", temp64);*/ seteal((int32_t)temp64); if (abrt) return 1; x87_pop(); - cycles -= 28; + CLOCK_CYCLES(28); return 0; } static int opFISTPil_a32(uint32_t fetchdat) @@ -259,7 +259,7 @@ static int opFISTPil_a32(uint32_t fetchdat) fatal("FISTl out of range! %i\n", temp64);*/ seteal((int32_t)temp64); if (abrt) return 1; x87_pop(); - cycles -= 28; + CLOCK_CYCLES(28); return 0; } @@ -272,7 +272,7 @@ static int opFLDe_a16(uint32_t fetchdat) t=x87_ld80(); if (abrt) return 1; if (fplog) pclog(" %f\n", t); x87_push(t); - cycles -= 6; + CLOCK_CYCLES(6); return 0; } static int opFLDe_a32(uint32_t fetchdat) @@ -284,7 +284,7 @@ static int opFLDe_a32(uint32_t fetchdat) t=x87_ld80(); if (abrt) return 1; if (fplog) pclog(" %f\n", t); x87_push(t); - cycles -= 6; + CLOCK_CYCLES(6); return 0; } @@ -295,7 +295,7 @@ static int opFSTPe_a16(uint32_t fetchdat) if (fplog) pclog("FSTPe %08X:%08X\n", easeg, eaaddr); x87_st80(ST(0)); if (abrt) return 1; x87_pop(); - cycles -= 6; + CLOCK_CYCLES(6); return 0; } static int opFSTPe_a32(uint32_t fetchdat) @@ -305,7 +305,7 @@ static int opFSTPe_a32(uint32_t fetchdat) if (fplog) pclog("FSTPe %08X:%08X\n", easeg, eaaddr); x87_st80(ST(0)); if (abrt) return 1; x87_pop(); - cycles -= 6; + CLOCK_CYCLES(6); return 0; } @@ -318,7 +318,7 @@ static int opFLDd_a16(uint32_t fetchdat) t.i = geteaq(); if (abrt) return 1; if (fplog) pclog(" %f\n", t.d); x87_push(t.d); - cycles -= 3; + CLOCK_CYCLES(3); return 0; } static int opFLDd_a32(uint32_t fetchdat) @@ -330,7 +330,7 @@ static int opFLDd_a32(uint32_t fetchdat) t.i = geteaq(); if (abrt) return 1; if (fplog) pclog(" %f\n", t.d); x87_push(t.d); - cycles -= 3; + CLOCK_CYCLES(3); return 0; } @@ -342,7 +342,7 @@ static int opFSTd_a16(uint32_t fetchdat) if (fplog) pclog("FSTd %08X:%08X\n", easeg, eaaddr); t.d = ST(0); seteaq(t.i); - cycles -= 8; + CLOCK_CYCLES(8); return abrt; } static int opFSTd_a32(uint32_t fetchdat) @@ -353,7 +353,7 @@ static int opFSTd_a32(uint32_t fetchdat) if (fplog) pclog("FSTd %08X:%08X\n", easeg, eaaddr); t.d = ST(0); seteaq(t.i); - cycles -= 8; + CLOCK_CYCLES(8); return abrt; } @@ -366,7 +366,7 @@ static int opFSTPd_a16(uint32_t fetchdat) t.d = ST(0); seteaq(t.i); if (abrt) return 1; x87_pop(); - cycles -= 8; + CLOCK_CYCLES(8); return 0; } static int opFSTPd_a32(uint32_t fetchdat) @@ -378,7 +378,7 @@ static int opFSTPd_a32(uint32_t fetchdat) t.d = ST(0); seteaq(t.i); if (abrt) return 1; x87_pop(); - cycles -= 8; + CLOCK_CYCLES(8); return 0; } @@ -391,7 +391,7 @@ static int opFLDs_a16(uint32_t fetchdat) ts.i = geteal(); if (abrt) return 1; if (fplog) pclog(" %f\n", ts.s); x87_push((double)ts.s); - cycles -= 3; + CLOCK_CYCLES(3); return 0; } static int opFLDs_a32(uint32_t fetchdat) @@ -403,7 +403,7 @@ static int opFLDs_a32(uint32_t fetchdat) ts.i = geteal(); if (abrt) return 1; if (fplog) pclog(" %f\n", ts.s); x87_push((double)ts.s); - cycles -= 3; + CLOCK_CYCLES(3); return 0; } @@ -415,7 +415,7 @@ static int opFSTs_a16(uint32_t fetchdat) if (fplog) pclog("FSTs %08X:%08X\n", easeg, eaaddr); ts.s = (float)ST(0); seteal(ts.i); - cycles -= 7; + CLOCK_CYCLES(7); return abrt; } static int opFSTs_a32(uint32_t fetchdat) @@ -426,7 +426,7 @@ static int opFSTs_a32(uint32_t fetchdat) if (fplog) pclog("FSTs %08X:%08X\n", easeg, eaaddr); ts.s = (float)ST(0); seteal(ts.i); - cycles -= 7; + CLOCK_CYCLES(7); return abrt; } @@ -439,7 +439,7 @@ static int opFSTPs_a16(uint32_t fetchdat) ts.s = (float)ST(0); seteal(ts.i); if (abrt) return 1; x87_pop(); - cycles -= 7; + CLOCK_CYCLES(7); return 0; } static int opFSTPs_a32(uint32_t fetchdat) @@ -451,6 +451,6 @@ static int opFSTPs_a32(uint32_t fetchdat) ts.s = (float)ST(0); seteal(ts.i); if (abrt) return 1; x87_pop(); - cycles -= 7; + CLOCK_CYCLES(7); return 0; } diff --git a/src/x87_ops_misc.h b/src/x87_ops_misc.h index ec6d945..388334f 100644 --- a/src/x87_ops_misc.h +++ b/src/x87_ops_misc.h @@ -4,7 +4,7 @@ static int opFSTSW_AX(uint32_t fetchdat) pc++; if (fplog) pclog("FSTSW\n"); AX = npxs; - cycles -= 3; + CLOCK_CYCLES(3); return 0; } @@ -14,7 +14,7 @@ static int opFNOP(uint32_t fetchdat) { FP_ENTER(); pc++; - cycles -= 4; + CLOCK_CYCLES(4); return 0; } @@ -23,7 +23,7 @@ static int opFCLEX(uint32_t fetchdat) FP_ENTER(); pc++; npxs &= 0xff00; - cycles -= 4; + CLOCK_CYCLES(4); return 0; } @@ -35,7 +35,7 @@ static int opFINIT(uint32_t fetchdat) npxs = 0; tag = 0xFFFF; TOP = 0; - cycles -= 17; + CLOCK_CYCLES(17); return 0; } @@ -46,7 +46,7 @@ static int opFFREE(uint32_t fetchdat) pc++; if (fplog) pclog("FFREE\n"); tag |= (3 << (((TOP + fetchdat) & 7) << 1)); - cycles -= 3; + CLOCK_CYCLES(3); return 0; } @@ -60,7 +60,7 @@ static int opFST(uint32_t fetchdat) temp = (tag >> ((TOP & 7) << 1)) & 3; tag &= ~(3 << (((TOP + fetchdat) & 7) << 1)); tag |= (temp << (((TOP + fetchdat) & 7) << 1)); - cycles -= 3; + CLOCK_CYCLES(3); return 0; } @@ -75,14 +75,14 @@ static int opFSTP(uint32_t fetchdat) tag &= ~(3 << (((TOP + fetchdat) & 7) << 1)); tag |= (temp << (((TOP + fetchdat) & 7) << 1)); x87_pop(); - cycles -= 3; + CLOCK_CYCLES(3); return 0; } -static void FSTOR() +static int FSTOR() { switch ((cr0 & 1) | (op32 & 0x100)) { @@ -119,8 +119,9 @@ static void FSTOR() !TOP && !tag) ismmx = 1; - cycles -= (cr0 & 1) ? 34 : 44; + CLOCK_CYCLES((cr0 & 1) ? 34 : 44); if (fplog) pclog("FRSTOR %08X:%08X %i %i %04X\n", easeg, eaaddr, ismmx, TOP, tag); + return abrt; } static int opFSTOR_a16(uint32_t fetchdat) { @@ -137,7 +138,7 @@ static int opFSTOR_a32(uint32_t fetchdat) return abrt; } -static void FSAVE() +static int FSAVE() { if (fplog) pclog("FSAVE %08X:%08X %i\n", easeg, eaaddr, ismmx); npxs = (npxs & ~(7 << 11)) | (TOP << 11); @@ -270,7 +271,8 @@ static void FSAVE() } break; } - cycles-=(cr0&1)?56:67; + CLOCK_CYCLES((cr0 & 1) ? 56 : 67); + return abrt; } static int opFSAVE_a16(uint32_t fetchdat) { @@ -293,7 +295,7 @@ static int opFSTSW_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); if (fplog) pclog("FSTSW %08X:%08X\n", easeg, eaaddr); seteaw((npxs & 0xC7FF) | (TOP << 11)); - cycles -= 3; + CLOCK_CYCLES(3); return abrt; } static int opFSTSW_a32(uint32_t fetchdat) @@ -302,7 +304,7 @@ static int opFSTSW_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); if (fplog) pclog("FSTSW %08X:%08X\n", easeg, eaaddr); seteaw((npxs & 0xC7FF) | (TOP << 11)); - cycles -= 3; + CLOCK_CYCLES(3); return abrt; } @@ -313,7 +315,7 @@ static int opFLD(uint32_t fetchdat) pc++; if (fplog) pclog("FLD %f\n", ST(fetchdat & 7)); x87_push(ST(fetchdat&7)); - cycles -= 4; + CLOCK_CYCLES(4); return 0; } @@ -326,7 +328,7 @@ static int opFXCH(uint32_t fetchdat) td = ST(0); ST(0) = ST(fetchdat&7); ST(fetchdat&7) = td; - cycles -= 4; + CLOCK_CYCLES(4); return 0; } @@ -336,7 +338,7 @@ static int opFCHS(uint32_t fetchdat) pc++; if (fplog) pclog("FCHS\n"); ST(0) = -ST(0); - cycles -= 6; + CLOCK_CYCLES(6); return 0; } @@ -346,7 +348,7 @@ static int opFABS(uint32_t fetchdat) pc++; if (fplog) pclog("FABS %f\n", ST(0)); ST(0) = fabs(ST(0)); - cycles -= 3; + CLOCK_CYCLES(3); return 0; } @@ -358,7 +360,7 @@ static int opFTST(uint32_t fetchdat) npxs &= ~(C0|C2|C3); if (ST(0) == 0.0) npxs |= C3; else if (ST(0) < 0.0) npxs |= C0; - cycles -= 4; + CLOCK_CYCLES(4); return 0; } @@ -372,7 +374,7 @@ static int opFXAM(uint32_t fetchdat) else if (ST(0) == 0.0) npxs |= C3; else npxs |= C2; if (ST(0) < 0.0) npxs |= C1; - cycles -= 8; + CLOCK_CYCLES(8); return 0; } @@ -382,7 +384,7 @@ static int opFLD1(uint32_t fetchdat) pc++; if (fplog) pclog("FLD1\n"); x87_push(1.0); - cycles -= 4; + CLOCK_CYCLES(4); return 0; } @@ -392,7 +394,7 @@ static int opFLDL2T(uint32_t fetchdat) pc++; if (fplog) pclog("FLDL2T\n"); x87_push(3.3219280948873623); - cycles -= 8; + CLOCK_CYCLES(8); return 0; } @@ -402,7 +404,7 @@ static int opFLDL2E(uint32_t fetchdat) pc++; if (fplog) pclog("FLDL2E\n"); x87_push(1.4426950408889634); - cycles -= 8; + CLOCK_CYCLES(8); return 0; } @@ -412,7 +414,7 @@ static int opFLDPI(uint32_t fetchdat) pc++; if (fplog) pclog("FLDPI\n"); x87_push(3.141592653589793); - cycles -= 8; + CLOCK_CYCLES(8); return 0; } @@ -422,7 +424,7 @@ static int opFLDEG2(uint32_t fetchdat) pc++; if (fplog) pclog("FLDEG2\n"); x87_push(0.3010299956639812); - cycles -= 8; + CLOCK_CYCLES(8); return 0; } @@ -432,7 +434,7 @@ static int opFLDLN2(uint32_t fetchdat) pc++; if (fplog) pclog("FLDLN2\n"); x87_push(0.693147180559945); - cycles -= 8; + CLOCK_CYCLES(8); return 0; } @@ -443,7 +445,7 @@ static int opFLDZ(uint32_t fetchdat) if (fplog) pclog("FLDZ\n"); x87_push(0.0); tag |= (1<<((TOP&7)<<1)); - cycles -= 4; + CLOCK_CYCLES(4); return 0; } @@ -453,7 +455,7 @@ static int opF2XM1(uint32_t fetchdat) pc++; if (fplog) pclog("F2XM1\n"); ST(0) = pow(2.0, ST(0)) - 1.0; - cycles -= 200; + CLOCK_CYCLES(200); return 0; } @@ -464,7 +466,7 @@ static int opFYL2X(uint32_t fetchdat) if (fplog) pclog("FYL2X\n"); ST(1) = ST(1) * (log(ST(0)) / log(2.0)); x87_pop(); - cycles -= 250; + CLOCK_CYCLES(250); return 0; } @@ -476,7 +478,7 @@ static int opFPTAN(uint32_t fetchdat) ST(0) = tan(ST(0)); x87_push(1.0); npxs &= ~C2; - cycles -= 235; + CLOCK_CYCLES(235); return 0; } @@ -487,7 +489,7 @@ static int opFPATAN(uint32_t fetchdat) if (fplog) pclog("FPATAN\n"); ST(1) = atan2(ST(1), ST(0)); x87_pop(); - cycles -= 250; + CLOCK_CYCLES(250); return 0; } @@ -497,7 +499,7 @@ static int opFDECSTP(uint32_t fetchdat) pc++; if (fplog) pclog("FDECSTP\n"); TOP = (TOP - 1) & 7; - cycles -= 4; + CLOCK_CYCLES(4); return 0; } @@ -507,7 +509,7 @@ static int opFINCSTP(uint32_t fetchdat) pc++; if (fplog) pclog("FDECSTP\n"); TOP = (TOP + 1) & 7; - cycles -= 4; + CLOCK_CYCLES(4); return 0; } @@ -524,7 +526,7 @@ static int opFPREM(uint32_t fetchdat) if (temp64 & 4) npxs|=C0; if (temp64 & 2) npxs|=C3; if (temp64 & 1) npxs|=C1; - cycles -= 100; + CLOCK_CYCLES(100); return 0; } @@ -534,7 +536,7 @@ static int opFSQRT(uint32_t fetchdat) pc++; if (fplog) pclog("FSQRT\n"); ST(0) = sqrt(ST(0)); - cycles -= 83; + CLOCK_CYCLES(83); return 0; } @@ -548,7 +550,7 @@ static int opFSINCOS(uint32_t fetchdat) ST(0) = sin(td); x87_push(cos(td)); npxs &= ~C2; - cycles -= 330; + CLOCK_CYCLES(330); return 0; } @@ -559,7 +561,7 @@ static int opFRNDINT(uint32_t fetchdat) if (fplog) pclog("FRNDINT %g ", ST(0)); ST(0) = (double)x87_fround(ST(0)); if (fplog) pclog("%g\n", ST(0)); - cycles -= 21; + CLOCK_CYCLES(21); return 0; } @@ -571,7 +573,7 @@ static int opFSCALE(uint32_t fetchdat) if (fplog) pclog("FSCALE\n"); temp64 = (int64_t)ST(1); ST(0) = ST(0) * pow(2.0, (double)temp64); - cycles -= 30; + CLOCK_CYCLES(30); return 0; } @@ -582,7 +584,7 @@ static int opFSIN(uint32_t fetchdat) if (fplog) pclog("FSIN\n"); ST(0) = sin(ST(0)); npxs &= ~C2; - cycles -= 300; + CLOCK_CYCLES(300); return 0; } @@ -593,12 +595,12 @@ static int opFCOS(uint32_t fetchdat) if (fplog) pclog("FCOS\n"); ST(0) = cos(ST(0)); npxs &= ~C2; - cycles -= 300; + CLOCK_CYCLES(300); return 0; } -static void FLDENV() +static int FLDENV() { if (fplog) pclog("FLDENV %08X:%08X\n", easeg, eaaddr); switch ((cr0 & 1) | (op32 & 0x100)) @@ -618,7 +620,8 @@ static void FLDENV() TOP = (npxs >> 11) & 7; break; } - cycles -= (cr0 & 1) ? 34 : 44; + CLOCK_CYCLES((cr0 & 1) ? 34 : 44); + return abrt; } static int opFLDENV_a16(uint32_t fetchdat) @@ -645,7 +648,7 @@ static int opFLDCW_a16(uint32_t fetchdat) tempw = geteaw(); if (abrt) return 1; npxc = tempw; - cycles -= 4; + CLOCK_CYCLES(4); return 0; } static int opFLDCW_a32(uint32_t fetchdat) @@ -657,11 +660,11 @@ static int opFLDCW_a32(uint32_t fetchdat) tempw = geteaw(); if (abrt) return 1; npxc = tempw; - cycles -= 4; + CLOCK_CYCLES(4); return 0; } -static void FSTENV() +static int FSTENV() { if (fplog) pclog("FSTENV %08X:%08X\n", easeg, eaaddr); switch ((cr0 & 1) | (op32 & 0x100)) @@ -700,7 +703,8 @@ static void FSTENV() writememl(easeg,eaaddr+24,x87_op_seg); break; } - cycles -= (cr0 & 1) ? 56 : 67; + CLOCK_CYCLES((cr0 & 1) ? 56 : 67); + return abrt; } static int opFSTENV_a16(uint32_t fetchdat) @@ -724,7 +728,7 @@ static int opFSTCW_a16(uint32_t fetchdat) fetch_ea_16(fetchdat); if (fplog) pclog("FSTCW %08X:%08X\n", easeg, eaaddr); seteaw(npxc); - cycles -= 3; + CLOCK_CYCLES(3); return abrt; } static int opFSTCW_a32(uint32_t fetchdat) @@ -733,6 +737,6 @@ static int opFSTCW_a32(uint32_t fetchdat) fetch_ea_32(fetchdat); if (fplog) pclog("FSTCW %08X:%08X\n", easeg, eaaddr); seteaw(npxc); - cycles -= 3; + CLOCK_CYCLES(3); return abrt; }