Improvements to flash ROM emulation on Premiere/PCI, Advanced/EV and Award 430VX PCI modules. Patch from Battler.
This commit is contained in:
parent
dd2a608707
commit
273ef3847a
5 changed files with 238 additions and 84 deletions
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@ -3,6 +3,14 @@
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#include "device.h"
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#include "device.h"
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#include "mem.h"
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#include "mem.h"
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#define FLASH_IS_BXB 2
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#define FLASH_INVERT 1
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#define BLOCK_MAIN 0
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#define BLOCK_DATA1 1
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#define BLOCK_DATA2 2
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#define BLOCK_BOOT 3
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enum
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enum
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{
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{
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CMD_READ_ARRAY = 0xff,
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CMD_READ_ARRAY = 0xff,
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@ -18,55 +26,93 @@ enum
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typedef struct flash_t
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typedef struct flash_t
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{
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{
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uint8_t command, status;
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uint8_t command, status;
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mem_mapping_t read_mapping, write_mapping;
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uint8_t flash_id;
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int invert_high_pin;
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mem_mapping_t mapping[8], mapping_h[8];
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uint32_t block_start[4], block_end[4], block_len[4];
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uint8_t array[131072];
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} flash_t;
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} flash_t;
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static flash_t flash;
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static char flash_path[1024];
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static uint8_t flash_read(uint32_t addr, void *p)
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static uint8_t flash_read(uint32_t addr, void *p)
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{
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{
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flash_t *flash = (flash_t *)p;
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flash_t *flash = (flash_t *)p;
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// pclog("flash_read : addr=%08x command=%02x %04x:%08x\n", addr, flash->command, CS, pc);
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if (flash->invert_high_pin)
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{
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// pclog("flash_read : addr=%08x/%08x val=%02x command=%02x %04x:%08x\n", addr, addr ^ 0x10000, flash->array[(addr ^ 0x10000) & 0x1ffff], flash->command, CS, cpu_state.pc);
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addr ^= 0x10000;
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if (addr & 0xfff00000) return flash->array[addr & 0x1ffff];
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}
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// pclog("flash_read : addr=%08x command=%02x %04x:%08x\n", addr, flash->command, CS, cpu_state.pc);
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addr &= 0x1ffff;
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switch (flash->command)
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switch (flash->command)
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{
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{
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case CMD_READ_ARRAY:
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default:
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return flash->array[addr];
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case CMD_IID:
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case CMD_IID:
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if (addr & 1)
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if (addr & 1)
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return 0x94;
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return flash->flash_id;
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return 0x89;
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return 0x89;
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default:
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case CMD_READ_STATUS:
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return flash->status;
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return flash->status;
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}
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}
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}
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}
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static uint16_t flash_readw(uint32_t addr, void *p)
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{
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flash_t *flash = (flash_t *)p;
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addr &= 0x1ffff;
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if (flash->invert_high_pin) addr ^= 0x10000;
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return *(uint16_t *)&(flash->array[addr]);
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}
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static uint32_t flash_readl(uint32_t addr, void *p)
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{
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flash_t *flash = (flash_t *)p;
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addr &= 0x1ffff;
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if (flash->invert_high_pin) addr ^= 0x10000;
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return *(uint32_t *)&(flash->array[addr]);
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}
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static void flash_write(uint32_t addr, uint8_t val, void *p)
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static void flash_write(uint32_t addr, uint8_t val, void *p)
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{
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{
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flash_t *flash = (flash_t *)p;
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flash_t *flash = (flash_t *)p;
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// pclog("flash_write : addr=%08x val=%02x command=%02x %04x:%08x\n", addr, val, flash->command, CS, pc);
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int i;
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// pclog("flash_write : addr=%08x val=%02x command=%02x %04x:%08x\n", addr, val, flash->command, CS, cpu_state.pc);
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if (flash->invert_high_pin)
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{
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addr ^= 0x10000;
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if (addr & 0xfff00000) return;
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}
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addr &= 0x1ffff;
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switch (flash->command)
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switch (flash->command)
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{
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{
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case CMD_ERASE_SETUP:
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case CMD_ERASE_SETUP:
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if (val == CMD_ERASE_CONFIRM)
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if (val == CMD_ERASE_CONFIRM)
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{
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{
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// pclog("flash_write: erase %05x\n", addr & 0x1ffff);
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// pclog("flash_write: erase %05x\n", addr);
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if ((addr & 0x1f000) == 0x0d000)
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memset(&rom[0x0d000], 0xff, 0x1000);
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for (i = 0; i < 3; i++)
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if ((addr & 0x1f000) == 0x0c000)
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{
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memset(&rom[0x0c000], 0xff, 0x1000);
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if ((addr >= flash->block_start[i]) && (addr <= flash->block_end[i]))
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if ((addr & 0x1f000) < 0x0c000 || (addr & 0x1f000) >= 0x10000)
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memset(&(flash->array[flash->block_start[i]]), 0xff, flash->block_len[i]);
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{
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}
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memset(rom, 0xff, 0xc000);
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memset(&rom[0x10000], 0xff, 0x10000);
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}
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flash->status = 0x80;
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flash->status = 0x80;
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}
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}
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flash->command = CMD_READ_STATUS;
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flash->command = CMD_READ_STATUS;
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break;
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break;
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case CMD_PROGRAM_SETUP:
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case CMD_PROGRAM_SETUP:
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// pclog("flash_write: program %05x %02x\n", addr & 0x1ffff, val);
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// pclog("flash_write: program %05x %02x\n", addr, val);
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if ((addr & 0x1e000) != 0x0e000)
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if ((addr & 0x1e000) != (flash->block_start[3] & 0x1e000))
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rom[addr & 0x1ffff] = val;
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flash->array[addr] = val;
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flash->command = CMD_READ_STATUS;
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flash->command = CMD_READ_STATUS;
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flash->status = 0x80;
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flash->status = 0x80;
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break;
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break;
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@ -78,95 +124,198 @@ static void flash_write(uint32_t addr, uint8_t val, void *p)
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case CMD_CLEAR_STATUS:
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case CMD_CLEAR_STATUS:
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flash->status = 0;
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flash->status = 0;
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break;
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break;
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case CMD_IID:
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case CMD_READ_STATUS:
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mem_mapping_disable(&bios_mapping[0]);
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mem_mapping_disable(&bios_mapping[1]);
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mem_mapping_disable(&bios_mapping[2]);
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mem_mapping_disable(&bios_mapping[3]);
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mem_mapping_disable(&bios_mapping[4]);
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mem_mapping_disable(&bios_mapping[5]);
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mem_mapping_disable(&bios_mapping[6]);
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mem_mapping_disable(&bios_mapping[7]);
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mem_mapping_enable(&flash->read_mapping);
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break;
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case CMD_READ_ARRAY:
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mem_mapping_enable(&bios_mapping[0]);
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mem_mapping_enable(&bios_mapping[1]);
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mem_mapping_enable(&bios_mapping[2]);
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mem_mapping_enable(&bios_mapping[3]);
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mem_mapping_enable(&bios_mapping[4]);
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mem_mapping_enable(&bios_mapping[5]);
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mem_mapping_enable(&bios_mapping[6]);
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mem_mapping_enable(&bios_mapping[7]);
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mem_mapping_disable(&flash->read_mapping);
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break;
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}
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}
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}
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}
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}
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}
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void *intel_flash_init()
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static void intel_flash_add_mappings(flash_t *flash)
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{
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int i = 0;
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for (i = 0; i <= 7; i++)
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{
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mem_mapping_add(&(flash->mapping[i]), 0xe0000 + (i << 14), 0x04000, flash_read, flash_readw, flash_readl, flash_write, mem_write_nullw, mem_write_nulll, flash->array + ((i << 14) & 0x1ffff), MEM_MAPPING_EXTERNAL, (void *)flash);
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mem_mapping_add(&(flash->mapping_h[i]), 0xfffe0000 + (i << 14), 0x04000, flash_read, flash_readw, flash_readl, flash_write, mem_write_nullw, mem_write_nulll, flash->array + ((i << 14) & 0x1ffff), 0, (void *)flash);
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}
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}
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/* This is for boards which invert the high pin - the flash->array pointers need to pointer invertedly in order for INTERNAL writes to go to the right part of the array. */
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static void intel_flash_add_mappings_inverted(flash_t *flash)
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{
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int i = 0;
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for (i = 0; i <= 7; i++)
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{
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mem_mapping_add(&(flash->mapping[i]), 0xe0000 + (i << 14), 0x04000, flash_read, flash_readw, flash_readl, flash_write, mem_write_nullw, mem_write_nulll, flash->array + (((i << 14) ^ 0x10000) & 0x1ffff), MEM_MAPPING_EXTERNAL, (void *)flash);
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mem_mapping_add(&(flash->mapping_h[i]), 0xfffe0000 + (i << 14), 0x04000, flash_read, flash_readw, flash_readl, flash_write, mem_write_nullw, mem_write_nulll, flash->array + (((i << 14) ^ 0x10000) & 0x1ffff), 0, (void *)flash);
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}
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}
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void *intel_flash_init(uint8_t type)
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{
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{
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FILE *f;
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FILE *f;
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flash_t *flash = malloc(sizeof(flash_t));
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flash_t *flash = malloc(sizeof(flash_t));
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memset(flash, 0, sizeof(flash_t));
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memset(flash, 0, sizeof(flash_t));
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char fpath[1024];
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int i;
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switch(romset)
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{
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case ROM_REVENGE:
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strcpy(flash_path, "roms/revenge/");
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break;
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case ROM_ENDEAVOR:
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strcpy(flash_path, "roms/endeavor/");
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break;
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case ROM_430VX:
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strcpy(flash_path, "roms/430vx/");
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break;
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default:
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fatal("intel_flash_init on unsupported ROM set %i\n", romset);
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}
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// pclog("Flash init: Path is: %s\n", flash_path);
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flash->flash_id = (type & FLASH_IS_BXB) ? 0x95 : 0x94;
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flash->invert_high_pin = (type & FLASH_INVERT);
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/* The block lengths are the same both flash types. */
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flash->block_len[BLOCK_MAIN] = 0x1c000;
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flash->block_len[BLOCK_DATA1] = 0x01000;
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flash->block_len[BLOCK_DATA2] = 0x01000;
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flash->block_len[BLOCK_BOOT] = 0x02000;
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if (type & FLASH_IS_BXB) /* 28F001BX-B */
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{
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flash->block_start[BLOCK_MAIN] = 0x04000; /* MAIN BLOCK */
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flash->block_end[BLOCK_MAIN] = 0x1ffff;
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flash->block_start[BLOCK_DATA1] = 0x03000; /* DATA AREA 1 BLOCK */
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flash->block_end[BLOCK_DATA1] = 0x03fff;
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flash->block_start[BLOCK_DATA2] = 0x04000; /* DATA AREA 2 BLOCK */
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flash->block_end[BLOCK_DATA2] = 0x04fff;
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flash->block_start[BLOCK_BOOT] = 0x00000; /* BOOT BLOCK */
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flash->block_end[BLOCK_BOOT] = 0x01fff;
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}
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else /* 28F001BX-T */
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{
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flash->block_start[BLOCK_MAIN] = 0x00000; /* MAIN BLOCK */
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flash->block_end[BLOCK_MAIN] = 0x1bfff;
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flash->block_start[BLOCK_DATA1] = 0x1c000; /* DATA AREA 1 BLOCK */
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flash->block_end[BLOCK_DATA1] = 0x1cfff;
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flash->block_start[BLOCK_DATA2] = 0x1d000; /* DATA AREA 2 BLOCK */
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flash->block_end[BLOCK_DATA2] = 0x1dfff;
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flash->block_start[BLOCK_BOOT] = 0x1e000; /* BOOT BLOCK */
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flash->block_end[BLOCK_BOOT] = 0x1ffff;
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}
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for (i = 0; i < 8; i++)
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{
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mem_mapping_disable(&bios_mapping[i]);
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mem_mapping_disable(&bios_high_mapping[i]);
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}
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if (flash->invert_high_pin)
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{
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memcpy(flash->array, rom + 65536, 65536);
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memcpy(flash->array + 65536, rom, 65536);
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}
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else
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{
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memcpy(flash->array, rom, 131072);
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}
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if (flash->invert_high_pin)
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{
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intel_flash_add_mappings_inverted(flash);
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}
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else
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{
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intel_flash_add_mappings(flash);
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}
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mem_mapping_add(&flash->read_mapping,
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0xe0000,
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0x20000,
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flash_read, NULL, NULL,
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NULL, NULL, NULL,
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NULL, MEM_MAPPING_EXTERNAL, (void *)flash);
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mem_mapping_add(&flash->write_mapping,
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0xe0000,
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0x20000,
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NULL, NULL, NULL,
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flash_write, NULL, NULL,
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NULL, MEM_MAPPING_EXTERNAL, (void *)flash);
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mem_mapping_disable(&flash->read_mapping);
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flash->command = CMD_READ_ARRAY;
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flash->command = CMD_READ_ARRAY;
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flash->status = 0;
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flash->status = 0;
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memset(&rom[0xc000], 0, 0x2000);
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strcpy(fpath, flash_path);
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strcat(fpath, "flash.bin");
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f = romfopen("roms/endeavor/oemlogo.bin", "rb");
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f = romfopen(fpath, "rb");
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if (f)
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if (f)
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{
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{
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fread(&rom[0xc000], 0x1000, 1, f);
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fread(&(flash->array[flash->block_start[BLOCK_MAIN]]), flash->block_len[BLOCK_MAIN], 1, f);
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fclose(f);
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fread(&(flash->array[flash->block_start[BLOCK_DATA1]]), flash->block_len[BLOCK_DATA1], 1, f);
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}
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fread(&(flash->array[flash->block_start[BLOCK_DATA2]]), flash->block_len[BLOCK_DATA2], 1, f);
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f = romfopen("roms/endeavor/ecsd.bin", "rb");
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if (f)
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{
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fread(&rom[0xd000], 0x1000, 1, f);
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fclose(f);
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fclose(f);
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}
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}
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return flash;
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return flash;
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}
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}
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/* For AMI BIOS'es - Intel 28F001BXT with high address pin inverted. */
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void *intel_flash_bxt_ami_init()
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{
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return intel_flash_init(FLASH_INVERT);
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}
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/* For Award BIOS'es - Intel 28F001BXT with high address pin not inverted. */
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void *intel_flash_bxt_init()
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{
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return intel_flash_init(0);
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}
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/* For Acer BIOS'es - Intel 28F001BXB. */
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void *intel_flash_bxb_init()
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{
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return intel_flash_init(FLASH_IS_BXB);
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}
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void intel_flash_close(void *p)
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void intel_flash_close(void *p)
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{
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{
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FILE *f;
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FILE *f;
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flash_t *flash = (flash_t *)p;
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flash_t *flash = (flash_t *)p;
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f = romfopen("roms/endeavor/oemlogo.bin", "wb");
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char fpath[1024];
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fwrite(&rom[0xc000], 0x1000, 1, f);
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fclose(f);
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strcpy(fpath, flash_path);
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f = romfopen("roms/endeavor/ecsd.bin", "wb");
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strcat(fpath, "flash.bin");
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fwrite(&rom[0xd000], 0x1000, 1, f);
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f = romfopen(fpath, "wb");
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fwrite(&(flash->array[flash->block_start[BLOCK_MAIN]]), flash->block_len[BLOCK_MAIN], 1, f);
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fwrite(&(flash->array[flash->block_start[BLOCK_DATA1]]), flash->block_len[BLOCK_DATA1], 1, f);
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fwrite(&(flash->array[flash->block_start[BLOCK_DATA2]]), flash->block_len[BLOCK_DATA2], 1, f);
|
||||||
fclose(f);
|
fclose(f);
|
||||||
|
|
||||||
free(flash);
|
free(flash);
|
||||||
}
|
}
|
||||||
|
|
||||||
device_t intel_flash_device =
|
device_t intel_flash_bxt_ami_device =
|
||||||
{
|
{
|
||||||
"Intel 28F001BXT Flash BIOS",
|
"Intel 28F001BXT Flash BIOS",
|
||||||
0,
|
0,
|
||||||
intel_flash_init,
|
intel_flash_bxt_ami_init,
|
||||||
|
intel_flash_close,
|
||||||
|
NULL,
|
||||||
|
NULL,
|
||||||
|
NULL,
|
||||||
|
NULL,
|
||||||
|
NULL
|
||||||
|
};
|
||||||
|
|
||||||
|
device_t intel_flash_bxt_device =
|
||||||
|
{
|
||||||
|
"Intel 28F001BXT Flash BIOS",
|
||||||
|
0,
|
||||||
|
intel_flash_bxt_init,
|
||||||
|
intel_flash_close,
|
||||||
|
NULL,
|
||||||
|
NULL,
|
||||||
|
NULL,
|
||||||
|
NULL,
|
||||||
|
NULL
|
||||||
|
};
|
||||||
|
|
||||||
|
device_t intel_flash_bxb_device =
|
||||||
|
{
|
||||||
|
"Intel 28F001BXB Flash BIOS",
|
||||||
|
0,
|
||||||
|
intel_flash_bxb_init,
|
||||||
intel_flash_close,
|
intel_flash_close,
|
||||||
NULL,
|
NULL,
|
||||||
NULL,
|
NULL,
|
||||||
|
|
|
||||||
|
|
@ -1 +1,3 @@
|
||||||
extern device_t intel_flash_device;
|
extern device_t intel_flash_bxt_ami_device;
|
||||||
|
extern device_t intel_flash_bxt_device;
|
||||||
|
extern device_t intel_flash_bxb_device;
|
||||||
|
|
|
||||||
|
|
@ -40,7 +40,7 @@ static mem_mapping_t ram_high_mapping;
|
||||||
static mem_mapping_t ram_mid_mapping;
|
static mem_mapping_t ram_mid_mapping;
|
||||||
static mem_mapping_t ram_remapped_mapping;
|
static mem_mapping_t ram_remapped_mapping;
|
||||||
mem_mapping_t bios_mapping[8];
|
mem_mapping_t bios_mapping[8];
|
||||||
static mem_mapping_t bios_high_mapping[8];
|
mem_mapping_t bios_high_mapping[8];
|
||||||
static mem_mapping_t romext_mapping;
|
static mem_mapping_t romext_mapping;
|
||||||
|
|
||||||
int shadowbios,shadowbios_write;
|
int shadowbios,shadowbios_write;
|
||||||
|
|
|
||||||
|
|
@ -101,6 +101,7 @@ void mem_write_nulll(uint32_t addr, uint32_t val, void *p);
|
||||||
FILE *romfopen(char *fn, char *mode);
|
FILE *romfopen(char *fn, char *mode);
|
||||||
|
|
||||||
mem_mapping_t bios_mapping[8];
|
mem_mapping_t bios_mapping[8];
|
||||||
|
mem_mapping_t bios_high_mapping[8];
|
||||||
|
|
||||||
|
|
||||||
typedef struct page_t
|
typedef struct page_t
|
||||||
|
|
|
||||||
|
|
@ -377,6 +377,7 @@ void at_batman_init()
|
||||||
i430lx_init();
|
i430lx_init();
|
||||||
fdc37c665_init();
|
fdc37c665_init();
|
||||||
intel_batman_init();
|
intel_batman_init();
|
||||||
|
device_add(&intel_flash_bxt_ami_device);
|
||||||
}
|
}
|
||||||
void at_endeavor_init()
|
void at_endeavor_init()
|
||||||
{
|
{
|
||||||
|
|
@ -387,7 +388,7 @@ void at_endeavor_init()
|
||||||
piix_init(7);
|
piix_init(7);
|
||||||
um8669f_init();
|
um8669f_init();
|
||||||
intel_endeavor_init();
|
intel_endeavor_init();
|
||||||
device_add(&intel_flash_device);
|
device_add(&intel_flash_bxt_ami_device);
|
||||||
}
|
}
|
||||||
|
|
||||||
void at_i430vx_init()
|
void at_i430vx_init()
|
||||||
|
|
@ -398,6 +399,7 @@ void at_i430vx_init()
|
||||||
i430vx_init();
|
i430vx_init();
|
||||||
piix_init(7);
|
piix_init(7);
|
||||||
um8669f_init();
|
um8669f_init();
|
||||||
|
device_add(&intel_flash_bxt_device);
|
||||||
}
|
}
|
||||||
|
|
||||||
void model_init()
|
void model_init()
|
||||||
|
|
|
||||||
Loading…
Reference in a new issue