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Add initial P6 timing model. Currently only basic decoder limits

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(4-1-1 rule and 16-byte limit) have been implemented.
This commit is contained in:
SarahW 2020-06-24 20:42:24 +01:00
commit 21dbd868e1
3 changed files with 2087 additions and 1 deletions
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2
src/cpu.c
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@ -1051,7 +1051,7 @@ void cpu_set()
cpu_features = CPU_FEATURE_RDTSC | CPU_FEATURE_MSR | CPU_FEATURE_CR4 | CPU_FEATURE_VME | CPU_FEATURE_CX8;
msr.fcr = (1 << 8) | (1 << 9) | (1 << 12) | (1 << 16) | (1 << 19) | (1 << 21);
cpu_CR4_mask = CR4_VME | CR4_PVI | CR4_TSD | CR4_DE | CR4_PSE | CR4_MCE | CR4_PCE;
codegen_timing_set(&codegen_timing_pentium);
codegen_timing_set(&codegen_timing_p6);
break;
default: