Mach64 changes :
- No longer crashes PCem when remapping (mostly seen when changing resolution in Windows) - Added PCI registers - Added LFB emulation (PCI only) - Source pattern modes now work correctly - Vsync flag now emulated correctly - Scrolling in accelerator modes now works correctly Also disabled some debug.
This commit is contained in:
TomW
parent
af6d9474e6
commit
1c623fe1fc
6 changed files with 293 additions and 83 deletions
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@ -61,7 +61,7 @@ void sis496_recalcmapping(sis496_t *sis496)
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void sis496_write(int func, int addr, uint8_t val, void *p)
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{
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sis496_t *sis496 = (sis496_t *)p;
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pclog("sis496_write : addr=%02x val=%02x\n", addr, val);
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//pclog("sis496_write : addr=%02x val=%02x\n", addr, val);
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switch (addr)
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{
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case 0x44: /*Shadow configure*/
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@ -54,7 +54,7 @@ void ati_eeprom_save(ati_eeprom_t *eeprom)
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void ati_eeprom_write(ati_eeprom_t *eeprom, int ena, int clk, int dat)
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{
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int c;
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pclog("EEPROM write %i %i %i\n", ena, clk, dat);
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// pclog("EEPROM write %i %i %i\n", ena, clk, dat);
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if (!ena)
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{
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eeprom->out = 1;
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@ -70,7 +70,7 @@ void ati_eeprom_write(ati_eeprom_t *eeprom, int ena, int clk, int dat)
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}
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else if (ena)
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{
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pclog("EEPROM receive %i %i %i\n", ena, clk, dat);
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// pclog("EEPROM receive %i %i %i\n", ena, clk, dat);
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switch (eeprom->state)
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{
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case EEPROM_WAIT:
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@ -83,7 +83,7 @@ void ati_eeprom_write(ati_eeprom_t *eeprom, int ena, int clk, int dat)
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eeprom->count--;
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if (!eeprom->count)
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{
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pclog("EEPROM opcode - %i\n", eeprom->opcode);
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// pclog("EEPROM opcode - %i\n", eeprom->opcode);
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switch (eeprom->opcode)
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{
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case EEPROM_OP_WRITE:
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@ -115,11 +115,11 @@ void ati_eeprom_write(ati_eeprom_t *eeprom, int ena, int clk, int dat)
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eeprom->count--;
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if (!eeprom->count)
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{
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pclog("EEPROM dat - %02X\n", eeprom->dat);
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// pclog("EEPROM dat - %02X\n", eeprom->dat);
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switch (eeprom->opcode)
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{
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case EEPROM_OP_WRITE:
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pclog("EEPROM_OP_WRITE addr %02X eeprom_dat %04X\n", (eeprom->dat >> 16) & (eeprom->type ? 255 : 63), eeprom->dat & 0xffff);
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// pclog("EEPROM_OP_WRITE addr %02X eeprom_dat %04X\n", (eeprom->dat >> 16) & (eeprom->type ? 255 : 63), eeprom->dat & 0xffff);
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if (!eeprom->wp)
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{
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eeprom->data[(eeprom->dat >> 16) & (eeprom->type ? 255 : 63)] = eeprom->dat & 0xffff;
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@ -133,10 +133,10 @@ void ati_eeprom_write(ati_eeprom_t *eeprom, int ena, int clk, int dat)
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eeprom->count = 17;
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eeprom->state = EEPROM_OUTPUT;
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eeprom->dat = eeprom->data[eeprom->dat];
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pclog("Trigger EEPROM_OUTPUT %04X\n", eeprom->dat);
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// pclog("Trigger EEPROM_OUTPUT %04X\n", eeprom->dat);
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break;
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case EEPROM_OP_EW:
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pclog("EEPROM_OP_EW %i\n", eeprom->dat);
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// pclog("EEPROM_OP_EW %i\n", eeprom->dat);
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switch (eeprom->dat)
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{
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case EEPROM_OP_EWDS:
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@ -162,7 +162,7 @@ void ati_eeprom_write(ati_eeprom_t *eeprom, int ena, int clk, int dat)
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break;
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case EEPROM_OP_ERASE:
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pclog("EEPROM_OP_ERASE %i\n", eeprom->dat);
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// pclog("EEPROM_OP_ERASE %i\n", eeprom->dat);
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if (!eeprom->wp)
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{
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eeprom->data[eeprom->dat] = 0xffff;
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@ -173,7 +173,7 @@ void ati_eeprom_write(ati_eeprom_t *eeprom, int ena, int clk, int dat)
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break;
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case EEPROM_OP_WRALMAIN:
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pclog("EEPROM_OP_WRAL %04X\n", eeprom->dat);
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// pclog("EEPROM_OP_WRAL %04X\n", eeprom->dat);
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if (!eeprom->wp)
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{
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for (c = 0; c < 256; c++)
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@ -199,11 +199,11 @@ void ati_eeprom_write(ati_eeprom_t *eeprom, int ena, int clk, int dat)
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case EEPROM_OUTPUT:
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eeprom->out = (eeprom->dat & 0x10000) ? 1 : 0;
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eeprom->dat <<= 1;
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pclog("EEPROM_OUTPUT - data %i\n", eeprom->out);
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// pclog("EEPROM_OUTPUT - data %i\n", eeprom->out);
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eeprom->count--;
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if (!eeprom->count)
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{
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pclog("EEPROM_OUTPUT complete\n");
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// pclog("EEPROM_OUTPUT complete\n");
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eeprom->state = EEPROM_IDLE;
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}
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break;
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@ -4,6 +4,7 @@
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#include "device.h"
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#include "io.h"
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#include "mem.h"
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#include "pci.h"
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#include "video.h"
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#include "vid_svga.h"
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#include "vid_ati68860_ramdac.h"
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@ -12,16 +13,14 @@
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#include "vid_svga_render.h"
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//#define MACH64_DEBUG
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void mach64_write(uint32_t addr, uint8_t val, void *priv);
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uint8_t mach64_read(uint32_t addr, void *priv);
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typedef struct mach64_t
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{
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svga_t svga;
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ati68860_ramdac_t ramdac;
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ati_eeprom_t eeprom;
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ics2595_t ics2595;
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svga_t svga;
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uint8_t regs[256];
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int index;
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@ -81,22 +80,28 @@ typedef struct mach64_t
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uint32_t scratch_reg0, scratch_reg1;
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uint32_t src_cntl;
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uint32_t src_cntl;
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uint32_t src_off_pitch;
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uint32_t src_y_x;
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uint32_t src_y_x_start;
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uint32_t src_height1_width1, src_height2_width2;
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uint32_t linear_base, old_linear_base;
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uint8_t stat;
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struct
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{
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int op;
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int dst_x, dst_y;
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int dst_x_start;
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int dst_x_start, dst_y_start;
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int src_x, src_y;
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int src_x_start;
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int src_x_start, src_y_start;
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int xinc, yinc;
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int x_count, y_count;
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int src_x_count, src_y_count;
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int src_width1, src_height1;
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int src_width2, src_height2;
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uint32_t src_offset, src_pitch;
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uint32_t dst_offset, dst_pitch;
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int mix_bg, mix_fg;
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@ -149,6 +154,13 @@ enum
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OP_LINE
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};
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enum
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{
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SRC_PATT_EN = 1,
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SRC_PATT_ROT_EN = 2,
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SRC_LINEAR_EN = 4
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};
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static int mach64_width[6] = {0, 0, 0, 1, 1, 2};
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enum
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@ -156,6 +168,10 @@ enum
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DST_24_ROT_EN = 0x80
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};
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void mach64_write(uint32_t addr, uint8_t val, void *priv);
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uint8_t mach64_read(uint32_t addr, void *priv);
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void mach64_updatemapping(mach64_t *mach64);
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uint8_t mach64_ext_readb(uint32_t addr, void *priv);
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uint16_t mach64_ext_readw(uint32_t addr, void *priv);
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uint32_t mach64_ext_readl(uint32_t addr, void *priv);
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@ -190,30 +206,10 @@ void mach64_out(uint16_t addr, uint8_t val, void *p)
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case 0x3cf:
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if (svga->gdcaddr == 6)
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{
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if ((svga->gdcreg[6] & 0xc) != (val & 0xc))
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{
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mem_removehandler(0xa0000, 0x20000, mach64_read, NULL, NULL, mach64_write, NULL, NULL, mach64);
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mem_removehandler(0xa0000, 0x20000, svga_read, svga_readw, svga_readl, svga_write, svga_writew, svga_writel, svga);
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mem_removehandler(0xbc000, 0x04000, mach64_ext_readb, mach64_ext_readw, mach64_ext_readl, mach64_ext_writeb, mach64_ext_writew, mach64_ext_writel, mach64);
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// pclog("Write mapping %02X\n", val);
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switch (val & 0xc)
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{
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case 0x0: /*128k at A0000*/
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mem_sethandler(0xa0000, 0x10000, mach64_read, NULL, NULL, mach64_write, NULL, NULL, mach64);
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mem_sethandler(0xbc000, 0x04000, mach64_ext_readb, mach64_ext_readw, mach64_ext_readl, mach64_ext_writeb, mach64_ext_writew, mach64_ext_writel, mach64);
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break;
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case 0x4: /*64k at A0000*/
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mem_sethandler(0xa0000, 0x10000, mach64_read, NULL, NULL, mach64_write, NULL, NULL, mach64);
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break;
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case 0x8: /*32k at B0000*/
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mem_sethandler(0xb0000, 0x08000, svga_read, svga_readw, svga_readl, svga_write, svga_writew, svga_writel, svga);
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break;
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case 0xC: /*32k at B8000*/
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mem_sethandler(0xb8000, 0x08000, svga_read, svga_readw, svga_readl, svga_write, svga_writew, svga_writel, svga);
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break;
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}
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}
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uint8_t old_val = svga->gdcreg[6];
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svga->gdcreg[6] = val;
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if ((svga->gdcreg[6] & 0xc) != (old_val & 0xc))
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mach64_updatemapping(mach64);
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return;
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}
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break;
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@ -280,8 +276,9 @@ void mach64_recalctimings(svga_t *svga)
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svga->vsyncstart = (mach64->crtc_v_sync_strt_wid & 2047) + 1;
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svga->rowoffset = (mach64->crtc_off_pitch >> 22);
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svga->clock = cpuclock / mach64->ics2595.output_clock;
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svga->ma = (mach64->crtc_off_pitch & 0x1fffff) * 2;
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svga->ma_latch = (mach64->crtc_off_pitch & 0x1fffff) * 2;
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svga->linedbl = svga->rowcount = 0;
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svga->split = 0xffffff;
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// svga_htotal <<= 1;
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// svga_hdisp <<= 1;
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svga->rowoffset <<= 1;
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@ -317,10 +314,47 @@ void mach64_recalctimings(svga_t *svga)
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break;
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}
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// pclog("mach64_recalctimings : frame %i,%i disp %i,%i vsync at %i rowoffset %i pixel clock %f MA %08X\n", svga->htotal, svga->vtotal, svga->hdisp, svga->dispend, svga->vsyncstart, svga->rowoffset, svga->clock, svga->ma);
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// pclog("mach64_recalctimings : frame %i,%i disp %i,%i vsync at %i rowoffset %i pixel clock %f MA %08X\n", svga->htotal, svga->vtotal, svga->hdisp, svga->dispend, svga->vsyncstart, svga->rowoffset, svga->clock, svga->ma);
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}
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}
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void mach64_updatemapping(mach64_t *mach64)
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{
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svga_t *svga = &mach64->svga;
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mem_removehandler(0xa0000, 0x10000, mach64_read, NULL, NULL, mach64_write, NULL, NULL, mach64);
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mem_removehandler(0xa0000, 0x20000, svga_read, svga_readw, svga_readl, svga_write, svga_writew, svga_writel, svga);
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mem_removehandler(0xbc000, 0x04000, mach64_ext_readb, mach64_ext_readw, mach64_ext_readl, mach64_ext_writeb, mach64_ext_writew, mach64_ext_writel, mach64);
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if (mach64->old_linear_base >= (mem_size << 20))
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{
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mem_removehandler(mach64->old_linear_base, (8 << 20) - 0x4000, svga_read_linear, svga_readw_linear, svga_readl_linear, svga_write_linear, svga_writew_linear, svga_writel_linear, svga);
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mem_removehandler(mach64->old_linear_base + ((8 << 20) - 0x4000), 0x4000, mach64_ext_readb, mach64_ext_readw, mach64_ext_readl, mach64_ext_writeb, mach64_ext_writew, mach64_ext_writel, mach64);
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}
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// pclog("Write mapping %02X\n", val);
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switch (svga->gdcreg[6] & 0xc)
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{
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case 0x0: /*128k at A0000*/
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mem_sethandler(0xa0000, 0x10000, mach64_read, NULL, NULL, mach64_write, NULL, NULL, mach64);
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mem_sethandler(0xbc000, 0x04000, mach64_ext_readb, mach64_ext_readw, mach64_ext_readl, mach64_ext_writeb, mach64_ext_writew, mach64_ext_writel, mach64);
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break;
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case 0x4: /*64k at A0000*/
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mem_sethandler(0xa0000, 0x10000, mach64_read, NULL, NULL, mach64_write, NULL, NULL, mach64);
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break;
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case 0x8: /*32k at B0000*/
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mem_sethandler(0xb0000, 0x08000, svga_read, svga_readw, svga_readl, svga_write, svga_writew, svga_writel, svga);
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break;
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case 0xC: /*32k at B8000*/
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mem_sethandler(0xb8000, 0x08000, svga_read, svga_readw, svga_readl, svga_write, svga_writew, svga_writel, svga);
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break;
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}
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if (mach64->linear_base >= (mem_size << 20))
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{
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mem_sethandler(mach64->linear_base, (8 << 20) - 0x4000, svga_read_linear, svga_readw_linear, svga_readl_linear, svga_write_linear, svga_writew_linear, svga_writel_linear, svga);
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mem_sethandler(mach64->linear_base + ((8 << 20) - 0x4000), 0x4000, mach64_ext_readb, mach64_ext_readw, mach64_ext_readl, mach64_ext_writeb, mach64_ext_writew, mach64_ext_writel, mach64);
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// pclog("Mach64 LFB %08X\n", mach64->linear_base);
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}
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mach64->old_linear_base = mach64->linear_base;
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}
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#define READ8(addr, var) switch ((addr) & 3) \
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{ \
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case 0: ret = (var) & 0xff; break; \
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@ -340,24 +374,50 @@ void mach64_recalctimings(svga_t *svga)
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void mach64_cursor_dump(mach64_t *mach64)
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{
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svga_t *svga = &mach64->svga;
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pclog("Mach64 cursor :\n");
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pclog("Ena = %i X = %i Y = %i Addr = %05X Xoff = %i Yoff = %i\n", svga->hwcursor.ena, svga->hwcursor.x, svga->hwcursor.y, svga->hwcursor.addr, svga->hwcursor.xoff, svga->hwcursor.yoff);
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/* pclog("Mach64 cursor :\n");
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pclog("Ena = %i X = %i Y = %i Addr = %05X Xoff = %i Yoff = %i\n", svga->hwcursor.ena, svga->hwcursor.x, svga->hwcursor.y, svga->hwcursor.addr, svga->hwcursor.xoff, svga->hwcursor.yoff);*/
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}
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void mach64_start_fill(mach64_t *mach64)
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{
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int x, y;
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mach64->accel.dst_x = (mach64->dst_y_x >> 16) & 0xfff;
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mach64->accel.dst_y = mach64->dst_y_x & 0xfff;
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mach64->accel.dst_x = 0;
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mach64->accel.dst_y = 0;
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mach64->accel.dst_x_start = (mach64->dst_y_x >> 16) & 0xfff;
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mach64->accel.dst_y_start = mach64->dst_y_x & 0xfff;
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mach64->accel.dst_width = (mach64->dst_height_width >> 16) & 0x1fff;
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mach64->accel.dst_height = mach64->dst_height_width & 0x1fff;
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mach64->accel.x_count = mach64->accel.dst_width;
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mach64->accel.src_x = (mach64->src_y_x >> 16) & 0xfff;
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mach64->accel.src_y = mach64->src_y_x & 0xfff;
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mach64->accel.src_x = 0;
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mach64->accel.src_y = 0;
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mach64->accel.src_x_start = (mach64->src_y_x >> 16) & 0xfff;
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mach64->accel.src_y_start = mach64->src_y_x & 0xfff;
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if (mach64->src_cntl & SRC_LINEAR_EN)
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mach64->accel.src_x_count = 0x7ffffff; /*Essentially infinite*/
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else
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mach64->accel.src_x_count = (mach64->src_height1_width1 >> 16) & 0x7fff;
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if (!(mach64->src_cntl & SRC_PATT_EN))
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mach64->accel.src_y_count = 0x7ffffff; /*Essentially infinite*/
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else
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mach64->accel.src_y_count = mach64->src_height1_width1 & 0x1fff;
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mach64->accel.src_width1 = (mach64->src_height1_width1 >> 16) & 0x7fff;
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mach64->accel.src_height1 = mach64->src_height1_width1 & 0x1fff;
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mach64->accel.src_width2 = (mach64->src_height2_width2 >> 16) & 0x7fff;
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mach64->accel.src_height2 = mach64->src_height2_width2 & 0x1fff;
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#ifdef MACH64_DEBUG
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pclog("src %i %i %i %i %08X %08X\n", mach64->accel.src_x_count,
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mach64->accel.src_y_count,
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mach64->accel.src_width1,
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mach64->accel.src_height1,
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mach64->src_height1_width1,
|
||||
mach64->src_height2_width2);
|
||||
#endif
|
||||
|
||||
mach64->accel.src_pitch = (mach64->src_off_pitch >> 22) * 8;
|
||||
mach64->accel.src_offset = (mach64->src_off_pitch & 0xfffff) * 8;
|
||||
|
||||
|
|
@ -385,9 +445,6 @@ void mach64_start_fill(mach64_t *mach64)
|
|||
|
||||
mach64->accel.src_offset >>= mach64->accel.src_size;
|
||||
mach64->accel.dst_offset >>= mach64->accel.dst_size;
|
||||
|
||||
mach64->accel.src_x_start = mach64->accel.src_x;
|
||||
mach64->accel.dst_x_start = mach64->accel.dst_x;
|
||||
|
||||
/* if (mach64->accel.source_fg == SRC_BLITSRC || mach64->accel.source_bg == SRC_BLITSRC)
|
||||
{*/
|
||||
|
|
@ -557,6 +614,8 @@ void mach64_blit(uint32_t cpu_dat, int count, mach64_t *mach64)
|
|||
uint32_t src_dat, dest_dat;
|
||||
uint32_t host_dat;
|
||||
int mix;
|
||||
int dst_x = mach64->accel.dst_x + mach64->accel.dst_x_start;
|
||||
int dst_y = mach64->accel.dst_y + mach64->accel.dst_y_start;
|
||||
|
||||
if (mach64->accel.source_host)
|
||||
{
|
||||
|
|
@ -586,24 +645,27 @@ void mach64_blit(uint32_t cpu_dat, int count, mach64_t *mach64)
|
|||
cpu_dat <<= 1;
|
||||
break;
|
||||
case MONO_SRC_PAT:
|
||||
mix = mach64->accel.pattern[mach64->accel.dst_y & 7][mach64->accel.dst_x & 7];
|
||||
mix = mach64->accel.pattern[dst_y & 7][dst_x & 7];
|
||||
break;
|
||||
case MONO_SRC_1:
|
||||
default:
|
||||
mix = 1;
|
||||
break;
|
||||
}
|
||||
|
||||
if (mach64->accel.dst_x >= mach64->accel.sc_left && mach64->accel.dst_x <= mach64->accel.sc_right &&
|
||||
mach64->accel.dst_y >= mach64->accel.sc_top && mach64->accel.dst_y <= mach64->accel.sc_bottom)
|
||||
|
||||
if (dst_x >= mach64->accel.sc_left && dst_x <= mach64->accel.sc_right &&
|
||||
dst_y >= mach64->accel.sc_top && dst_y <= mach64->accel.sc_bottom)
|
||||
{
|
||||
int src_x = mach64->accel.src_x + mach64->accel.src_x_start;
|
||||
int src_y = mach64->accel.src_y + mach64->accel.src_y_start;
|
||||
|
||||
switch (mix ? mach64->accel.source_fg : mach64->accel.source_bg)
|
||||
{
|
||||
case SRC_HOST:
|
||||
src_dat = host_dat;
|
||||
break;
|
||||
case SRC_BLITSRC:
|
||||
READ(mach64->accel.src_offset + (mach64->accel.src_y * mach64->accel.src_pitch) + mach64->accel.src_x, src_dat, mach64->accel.src_size);
|
||||
READ(mach64->accel.src_offset + (src_y * mach64->accel.src_pitch) + src_x, src_dat, mach64->accel.src_size);
|
||||
break;
|
||||
case SRC_FG:
|
||||
src_dat = mach64->accel.dp_frgd_clr;
|
||||
|
|
@ -616,15 +678,11 @@ void mach64_blit(uint32_t cpu_dat, int count, mach64_t *mach64)
|
|||
break;
|
||||
}
|
||||
|
||||
READ(mach64->accel.dst_offset + (mach64->accel.dst_y * mach64->accel.dst_pitch) + mach64->accel.dst_x, dest_dat, mach64->accel.dst_size);
|
||||
READ(mach64->accel.dst_offset + (dst_y * mach64->accel.dst_pitch) + dst_x, dest_dat, mach64->accel.dst_size);
|
||||
|
||||
// pclog("Blit %i,%i %i,%i %X %X %i %02X %02X %i ", mach64->accel.src_x, mach64->accel.src_y, mach64->accel.dst_x, mach64->accel.dst_y, (mach64->accel.src_offset + (mach64->accel.src_y * mach64->accel.src_pitch) + mach64->accel.src_x) & 0x7fffff, (mach64->accel.dst_offset + (mach64->accel.dst_y * mach64->accel.dst_pitch) + mach64->accel.dst_x) & 0x7fffff, count, src_dat, dest_dat, mix);
|
||||
|
||||
MIX
|
||||
|
||||
// pclog("%02X %i\n", dest_dat, mach64->accel.dst_height);
|
||||
|
||||
WRITE(mach64->accel.dst_offset + (mach64->accel.dst_y * mach64->accel.dst_pitch) + mach64->accel.dst_x, mach64->accel.dst_size);
|
||||
WRITE(mach64->accel.dst_offset + (dst_y * mach64->accel.dst_pitch) + dst_x, mach64->accel.dst_size);
|
||||
}
|
||||
|
||||
if (mach64->dst_cntl & DST_24_ROT_EN)
|
||||
|
|
@ -635,16 +693,43 @@ void mach64_blit(uint32_t cpu_dat, int count, mach64_t *mach64)
|
|||
|
||||
mach64->accel.src_x += mach64->accel.xinc;
|
||||
mach64->accel.dst_x += mach64->accel.xinc;
|
||||
mach64->accel.src_x_count--;
|
||||
if (mach64->accel.src_x_count <= 0)
|
||||
{
|
||||
mach64->accel.src_x = 0;
|
||||
if ((mach64->src_cntl & (SRC_PATT_ROT_EN | SRC_PATT_EN)) == (SRC_PATT_ROT_EN | SRC_PATT_EN))
|
||||
{
|
||||
mach64->accel.src_x_start = (mach64->src_y_x_start >> 16) & 0xfff;
|
||||
mach64->accel.src_x_count = mach64->accel.src_width2;
|
||||
}
|
||||
else
|
||||
mach64->accel.src_x_count = mach64->accel.src_width1;
|
||||
}
|
||||
|
||||
mach64->accel.x_count--;
|
||||
|
||||
if (mach64->accel.x_count <= 0)
|
||||
{
|
||||
mach64->accel.x_count = mach64->accel.dst_width;
|
||||
mach64->accel.src_x = mach64->accel.src_x_start;
|
||||
mach64->accel.dst_x = mach64->accel.dst_x_start;
|
||||
mach64->accel.src_x = 0;
|
||||
mach64->accel.dst_x = 0;
|
||||
mach64->accel.src_x_start = (mach64->src_y_x >> 16) & 0xfff;
|
||||
|
||||
mach64->accel.src_y += mach64->accel.yinc;
|
||||
mach64->accel.dst_y += mach64->accel.yinc;
|
||||
mach64->accel.src_y_count--;
|
||||
if (mach64->accel.src_y_count <= 0)
|
||||
{
|
||||
mach64->accel.src_y = 0;
|
||||
if ((mach64->src_cntl & (SRC_PATT_ROT_EN | SRC_PATT_EN)) == (SRC_PATT_ROT_EN | SRC_PATT_EN))
|
||||
{
|
||||
mach64->accel.src_y_start = mach64->src_y_x_start & 0xfff;
|
||||
mach64->accel.src_y_count = mach64->accel.src_height2;
|
||||
}
|
||||
else
|
||||
mach64->accel.src_y_count = mach64->accel.src_height1;
|
||||
}
|
||||
|
||||
mach64->accel.dst_height--;
|
||||
|
||||
if (mach64->accel.dst_height <= 0)
|
||||
|
|
@ -888,13 +973,17 @@ uint8_t mach64_ext_readb(uint32_t addr, void *p)
|
|||
READ8(addr, mach64->crtc_v_sync_strt_wid);
|
||||
break;
|
||||
|
||||
case 0x12: case 0x13:
|
||||
READ8(addr - 2, mach64->svga.vc);
|
||||
break;
|
||||
|
||||
case 0x14: case 0x15: case 0x16: case 0x17:
|
||||
READ8(addr, mach64->crtc_off_pitch);
|
||||
break;
|
||||
|
||||
case 0x18:
|
||||
ret = mach64->crtc_int_cntl & ~1;
|
||||
if (mach64->stat & 8)
|
||||
if (mach64->svga.cgastat & 8)
|
||||
ret |= 1;
|
||||
break;
|
||||
|
||||
|
|
@ -946,7 +1035,7 @@ uint8_t mach64_ext_readb(uint32_t addr, void *p)
|
|||
break;
|
||||
|
||||
case 0xe0: case 0xe1: case 0xe2: case 0xe3:
|
||||
READ8(addr, 0xd7); /*88800GX*/
|
||||
READ8(addr, 0x020000d7); /*88800GX-2*/
|
||||
break;
|
||||
|
||||
case 0x100: case 0x101: case 0x102: case 0x103:
|
||||
|
|
@ -998,6 +1087,33 @@ uint8_t mach64_ext_readb(uint32_t addr, void *p)
|
|||
case 0x18c: case 0x18d: case 0x18e: case 0x18f:
|
||||
READ8(addr, mach64->src_y_x);
|
||||
break;
|
||||
case 0x190: case 0x191:
|
||||
READ8(addr + 2, mach64->src_height1_width1);
|
||||
break;
|
||||
case 0x194: case 0x195:
|
||||
READ8(addr, mach64->src_height1_width1);
|
||||
break;
|
||||
case 0x198: case 0x199: case 0x19a: case 0x19b:
|
||||
READ8(addr, mach64->src_height1_width1);
|
||||
break;
|
||||
case 0x19c: case 0x19d:
|
||||
READ8(addr, mach64->src_y_x_start);
|
||||
break;
|
||||
case 0x1a0: case 0x1a1:
|
||||
READ8(addr + 2, mach64->src_y_x_start);
|
||||
break;
|
||||
case 0x1a4: case 0x1a5: case 0x1a6: case 0x1a7:
|
||||
READ8(addr, mach64->src_y_x_start);
|
||||
break;
|
||||
case 0x1a8: case 0x1a9:
|
||||
READ8(addr + 2, mach64->src_height2_width2);
|
||||
break;
|
||||
case 0x1ac: case 0x1ad:
|
||||
READ8(addr, mach64->src_height2_width2);
|
||||
break;
|
||||
case 0x1b0: case 0x1b1: case 0x1b2: case 0x1b3:
|
||||
READ8(addr, mach64->src_height2_width2);
|
||||
break;
|
||||
|
||||
case 0x1b4: case 0x1b5: case 0x1b6: case 0x1b7:
|
||||
READ8(addr, mach64->src_cntl);
|
||||
|
|
@ -1098,7 +1214,7 @@ uint32_t mach64_ext_readl(uint32_t addr, void *p)
|
|||
{
|
||||
case 0x18:
|
||||
ret = mach64->crtc_int_cntl & ~1;
|
||||
if (mach64->stat & 8)
|
||||
if (mach64->svga.cgastat & 8)
|
||||
ret |= 1;
|
||||
break;
|
||||
|
||||
|
|
@ -1317,6 +1433,33 @@ void mach64_ext_writeb(uint32_t addr, uint8_t val, void *p)
|
|||
case 0x18c: case 0x18d: case 0x18e: case 0x18f:
|
||||
WRITE8(addr, mach64->src_y_x, val);
|
||||
break;
|
||||
case 0x190: case 0x191:
|
||||
WRITE8(addr + 2, mach64->src_height1_width1, val);
|
||||
break;
|
||||
case 0x194: case 0x195:
|
||||
WRITE8(addr, mach64->src_height1_width1, val);
|
||||
break;
|
||||
case 0x198: case 0x199: case 0x19a: case 0x19b:
|
||||
WRITE8(addr, mach64->src_height1_width1, val);
|
||||
break;
|
||||
case 0x19c: case 0x19d:
|
||||
WRITE8(addr, mach64->src_y_x_start, val);
|
||||
break;
|
||||
case 0x1a0: case 0x1a1:
|
||||
WRITE8(addr + 2, mach64->src_y_x_start, val);
|
||||
break;
|
||||
case 0x1a4: case 0x1a5: case 0x1a6: case 0x1a7:
|
||||
WRITE8(addr, mach64->src_y_x_start, val);
|
||||
break;
|
||||
case 0x1a8: case 0x1a9:
|
||||
WRITE8(addr + 2, mach64->src_height2_width2, val);
|
||||
break;
|
||||
case 0x1ac: case 0x1ad:
|
||||
WRITE8(addr, mach64->src_height2_width2, val);
|
||||
break;
|
||||
case 0x1b0: case 0x1b1: case 0x1b2: case 0x1b3:
|
||||
WRITE8(addr, mach64->src_height2_width2, val);
|
||||
break;
|
||||
|
||||
case 0x1b4: case 0x1b5: case 0x1b6: case 0x1b7:
|
||||
WRITE8(addr, mach64->src_cntl, val);
|
||||
|
|
@ -1485,6 +1628,10 @@ uint8_t mach64_ext_inb(uint16_t port, void *p)
|
|||
ret = mach64_ext_readb(0x0c | (port & 3), p);
|
||||
break;
|
||||
|
||||
case 0x12ec: case 0x12ed: case 0x12ee: case 0x12ef:
|
||||
ret = mach64_ext_readb(0x10 | (port & 3), p);
|
||||
break;
|
||||
|
||||
case 0x16ec: case 0x16ed: case 0x16ee: case 0x16ef:
|
||||
ret = mach64_ext_readb(0x14 | (port & 3), p);
|
||||
break;
|
||||
|
|
@ -1557,6 +1704,8 @@ uint8_t mach64_ext_inb(uint16_t port, void *p)
|
|||
break;
|
||||
|
||||
case 0x6aec: case 0x6aed: case 0x6aee: case 0x6aef:
|
||||
mach64->config_cntl = (mach64->config_cntl & ~0x3ff0) | ((mach64->linear_base >> 22) << 4);
|
||||
mach64->config_cntl = (mach64->config_cntl & ~3) | 2;
|
||||
READ8(port, mach64->config_cntl);
|
||||
break;
|
||||
|
||||
|
|
@ -1758,19 +1907,21 @@ void mach64_ext_outl(uint16_t port, uint32_t val, void *p)
|
|||
void mach64_write(uint32_t addr, uint8_t val, void *p)
|
||||
{
|
||||
mach64_t *mach64 = (mach64_t *)p;
|
||||
svga_t *svga = &mach64->svga;
|
||||
// pclog("mach64_write : %05X %02X ", addr, val);
|
||||
addr = (addr & 0x7fff) + mach64->bank_w[(addr >> 15) & 1];
|
||||
// pclog("%08X\n", addr);
|
||||
svga_write_linear(addr, val, p);
|
||||
svga_write_linear(addr, val, svga);
|
||||
}
|
||||
|
||||
uint8_t mach64_read(uint32_t addr, void *p)
|
||||
{
|
||||
mach64_t *mach64 = (mach64_t *)p;
|
||||
svga_t *svga = &mach64->svga;
|
||||
uint8_t ret;
|
||||
// pclog("mach64_read : %05X ", addr);
|
||||
addr = (addr & 0x7fff) + mach64->bank_r[(addr >> 15) & 1];
|
||||
ret = svga_read_linear(addr, p);
|
||||
ret = svga_read_linear(addr, svga);
|
||||
// pclog("%08X %02X\n", addr, ret);
|
||||
return ret;
|
||||
}
|
||||
|
|
@ -1800,6 +1951,63 @@ void mach64_hwcursor_draw(svga_t *svga, int displine)
|
|||
svga->hwcursor_latch.addr += 16;
|
||||
}
|
||||
|
||||
uint8_t mach64_pci_read(int func, int addr, void *p)
|
||||
{
|
||||
mach64_t *mach64 = (mach64_t *)p;
|
||||
svga_t *svga = &mach64->svga;
|
||||
|
||||
// pclog("Mach64 PCI read %08X\n", addr);
|
||||
|
||||
switch (addr)
|
||||
{
|
||||
case 0x00: return 0x02; /*ATi*/
|
||||
case 0x01: return 0x10;
|
||||
|
||||
case 0x02: return 'X'; /*88800GX*/
|
||||
case 0x03: return 'G';
|
||||
|
||||
case 0x04: return 0x03; /*Respond to IO and memory accesses*/
|
||||
|
||||
case 0x07: return 1 << 1; /*Medium DEVSEL timing*/
|
||||
|
||||
case 0x08: return 0; /*Revision ID*/
|
||||
case 0x09: return 0; /*Programming interface*/
|
||||
|
||||
case 0x0a: return 0x01; /*Supports VGA interface, XGA compatible*/
|
||||
case 0x0b: return 0x03;
|
||||
|
||||
case 0x10: return 0x00; /*Linear frame buffer address*/
|
||||
case 0x11: return 0x00;
|
||||
case 0x12: return mach64->linear_base >> 16;
|
||||
case 0x13: return mach64->linear_base >> 24;
|
||||
|
||||
case 0x30: return 0x01; /*BIOS ROM address*/
|
||||
case 0x31: return 0x00;
|
||||
case 0x32: return 0x0C;
|
||||
case 0x33: return 0x00;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
void mach64_pci_write(int func, int addr, uint8_t val, void *p)
|
||||
{
|
||||
mach64_t *mach64 = (mach64_t *)p;
|
||||
|
||||
// pclog("Mach64 PCI write %08X %02X\n", addr, val);
|
||||
|
||||
switch (addr)
|
||||
{
|
||||
case 0x12:
|
||||
mach64->linear_base = (mach64->linear_base & 0xff000000) | ((val & 0x80) << 16);
|
||||
mach64_updatemapping(mach64);
|
||||
break;
|
||||
case 0x13:
|
||||
mach64->linear_base = (mach64->linear_base & 0x800000) | (val << 24);
|
||||
mach64_updatemapping(mach64);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
void *mach64gx_init()
|
||||
{
|
||||
int c;
|
||||
|
|
@ -1818,11 +2026,13 @@ void *mach64gx_init()
|
|||
io_sethandler((c * 0x1000) + 0x2ec, 0x0004, mach64_ext_inb, mach64_ext_inw, mach64_ext_inl, mach64_ext_outb, mach64_ext_outw, mach64_ext_outl, mach64);
|
||||
io_sethandler((c * 0x1000) + 0x6ec, 0x0004, mach64_ext_inb, mach64_ext_inw, mach64_ext_inl, mach64_ext_outb, mach64_ext_outw, mach64_ext_outl, mach64);
|
||||
io_sethandler((c * 0x1000) + 0xaec, 0x0004, mach64_ext_inb, mach64_ext_inw, mach64_ext_inl, mach64_ext_outb, mach64_ext_outw, mach64_ext_outl, mach64);
|
||||
io_sethandler((c * 0x1000) + 0xeec, 0x0004, mach64_ext_inb, mach64_ext_inw, mach64_ext_inl, mach64_ext_outb, mach64_ext_outw, mach64_ext_outl, mach64);
|
||||
io_sethandler((c * 0x1000) + 0xeec, 0x0004, mach64_ext_inb, mach64_ext_inw, mach64_ext_inl, mach64_ext_outb, mach64_ext_outw, mach64_ext_outl, mach64);
|
||||
}
|
||||
|
||||
io_sethandler(0x01ce, 0x0002, mach64_in, NULL, NULL, mach64_out, NULL, NULL, mach64);
|
||||
|
||||
|
||||
pci_add(mach64_pci_read, mach64_pci_write, mach64);
|
||||
|
||||
ati_eeprom_load(&mach64->eeprom, "mach64.nvr", 1);
|
||||
|
||||
mach64->dac_cntl = 5 << 16; /*ATI 68860 RAMDAC*/
|
||||
|
|
|
|||
|
|
@ -15,12 +15,12 @@ static int ics2595_div[4] = {8, 4, 2, 1};
|
|||
|
||||
void ics2595_write(ics2595_t *ics2595, int strobe, int dat)
|
||||
{
|
||||
pclog("ics2595_write : %i %i\n", strobe, dat);
|
||||
// pclog("ics2595_write : %i %i\n", strobe, dat);
|
||||
if (strobe)
|
||||
{
|
||||
if ((dat & 8) && !ics2595->oldfs3) /*Data clock*/
|
||||
{
|
||||
pclog(" - new dat %i\n", dat & 4);
|
||||
// pclog(" - new dat %i\n", dat & 4);
|
||||
switch (ics2595->state)
|
||||
{
|
||||
case ICS2595_IDLE:
|
||||
|
|
@ -35,13 +35,13 @@ void ics2595_write(ics2595_t *ics2595, int strobe, int dat)
|
|||
if (ics2595->pos == 20)
|
||||
{
|
||||
int d, n, l;
|
||||
pclog("ICS2595_WRITE : dat %08X\n", ics2595->dat);
|
||||
// pclog("ICS2595_WRITE : dat %08X\n", ics2595->dat);
|
||||
l = (ics2595->dat >> 2) & 0xf;
|
||||
n = ((ics2595->dat >> 7) & 255) + 257;
|
||||
d = ics2595_div[(ics2595->dat >> 16) & 3];
|
||||
|
||||
ics2595->clocks[l] = (14318181.8 * ((double)n / 46.0)) / (double)d;
|
||||
pclog("ICS2595 clock set - L %i N %i D %i freq = %f\n", l, n, d, (14318181.8 * ((double)n / 46.0)) / (double)d);
|
||||
// pclog("ICS2595 clock set - L %i N %i D %i freq = %f\n", l, n, d, (14318181.8 * ((double)n / 46.0)) / (double)d);
|
||||
ics2595->state = ICS2595_IDLE;
|
||||
}
|
||||
break;
|
||||
|
|
|
|||
|
|
@ -1116,7 +1116,7 @@ uint8_t svga_read_linear(uint32_t addr, void *p)
|
|||
|
||||
void svga_doblit(int y1, int y2, int wx, int wy, svga_t *svga)
|
||||
{
|
||||
pclog("svga_doblit start\n");
|
||||
// pclog("svga_doblit start\n");
|
||||
svga->frames++;
|
||||
// pclog("doblit %i %i\n", y1, y2);
|
||||
if (y1 > y2)
|
||||
|
|
@ -1141,7 +1141,7 @@ void svga_doblit(int y1, int y2, int wx, int wy, svga_t *svga)
|
|||
}
|
||||
video_blit_memtoscreen(32, 0, y1, y2, xsize, ysize);
|
||||
if (readflash) rectfill(screen,winsizex-40,8,winsizex-8,14,0xFFFFFFFF);
|
||||
pclog("svga_doblit end\n");
|
||||
// pclog("svga_doblit end\n");
|
||||
}
|
||||
|
||||
void svga_writew(uint32_t addr, uint16_t val, void *p)
|
||||
|
|
|
|||
|
|
@ -99,11 +99,11 @@ void keyboard_poll_host()
|
|||
}
|
||||
for (c = 0; c < 256; c++)
|
||||
{
|
||||
if (dinput_key[c] & 0x80) pclog("Dinput key down %i %02X\n", c, c);
|
||||
// if (dinput_key[c] & 0x80) pclog("Dinput key down %i %02X\n", c, c);
|
||||
if (keyboard_lookup[c] != -1)
|
||||
{
|
||||
key[c] = dinput_key[keyboard_lookup[c]] & 0x80;
|
||||
if (key[c]) pclog("Key down %i %02X %i %02X\n", c, c, keyboard_lookup[c], keyboard_lookup[c]);
|
||||
// if (key[c]) pclog("Key down %i %02X %i %02X\n", c, c, keyboard_lookup[c], keyboard_lookup[c]);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in a new issue