Added prefetch timing approximation for 286/386 CPUs, with configurable memory timing.
This commit is contained in:
SarahW
parent
c5889e311f
commit
1b73963997
33 changed files with 1139 additions and 261 deletions
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@ -10,6 +10,7 @@
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setflags ## 8 flagops; \
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setr8(cpu_rm, operation); \
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CLOCK_CYCLES(timing_rr); \
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PREFETCH_RUN(timing_rr, 2, rmdat, 0,0,0,0, 0); \
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} \
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else \
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{ \
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@ -18,6 +19,7 @@
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seteab(operation); if (cpu_state.abrt) return 1; \
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setflags ## 8 flagops; \
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CLOCK_CYCLES(timing_mr); \
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PREFETCH_RUN(timing_mr, 2, rmdat, 1,0,1,0, 0); \
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} \
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return 0; \
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} \
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@ -32,6 +34,7 @@
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setflags ## 8 flagops; \
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setr8(cpu_rm, operation); \
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CLOCK_CYCLES(timing_rr); \
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PREFETCH_RUN(timing_rr, 2, rmdat, 0,0,0,0, 1); \
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} \
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else \
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{ \
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@ -40,6 +43,7 @@
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seteab(operation); if (cpu_state.abrt) return 1; \
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setflags ## 8 flagops; \
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CLOCK_CYCLES(timing_mr); \
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PREFETCH_RUN(timing_mr, 2, rmdat, 1,0,1,0, 1); \
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} \
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return 0; \
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} \
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@ -55,6 +59,7 @@
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setflags ## 16 flagops; \
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cpu_state.regs[cpu_rm].w = operation; \
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CLOCK_CYCLES(timing_rr); \
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PREFETCH_RUN(timing_rr, 2, rmdat, 0,0,0,0, 0); \
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} \
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else \
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{ \
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@ -63,6 +68,7 @@
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seteaw(operation); if (cpu_state.abrt) return 1; \
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setflags ## 16 flagops; \
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CLOCK_CYCLES(timing_mr); \
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PREFETCH_RUN(timing_rr, 2, rmdat, 1,0,1,0, 0); \
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} \
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return 0; \
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} \
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@ -77,6 +83,7 @@
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setflags ## 16 flagops; \
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cpu_state.regs[cpu_rm].w = operation; \
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CLOCK_CYCLES(timing_rr); \
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PREFETCH_RUN(timing_rr, 2, rmdat, 0,0,0,0, 1); \
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} \
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else \
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{ \
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@ -85,6 +92,7 @@
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seteaw(operation); if (cpu_state.abrt) return 1; \
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setflags ## 16 flagops; \
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CLOCK_CYCLES(timing_mr); \
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PREFETCH_RUN(timing_rr, 2, rmdat, 1,0,1,0, 1); \
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} \
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return 0; \
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} \
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@ -100,6 +108,7 @@
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setflags ## 32 flagops; \
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cpu_state.regs[cpu_rm].l = operation; \
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CLOCK_CYCLES(timing_rr); \
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PREFETCH_RUN(timing_rr, 2, rmdat, 0,0,0,0, 0); \
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} \
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else \
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{ \
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@ -107,7 +116,8 @@
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uint32_t src = cpu_state.regs[cpu_reg].l; \
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seteal(operation); if (cpu_state.abrt) return 1; \
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setflags ## 32 flagops; \
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CLOCK_CYCLES(timing_mrl); \
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CLOCK_CYCLES(timing_mr); \
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PREFETCH_RUN(timing_rr, 2, rmdat, 0,1,0,1, 0); \
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} \
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return 0; \
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} \
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@ -122,6 +132,7 @@
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setflags ## 32 flagops; \
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cpu_state.regs[cpu_rm].l = operation; \
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CLOCK_CYCLES(timing_rr); \
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PREFETCH_RUN(timing_rr, 2, rmdat, 0,0,0,0, 1); \
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} \
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else \
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{ \
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@ -129,7 +140,8 @@
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uint32_t src = cpu_state.regs[cpu_reg].l; \
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seteal(operation); if (cpu_state.abrt) return 1; \
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setflags ## 32 flagops; \
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CLOCK_CYCLES(timing_mrl); \
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CLOCK_CYCLES(timing_mr); \
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PREFETCH_RUN(timing_rr, 2, rmdat, 0,1,0,1, 1); \
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} \
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return 0; \
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} \
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@ -144,6 +156,7 @@
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setflags ## 8 flagops; \
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setr8(cpu_reg, operation); \
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CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_rm); \
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PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_rm, 2, rmdat, (cpu_mod == 3) ? 0 : 1,0,0,0, 0); \
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return 0; \
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} \
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static int op ## name ## _b_rm_a32(uint32_t fetchdat) \
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@ -156,6 +169,7 @@
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setflags ## 8 flagops; \
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setr8(cpu_reg, operation); \
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CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_rm); \
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PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_rm, 2, rmdat, (cpu_mod == 3) ? 0 : 1,0,0,0, 1); \
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return 0; \
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} \
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\
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@ -169,6 +183,7 @@
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setflags ## 16 flagops; \
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cpu_state.regs[cpu_reg].w = operation; \
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CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_rm); \
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PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_rm, 2, rmdat, (cpu_mod == 3) ? 0 : 1,0,0,0, 0); \
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return 0; \
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} \
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static int op ## name ## _w_rm_a32(uint32_t fetchdat) \
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@ -181,6 +196,7 @@
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setflags ## 16 flagops; \
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cpu_state.regs[cpu_reg].w = operation; \
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CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_rm); \
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PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_rm, 2, rmdat, (cpu_mod == 3) ? 0 : 1,0,0,0, 1); \
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return 0; \
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} \
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\
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@ -194,6 +210,7 @@
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setflags ## 32 flagops; \
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cpu_state.regs[cpu_reg].l = operation; \
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CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_rml); \
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PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_rm, 2, rmdat, 0, (cpu_mod == 3) ? 0 : 1,0,0, 0); \
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return 0; \
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} \
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static int op ## name ## _l_rm_a32(uint32_t fetchdat) \
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@ -206,6 +223,7 @@
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setflags ## 32 flagops; \
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cpu_state.regs[cpu_reg].l = operation; \
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CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_rml); \
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PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_rm, 2, rmdat, 0, (cpu_mod == 3) ? 0 : 1,0,0, 1); \
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return 0; \
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} \
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\
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@ -217,6 +235,7 @@
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setflags ## 8 flagops; \
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AL = operation; \
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CLOCK_CYCLES(timing_rr); \
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PREFETCH_RUN(timing_rr, 2, -1, 0,0,0,0, 0); \
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return 0; \
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} \
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\
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@ -228,6 +247,7 @@
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setflags ## 16 flagops; \
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AX = operation; \
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CLOCK_CYCLES(timing_rr); \
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PREFETCH_RUN(timing_rr, 3, -1, 0,0,0,0, 0); \
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return 0; \
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} \
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\
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@ -239,6 +259,7 @@
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setflags ## 32 flagops; \
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EAX = operation; \
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CLOCK_CYCLES(timing_rr); \
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PREFETCH_RUN(timing_rr, 5, -1, 0,0,0,0, 0); \
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return 0; \
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}
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@ -258,6 +279,7 @@ static int opCMP_b_rmw_a16(uint32_t fetchdat)
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setsub8(dst, getr8(cpu_reg));
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if (is486) CLOCK_CYCLES((cpu_mod == 3) ? 1 : 2);
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else CLOCK_CYCLES((cpu_mod == 3) ? 2 : 5);
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PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_rm, 2, rmdat, (cpu_mod == 3) ? 0 : 1,0,0,0, 0);
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return 0;
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}
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static int opCMP_b_rmw_a32(uint32_t fetchdat)
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@ -268,6 +290,7 @@ static int opCMP_b_rmw_a32(uint32_t fetchdat)
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setsub8(dst, getr8(cpu_reg));
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if (is486) CLOCK_CYCLES((cpu_mod == 3) ? 1 : 2);
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else CLOCK_CYCLES((cpu_mod == 3) ? 2 : 5);
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PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_rm, 2, rmdat, (cpu_mod == 3) ? 0 : 1,0,0,0, 1);
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return 0;
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}
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@ -279,6 +302,7 @@ static int opCMP_w_rmw_a16(uint32_t fetchdat)
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setsub16(dst, cpu_state.regs[cpu_reg].w);
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if (is486) CLOCK_CYCLES((cpu_mod == 3) ? 1 : 2);
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else CLOCK_CYCLES((cpu_mod == 3) ? 2 : 5);
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PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_rm, 2, rmdat, (cpu_mod == 3) ? 0 : 1,0,0,0, 0);
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return 0;
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}
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static int opCMP_w_rmw_a32(uint32_t fetchdat)
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@ -289,6 +313,7 @@ static int opCMP_w_rmw_a32(uint32_t fetchdat)
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setsub16(dst, cpu_state.regs[cpu_reg].w);
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if (is486) CLOCK_CYCLES((cpu_mod == 3) ? 1 : 2);
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else CLOCK_CYCLES((cpu_mod == 3) ? 2 : 5);
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PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_rm, 2, rmdat, (cpu_mod == 3) ? 0 : 1,0,0,0, 1);
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return 0;
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}
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@ -300,6 +325,7 @@ static int opCMP_l_rmw_a16(uint32_t fetchdat)
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setsub32(dst, cpu_state.regs[cpu_reg].l);
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if (is486) CLOCK_CYCLES((cpu_mod == 3) ? 1 : 2);
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else CLOCK_CYCLES((cpu_mod == 3) ? 2 : 5);
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PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_rm, 2, rmdat, 0, (cpu_mod == 3) ? 0 : 1,0,0, 0);
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return 0;
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}
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static int opCMP_l_rmw_a32(uint32_t fetchdat)
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@ -310,6 +336,7 @@ static int opCMP_l_rmw_a32(uint32_t fetchdat)
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setsub32(dst, cpu_state.regs[cpu_reg].l);
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if (is486) CLOCK_CYCLES((cpu_mod == 3) ? 1 : 2);
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else CLOCK_CYCLES((cpu_mod == 3) ? 2 : 5);
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PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_rm, 2, rmdat, 0, (cpu_mod == 3) ? 0 : 1,0,0, 1);
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return 0;
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}
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@ -320,6 +347,7 @@ static int opCMP_b_rm_a16(uint32_t fetchdat)
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src = geteab(); if (cpu_state.abrt) return 1;
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setsub8(getr8(cpu_reg), src);
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CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_rm);
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PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_rm, 2, rmdat, (cpu_mod == 3) ? 0 : 1,0,0,0, 0);
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return 0;
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}
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static int opCMP_b_rm_a32(uint32_t fetchdat)
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@ -329,6 +357,7 @@ static int opCMP_b_rm_a32(uint32_t fetchdat)
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src = geteab(); if (cpu_state.abrt) return 1;
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setsub8(getr8(cpu_reg), src);
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CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_rm);
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PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_rm, 2, rmdat, (cpu_mod == 3) ? 0 : 1,0,0,0, 1);
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return 0;
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}
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@ -339,6 +368,7 @@ static int opCMP_w_rm_a16(uint32_t fetchdat)
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src = geteaw(); if (cpu_state.abrt) return 1;
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setsub16(cpu_state.regs[cpu_reg].w, src);
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CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_rm);
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PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_rm, 2, rmdat, (cpu_mod == 3) ? 0 : 1,0,0,0, 0);
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return 0;
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}
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static int opCMP_w_rm_a32(uint32_t fetchdat)
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@ -348,6 +378,7 @@ static int opCMP_w_rm_a32(uint32_t fetchdat)
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src = geteaw(); if (cpu_state.abrt) return 1;
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setsub16(cpu_state.regs[cpu_reg].w, src);
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CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_rm);
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PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_rm, 2, rmdat, (cpu_mod == 3) ? 0 : 1,0,0,0, 1);
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return 0;
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}
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@ -358,6 +389,7 @@ static int opCMP_l_rm_a16(uint32_t fetchdat)
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src = geteal(); if (cpu_state.abrt) return 1;
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setsub32(cpu_state.regs[cpu_reg].l, src);
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CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_rml);
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PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_rm, 2, rmdat, 0, (cpu_mod == 3) ? 0 : 1,0,0, 0);
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return 0;
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}
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static int opCMP_l_rm_a32(uint32_t fetchdat)
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@ -367,6 +399,7 @@ static int opCMP_l_rm_a32(uint32_t fetchdat)
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src = geteal(); if (cpu_state.abrt) return 1;
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setsub32(cpu_state.regs[cpu_reg].l, src);
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CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_rml);
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PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_rm, 2, rmdat, 0, (cpu_mod == 3) ? 0 : 1,0,0, 1);
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return 0;
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}
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@ -375,6 +408,7 @@ static int opCMP_AL_imm(uint32_t fetchdat)
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uint8_t src = getbytef();
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setsub8(AL, src);
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CLOCK_CYCLES(timing_rr);
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PREFETCH_RUN(timing_rr, 2, -1, 0,0,0,0, 0);
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return 0;
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}
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@ -383,6 +417,7 @@ static int opCMP_AX_imm(uint32_t fetchdat)
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uint16_t src = getwordf();
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setsub16(AX, src);
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CLOCK_CYCLES(timing_rr);
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PREFETCH_RUN(timing_rr, 3, -1, 0,0,0,0, 0);
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return 0;
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}
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@ -391,6 +426,7 @@ static int opCMP_EAX_imm(uint32_t fetchdat)
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uint32_t src = getlong(); if (cpu_state.abrt) return 1;
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setsub32(EAX, src);
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CLOCK_CYCLES(timing_rr);
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PREFETCH_RUN(timing_rr, 5, -1, 0,0,0,0, 0);
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return 0;
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}
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@ -403,6 +439,7 @@ static int opTEST_b_a16(uint32_t fetchdat)
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setznp8(temp & temp2);
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if (is486) CLOCK_CYCLES((cpu_mod == 3) ? 1 : 2);
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else CLOCK_CYCLES((cpu_mod == 3) ? 2 : 5);
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PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_rm, 2, rmdat, (cpu_mod == 3) ? 0 : 1,0,0,0, 0);
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return 0;
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}
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static int opTEST_b_a32(uint32_t fetchdat)
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@ -414,6 +451,7 @@ static int opTEST_b_a32(uint32_t fetchdat)
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setznp8(temp & temp2);
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if (is486) CLOCK_CYCLES((cpu_mod == 3) ? 1 : 2);
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else CLOCK_CYCLES((cpu_mod == 3) ? 2 : 5);
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PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_rm, 2, rmdat, (cpu_mod == 3) ? 0 : 1,0,0,0, 1);
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return 0;
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}
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@ -426,6 +464,7 @@ static int opTEST_w_a16(uint32_t fetchdat)
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setznp16(temp & temp2);
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if (is486) CLOCK_CYCLES((cpu_mod == 3) ? 1 : 2);
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else CLOCK_CYCLES((cpu_mod == 3) ? 2 : 5);
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PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_rm, 2, rmdat, (cpu_mod == 3) ? 0 : 1,0,0,0, 0);
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return 0;
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}
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static int opTEST_w_a32(uint32_t fetchdat)
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@ -437,6 +476,7 @@ static int opTEST_w_a32(uint32_t fetchdat)
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setznp16(temp & temp2);
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if (is486) CLOCK_CYCLES((cpu_mod == 3) ? 1 : 2);
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else CLOCK_CYCLES((cpu_mod == 3) ? 2 : 5);
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PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_rm, 2, rmdat, (cpu_mod == 3) ? 0 : 1,0,0,0, 1);
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return 0;
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}
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@ -449,6 +489,7 @@ static int opTEST_l_a16(uint32_t fetchdat)
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setznp32(temp & temp2);
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if (is486) CLOCK_CYCLES((cpu_mod == 3) ? 1 : 2);
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else CLOCK_CYCLES((cpu_mod == 3) ? 2 : 5);
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PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_rm, 2, rmdat, 0,(cpu_mod == 3) ? 0 : 1,0,0, 0);
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return 0;
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}
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static int opTEST_l_a32(uint32_t fetchdat)
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@ -460,6 +501,7 @@ static int opTEST_l_a32(uint32_t fetchdat)
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setznp32(temp & temp2);
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if (is486) CLOCK_CYCLES((cpu_mod == 3) ? 1 : 2);
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else CLOCK_CYCLES((cpu_mod == 3) ? 2 : 5);
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PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_rm, 2, rmdat, 0,(cpu_mod == 3) ? 0 : 1,0,0, 1);
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return 0;
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}
|
||||
|
||||
|
|
@ -468,6 +510,7 @@ static int opTEST_AL(uint32_t fetchdat)
|
|||
uint8_t temp = getbytef();
|
||||
setznp8(AL & temp);
|
||||
CLOCK_CYCLES(timing_rr);
|
||||
PREFETCH_RUN(timing_rr, 2, -1, 0,0,0,0, 0);
|
||||
return 0;
|
||||
}
|
||||
static int opTEST_AX(uint32_t fetchdat)
|
||||
|
|
@ -475,6 +518,7 @@ static int opTEST_AX(uint32_t fetchdat)
|
|||
uint16_t temp = getwordf();
|
||||
setznp16(AX & temp);
|
||||
CLOCK_CYCLES(timing_rr);
|
||||
PREFETCH_RUN(timing_rr, 3, -1, 0,0,0,0, 0);
|
||||
return 0;
|
||||
}
|
||||
static int opTEST_EAX(uint32_t fetchdat)
|
||||
|
|
@ -482,6 +526,7 @@ static int opTEST_EAX(uint32_t fetchdat)
|
|||
uint32_t temp = getlong(); if (cpu_state.abrt) return 1;
|
||||
setznp32(EAX & temp);
|
||||
CLOCK_CYCLES(timing_rr);
|
||||
PREFETCH_RUN(timing_rr, 5, -1, 0,0,0,0, 0);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -545,6 +590,10 @@ static int op80_a16(uint32_t fetchdat)
|
|||
fetch_ea_16(fetchdat);
|
||||
src = getbyte(); if (cpu_state.abrt) return 1;
|
||||
ARITH_MULTI(b, 8);
|
||||
if ((rmdat & 0x38) == 0x38)
|
||||
PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_mr, 3, rmdat, (cpu_mod == 3) ? 0:1,0,0,0, 0);
|
||||
else
|
||||
PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_rm, 3, rmdat, (cpu_mod == 3) ? 0:1,0,(cpu_mod == 3) ? 0:1,0, 0);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -555,6 +604,10 @@ static int op80_a32(uint32_t fetchdat)
|
|||
fetch_ea_32(fetchdat);
|
||||
src = getbyte(); if (cpu_state.abrt) return 1;
|
||||
ARITH_MULTI(b, 8);
|
||||
if ((rmdat & 0x38) == 0x38)
|
||||
PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_mr, 3, rmdat, (cpu_mod == 3) ? 0:1,0,0,0, 1);
|
||||
else
|
||||
PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_rm, 3, rmdat, (cpu_mod == 3) ? 0:1,0,(cpu_mod == 3) ? 0:1,0, 1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -565,6 +618,10 @@ static int op81_w_a16(uint32_t fetchdat)
|
|||
fetch_ea_16(fetchdat);
|
||||
src = getword(); if (cpu_state.abrt) return 1;
|
||||
ARITH_MULTI(w, 16);
|
||||
if ((rmdat & 0x38) == 0x38)
|
||||
PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_mr, 4, rmdat, (cpu_mod == 3) ? 0:1,0,0,0, 0);
|
||||
else
|
||||
PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_rm, 4, rmdat, (cpu_mod == 3) ? 0:1,0,(cpu_mod == 3) ? 0:1,0, 0);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -575,6 +632,10 @@ static int op81_w_a32(uint32_t fetchdat)
|
|||
fetch_ea_32(fetchdat);
|
||||
src = getword(); if (cpu_state.abrt) return 1;
|
||||
ARITH_MULTI(w, 16);
|
||||
if ((rmdat & 0x38) == 0x38)
|
||||
PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_mr, 4, rmdat, (cpu_mod == 3) ? 0:1,0,0,0, 1);
|
||||
else
|
||||
PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_rm, 4, rmdat, (cpu_mod == 3) ? 0:1,0,(cpu_mod == 3) ? 0:1,0, 1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -585,6 +646,10 @@ static int op81_l_a16(uint32_t fetchdat)
|
|||
fetch_ea_16(fetchdat);
|
||||
src = getlong(); if (cpu_state.abrt) return 1;
|
||||
ARITH_MULTI(l, 32);
|
||||
if ((rmdat & 0x38) == 0x38)
|
||||
PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_mr, 6, rmdat, 0,(cpu_mod == 3) ? 0:1,0,0, 0);
|
||||
else
|
||||
PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_rm, 6, rmdat, 0,(cpu_mod == 3) ? 0:1,0,(cpu_mod == 3) ? 0:1, 0);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -595,6 +660,10 @@ static int op81_l_a32(uint32_t fetchdat)
|
|||
fetch_ea_32(fetchdat);
|
||||
src = getlong(); if (cpu_state.abrt) return 1;
|
||||
ARITH_MULTI(l, 32);
|
||||
if ((rmdat & 0x38) == 0x38)
|
||||
PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_mr, 6, rmdat, 0,(cpu_mod == 3) ? 0:1,0,0, 1);
|
||||
else
|
||||
PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_rm, 6, rmdat, 0,(cpu_mod == 3) ? 0:1,0,(cpu_mod == 3) ? 0:1, 1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -607,6 +676,10 @@ static int op83_w_a16(uint32_t fetchdat)
|
|||
src = getbyte(); if (cpu_state.abrt) return 1;
|
||||
if (src & 0x80) src |= 0xff00;
|
||||
ARITH_MULTI(w, 16);
|
||||
if ((rmdat & 0x38) == 0x38)
|
||||
PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_mr, 3, rmdat, (cpu_mod == 3) ? 0:1,0,0,0, 0);
|
||||
else
|
||||
PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_rm, 3, rmdat, (cpu_mod == 3) ? 0:1,0,(cpu_mod == 3) ? 0:1,0, 0);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -618,6 +691,10 @@ static int op83_w_a32(uint32_t fetchdat)
|
|||
src = getbyte(); if (cpu_state.abrt) return 1;
|
||||
if (src & 0x80) src |= 0xff00;
|
||||
ARITH_MULTI(w, 16);
|
||||
if ((rmdat & 0x38) == 0x38)
|
||||
PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_mr, 3, rmdat, (cpu_mod == 3) ? 0:1,0,0,0, 1);
|
||||
else
|
||||
PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_rm, 3, rmdat, (cpu_mod == 3) ? 0:1,0,(cpu_mod == 3) ? 0:1,0, 1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -630,6 +707,10 @@ static int op83_l_a16(uint32_t fetchdat)
|
|||
src = getbyte(); if (cpu_state.abrt) return 1;
|
||||
if (src & 0x80) src |= 0xffffff00;
|
||||
ARITH_MULTI(l, 32);
|
||||
if ((rmdat & 0x38) == 0x38)
|
||||
PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_mr, 3, rmdat, 0,(cpu_mod == 3) ? 0:1,0,0, 0);
|
||||
else
|
||||
PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_rm, 3, rmdat, 0,(cpu_mod == 3) ? 0:1,0,(cpu_mod == 3) ? 0:1, 0);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -641,6 +722,10 @@ static int op83_l_a32(uint32_t fetchdat)
|
|||
src = getbyte(); if (cpu_state.abrt) return 1;
|
||||
if (src & 0x80) src |= 0xffffff00;
|
||||
ARITH_MULTI(l, 32);
|
||||
if ((rmdat & 0x38) == 0x38)
|
||||
PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_mr, 3, rmdat, 0,(cpu_mod == 3) ? 0:1,0,0, 1);
|
||||
else
|
||||
PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_rm, 3, rmdat, 0,(cpu_mod == 3) ? 0:1,0,(cpu_mod == 3) ? 0:1, 1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in a new issue