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Added prefetch timing approximation for 286/386 CPUs, with configurable memory timing.

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This commit is contained in:
SarahW 2016-11-25 21:32:02 +00:00
commit 1b73963997
33 changed files with 1139 additions and 261 deletions
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9
src/cpu.h
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@ -64,6 +64,8 @@ typedef struct
uint32_t cpuid_model;
uint16_t cyrix_id;
int cpu_flags;
int mem_read_cycles, mem_write_cycles;
int cache_read_cycles, cache_write_cycles;
} CPU;
extern CPU cpus_8088[];
@ -107,6 +109,11 @@ extern uint64_t cpu_CR4_mask;
#define CPU_SUPPORTS_DYNAREC 1
#define CPU_REQUIRES_DYNAREC 2
extern int cpu_cycles_read, cpu_cycles_read_l, cpu_cycles_write, cpu_cycles_write_l;
extern int cpu_prefetch_cycles, cpu_prefetch_width;
extern int cpu_waitstates;
extern int cpu_cache_int_enabled, cpu_cache_ext_enabled;
extern uint64_t tsc;
void cyrix_write(uint16_t addr, uint8_t val, void *priv);
@ -125,4 +132,6 @@ extern int xt_cpu_multi;
extern int isa_cycles;
#define ISA_CYCLES(x) ((x * isa_cycles) >> ISA_CYCLES_SHIFT)
void cpu_update_waitstates();
#endif