Added recompiled versions of CBW, CDQ, CWD, CWDE and MOVSX.
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18 changed files with 274 additions and 4 deletions
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@ -89,6 +89,8 @@ static inline void codegen_addlong(codeblock_t *block, uint32_t val)
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#define OPCODE_LDRH_REG 0xe19000b0
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#define OPCODE_STRH_IMM 0xe1c000b0
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#define OPCODE_STRH_REG 0xe18000b0
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#define OPCODE_SXTB 0xe6af0070
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#define OPCODE_SXTH 0xe6bf0070
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#define OPCODE_UADD8 0xe6500f90
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#define OPCODE_UADD16 0xe6500f10
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#define OPCODE_USUB8 0xe6500ff0
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@ -664,6 +666,15 @@ void host_arm_SUB_REG_LSR(codeblock_t *block, int dst_reg, int src_reg_n, int sr
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codegen_addlong(block, COND_AL | OPCODE_SUB_REG | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m) | SHIFT_LSR_IMM(shift));
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}
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void host_arm_SXTB(codeblock_t *block, int dst_reg, int src_reg, int rotate)
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{
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codegen_addlong(block, OPCODE_SXTB | Rd(dst_reg) | Rm(src_reg) | UXTB_ROTATE(rotate));
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}
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void host_arm_SXTH(codeblock_t *block, int dst_reg, int src_reg, int rotate)
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{
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codegen_addlong(block, OPCODE_SXTH | Rd(dst_reg) | Rm(src_reg) | UXTB_ROTATE(rotate));
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}
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void host_arm_TST_IMM(codeblock_t *block, int src_reg, uint32_t imm)
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{
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uint32_t arm_imm;
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