Tweaked timing system on 286+ interpreted CPUs - improves DAC sound quality.

This commit is contained in:
SarahW 2017-09-01 17:08:37 +01:00
commit 17ea1ace1c
4 changed files with 7 additions and 2 deletions

View file

@ -217,12 +217,13 @@ void exec386(int cycs)
int tempi; int tempi;
int cycdiff; int cycdiff;
int oldcyc; int oldcyc;
int cycle_period = cycs / 2000; /*Use a 5us timing granularity*/
cycles+=cycs; cycles+=cycs;
// output=3; // output=3;
while (cycles>0) while (cycles>0)
{ {
int cycle_period = (timer_count >> TIMER_SHIFT) + 1;
cycdiff=0; cycdiff=0;
oldcyc=cycles; oldcyc=cycles;
timer_start_period(cycles << TIMER_SHIFT); timer_start_period(cycles << TIMER_SHIFT);

View file

@ -29,6 +29,8 @@ static void dac_update(lpt_dac_t *lpt_dac)
static void dac_write_data(uint8_t val, void *p) static void dac_write_data(uint8_t val, void *p)
{ {
lpt_dac_t *lpt_dac = (lpt_dac_t *)p; lpt_dac_t *lpt_dac = (lpt_dac_t *)p;
timer_clock();
if (lpt_dac->is_stereo) if (lpt_dac->is_stereo)
{ {

View file

@ -29,6 +29,8 @@ static void dss_write_data(uint8_t val, void *p)
{ {
dss_t *dss = (dss_t *)p; dss_t *dss = (dss_t *)p;
timer_clock();
if ((dss->write_idx - dss->read_idx) < 16) if ((dss->write_idx - dss->read_idx) < 16)
{ {
dss->fifo[dss->write_idx & 15] = val; dss->fifo[dss->write_idx & 15] = val;

View file

@ -84,7 +84,7 @@ void timer_update_outstanding()
if (*timers[c].enable && *timers[c].count < timer_latch) if (*timers[c].enable && *timers[c].count < timer_latch)
timer_latch = *timers[c].count; timer_latch = *timers[c].count;
} }
timer_count = timer_latch = (timer_latch + ((1 << TIMER_SHIFT) - 1)) >> TIMER_SHIFT; timer_count = timer_latch = (timer_latch + ((1 << TIMER_SHIFT) - 1));
} }
void timer_reset() void timer_reset()