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Add NMI support to dynamic recompiler.

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This commit is contained in:
SarahW 2017-10-13 22:42:59 +01:00
commit 132a2eb110
3 changed files with 46 additions and 1 deletions
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22
src/386_dynarec.c
View file

@ -10,6 +10,7 @@
#include "codegen.h" #include "codegen.h"
#include "cpu.h" #include "cpu.h"
#include "fdc.h" #include "fdc.h"
#include "nmi.h"
#include "pic.h" #include "pic.h"
#include "timer.h" #include "timer.h"
@ -560,7 +561,9 @@ void exec386_dynarec(int cycs)
CPU_BLOCK_END(); CPU_BLOCK_END();
if (trap) if (trap)
CPU_BLOCK_END(); CPU_BLOCK_END();
if (nmi && nmi_enable && nmi_mask)
CPU_BLOCK_END();
ins++; ins++;
insc++; insc++;
@ -719,6 +722,8 @@ inrecomp=0;
if (trap) if (trap)
CPU_BLOCK_END(); CPU_BLOCK_END();
if (nmi && nmi_enable && nmi_mask)
CPU_BLOCK_END();
if (cpu_state.abrt) if (cpu_state.abrt)
{ {
@ -795,6 +800,8 @@ inrecomp=0;
if (trap) if (trap)
CPU_BLOCK_END(); CPU_BLOCK_END();
if (nmi && nmi_enable && nmi_mask)
CPU_BLOCK_END();
if (cpu_state.abrt) if (cpu_state.abrt)
{ {
@ -869,6 +876,19 @@ inrecomp=0;
loadcs(readmemw(0,addr+2)); loadcs(readmemw(0,addr+2));
} }
} }
else if (nmi && nmi_enable && nmi_mask)
{
cpu_state.oldpc = cpu_state.pc;
oldcs = CS;
// pclog("NMI\n");
x86_int(2);
nmi_enable = 0;
if (nmi_auto_clear)
{
nmi_auto_clear = 0;
nmi = 0;
}
}
else if ((flags&I_FLAG) && pic_intpending) else if ((flags&I_FLAG) && pic_intpending)
{ {
temp=picinterrupt(); temp=picinterrupt();

1
src/386_dynarec_ops.c
View file

@ -6,6 +6,7 @@
#include "x87.h" #include "x87.h"
#include "x86_flags.h" #include "x86_flags.h"
#include "mem.h" #include "mem.h"
#include "nmi.h"
#include "pic.h" #include "pic.h"
#include "codegen.h" #include "codegen.h"

24
src/x86_ops_io.h
View file

@ -5,6 +5,8 @@ static int opIN_AL_imm(uint32_t fetchdat)
AL = inb(port); AL = inb(port);
CLOCK_CYCLES(12); CLOCK_CYCLES(12);
PREFETCH_RUN(12, 2, -1, 1,0,0,0, 0); PREFETCH_RUN(12, 2, -1, 1,0,0,0, 0);
if (nmi && nmi_enable && nmi_mask)
return 1;
return 0; return 0;
} }
static int opIN_AX_imm(uint32_t fetchdat) static int opIN_AX_imm(uint32_t fetchdat)
@ -15,6 +17,8 @@ static int opIN_AX_imm(uint32_t fetchdat)
AX = inw(port); AX = inw(port);
CLOCK_CYCLES(12); CLOCK_CYCLES(12);
PREFETCH_RUN(12, 2, -1, 1,0,0,0, 0); PREFETCH_RUN(12, 2, -1, 1,0,0,0, 0);
if (nmi && nmi_enable && nmi_mask)
return 1;
return 0; return 0;
} }
static int opIN_EAX_imm(uint32_t fetchdat) static int opIN_EAX_imm(uint32_t fetchdat)
@ -27,6 +31,8 @@ static int opIN_EAX_imm(uint32_t fetchdat)
EAX = inl(port); EAX = inl(port);
CLOCK_CYCLES(12); CLOCK_CYCLES(12);
PREFETCH_RUN(12, 2, -1, 0,1,0,0, 0); PREFETCH_RUN(12, 2, -1, 0,1,0,0, 0);
if (nmi && nmi_enable && nmi_mask)
return 1;
return 0; return 0;
} }
@ -39,6 +45,8 @@ static int opOUT_AL_imm(uint32_t fetchdat)
PREFETCH_RUN(10, 2, -1, 0,0,1,0, 0); PREFETCH_RUN(10, 2, -1, 0,0,1,0, 0);
if (port == 0x64) if (port == 0x64)
return x86_was_reset; return x86_was_reset;
if (nmi && nmi_enable && nmi_mask)
return 1;
return 0; return 0;
} }
static int opOUT_AX_imm(uint32_t fetchdat) static int opOUT_AX_imm(uint32_t fetchdat)
@ -49,6 +57,8 @@ static int opOUT_AX_imm(uint32_t fetchdat)
outw(port, AX); outw(port, AX);
CLOCK_CYCLES(10); CLOCK_CYCLES(10);
PREFETCH_RUN(10, 2, -1, 0,0,1,0, 0); PREFETCH_RUN(10, 2, -1, 0,0,1,0, 0);
if (nmi && nmi_enable && nmi_mask)
return 1;
return 0; return 0;
} }
static int opOUT_EAX_imm(uint32_t fetchdat) static int opOUT_EAX_imm(uint32_t fetchdat)
@ -61,6 +71,8 @@ static int opOUT_EAX_imm(uint32_t fetchdat)
outl(port, EAX); outl(port, EAX);
CLOCK_CYCLES(10); CLOCK_CYCLES(10);
PREFETCH_RUN(10, 2, -1, 0,0,0,1, 0); PREFETCH_RUN(10, 2, -1, 0,0,0,1, 0);
if (nmi && nmi_enable && nmi_mask)
return 1;
return 0; return 0;
} }
@ -70,6 +82,8 @@ static int opIN_AL_DX(uint32_t fetchdat)
AL = inb(DX); AL = inb(DX);
CLOCK_CYCLES(12); CLOCK_CYCLES(12);
PREFETCH_RUN(12, 1, -1, 1,0,0,0, 0); PREFETCH_RUN(12, 1, -1, 1,0,0,0, 0);
if (nmi && nmi_enable && nmi_mask)
return 1;
return 0; return 0;
} }
static int opIN_AX_DX(uint32_t fetchdat) static int opIN_AX_DX(uint32_t fetchdat)
@ -79,6 +93,8 @@ static int opIN_AX_DX(uint32_t fetchdat)
AX = inw(DX); AX = inw(DX);
CLOCK_CYCLES(12); CLOCK_CYCLES(12);
PREFETCH_RUN(12, 1, -1, 1,0,0,0, 0); PREFETCH_RUN(12, 1, -1, 1,0,0,0, 0);
if (nmi && nmi_enable && nmi_mask)
return 1;
return 0; return 0;
} }
static int opIN_EAX_DX(uint32_t fetchdat) static int opIN_EAX_DX(uint32_t fetchdat)
@ -90,6 +106,8 @@ static int opIN_EAX_DX(uint32_t fetchdat)
EAX = inl(DX); EAX = inl(DX);
CLOCK_CYCLES(12); CLOCK_CYCLES(12);
PREFETCH_RUN(12, 1, -1, 0,1,0,0, 0); PREFETCH_RUN(12, 1, -1, 0,1,0,0, 0);
if (nmi && nmi_enable && nmi_mask)
return 1;
return 0; return 0;
} }
@ -99,6 +117,8 @@ static int opOUT_AL_DX(uint32_t fetchdat)
outb(DX, AL); outb(DX, AL);
CLOCK_CYCLES(11); CLOCK_CYCLES(11);
PREFETCH_RUN(11, 1, -1, 0,0,1,0, 0); PREFETCH_RUN(11, 1, -1, 0,0,1,0, 0);
if (nmi && nmi_enable && nmi_mask)
return 1;
return x86_was_reset; return x86_was_reset;
} }
static int opOUT_AX_DX(uint32_t fetchdat) static int opOUT_AX_DX(uint32_t fetchdat)
@ -109,6 +129,8 @@ static int opOUT_AX_DX(uint32_t fetchdat)
outw(DX, AX); outw(DX, AX);
CLOCK_CYCLES(11); CLOCK_CYCLES(11);
PREFETCH_RUN(11, 1, -1, 0,0,1,0, 0); PREFETCH_RUN(11, 1, -1, 0,0,1,0, 0);
if (nmi && nmi_enable && nmi_mask)
return 1;
return 0; return 0;
} }
static int opOUT_EAX_DX(uint32_t fetchdat) static int opOUT_EAX_DX(uint32_t fetchdat)
@ -119,5 +141,7 @@ static int opOUT_EAX_DX(uint32_t fetchdat)
check_io_perm(DX + 3); check_io_perm(DX + 3);
outl(DX, EAX); outl(DX, EAX);
PREFETCH_RUN(11, 1, -1, 0,0,0,1, 0); PREFETCH_RUN(11, 1, -1, 0,0,0,1, 0);
if (nmi && nmi_enable && nmi_mask)
return 1;
return 0; return 0;
} }