Perform NULL segment checks upfront in opcode handlers, rather than on every memory access.

This removes the need to pass the segment to readmem*l()/writemem*l().
This commit is contained in:
SarahW 2018-07-18 22:10:18 +01:00
commit 0f0a1c3223
31 changed files with 976 additions and 325 deletions

View file

@ -127,6 +127,7 @@ static int opFSTOR_a16(uint32_t fetchdat)
{
FP_ENTER();
fetch_ea_16(fetchdat);
SEG_CHECK_READ(cpu_state.ea_seg);
FSTOR();
return cpu_state.abrt;
}
@ -134,6 +135,7 @@ static int opFSTOR_a32(uint32_t fetchdat)
{
FP_ENTER();
fetch_ea_32(fetchdat);
SEG_CHECK_READ(cpu_state.ea_seg);
FSTOR();
return cpu_state.abrt;
}
@ -287,6 +289,7 @@ static int opFSAVE_a16(uint32_t fetchdat)
{
FP_ENTER();
fetch_ea_16(fetchdat);
SEG_CHECK_WRITE(cpu_state.ea_seg);
FSAVE();
return cpu_state.abrt;
}
@ -294,6 +297,7 @@ static int opFSAVE_a32(uint32_t fetchdat)
{
FP_ENTER();
fetch_ea_32(fetchdat);
SEG_CHECK_WRITE(cpu_state.ea_seg);
FSAVE();
return cpu_state.abrt;
}
@ -302,6 +306,7 @@ static int opFSTSW_a16(uint32_t fetchdat)
{
FP_ENTER();
fetch_ea_16(fetchdat);
SEG_CHECK_WRITE(cpu_state.ea_seg);
if (fplog) pclog("FSTSW %08X:%08X\n", easeg, cpu_state.eaaddr);
seteaw((cpu_state.npxs & 0xC7FF) | (cpu_state.TOP << 11));
CLOCK_CYCLES(3);
@ -311,6 +316,7 @@ static int opFSTSW_a32(uint32_t fetchdat)
{
FP_ENTER();
fetch_ea_32(fetchdat);
SEG_CHECK_WRITE(cpu_state.ea_seg);
if (fplog) pclog("FSTSW %08X:%08X\n", easeg, cpu_state.eaaddr);
seteaw((cpu_state.npxs & 0xC7FF) | (cpu_state.TOP << 11));
CLOCK_CYCLES(3);
@ -698,6 +704,7 @@ static int opFLDENV_a16(uint32_t fetchdat)
{
FP_ENTER();
fetch_ea_16(fetchdat);
SEG_CHECK_READ(cpu_state.ea_seg);
FLDENV();
return cpu_state.abrt;
}
@ -705,6 +712,7 @@ static int opFLDENV_a32(uint32_t fetchdat)
{
FP_ENTER();
fetch_ea_32(fetchdat);
SEG_CHECK_READ(cpu_state.ea_seg);
FLDENV();
return cpu_state.abrt;
}
@ -714,6 +722,7 @@ static int opFLDCW_a16(uint32_t fetchdat)
uint16_t tempw;
FP_ENTER();
fetch_ea_16(fetchdat);
SEG_CHECK_READ(cpu_state.ea_seg);
if (fplog) pclog("FLDCW %08X:%08X\n", easeg, cpu_state.eaaddr);
tempw = geteaw();
if (cpu_state.abrt) return 1;
@ -727,6 +736,7 @@ static int opFLDCW_a32(uint32_t fetchdat)
uint16_t tempw;
FP_ENTER();
fetch_ea_32(fetchdat);
SEG_CHECK_READ(cpu_state.ea_seg);
if (fplog) pclog("FLDCW %08X:%08X\n", easeg, cpu_state.eaaddr);
tempw = geteaw();
if (cpu_state.abrt) return 1;
@ -784,6 +794,7 @@ static int opFSTENV_a16(uint32_t fetchdat)
{
FP_ENTER();
fetch_ea_16(fetchdat);
SEG_CHECK_WRITE(cpu_state.ea_seg);
FSTENV();
return cpu_state.abrt;
}
@ -791,6 +802,7 @@ static int opFSTENV_a32(uint32_t fetchdat)
{
FP_ENTER();
fetch_ea_32(fetchdat);
SEG_CHECK_WRITE(cpu_state.ea_seg);
FSTENV();
return cpu_state.abrt;
}
@ -799,6 +811,7 @@ static int opFSTCW_a16(uint32_t fetchdat)
{
FP_ENTER();
fetch_ea_16(fetchdat);
SEG_CHECK_WRITE(cpu_state.ea_seg);
if (fplog) pclog("FSTCW %08X:%08X\n", easeg, cpu_state.eaaddr);
seteaw(cpu_state.npxc);
CLOCK_CYCLES(3);
@ -808,6 +821,7 @@ static int opFSTCW_a32(uint32_t fetchdat)
{
FP_ENTER();
fetch_ea_32(fetchdat);
SEG_CHECK_WRITE(cpu_state.ea_seg);
if (fplog) pclog("FSTCW %08X:%08X\n", easeg, cpu_state.eaaddr);
seteaw(cpu_state.npxc);
CLOCK_CYCLES(3);