Perform NULL segment checks upfront in opcode handlers, rather than on every memory access.
This removes the need to pass the segment to readmem*l()/writemem*l().
This commit is contained in:
parent
648aa0e3e8
commit
0f0a1c3223
31 changed files with 976 additions and 325 deletions
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@ -127,6 +127,7 @@ static int opFSTOR_a16(uint32_t fetchdat)
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{
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FP_ENTER();
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fetch_ea_16(fetchdat);
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SEG_CHECK_READ(cpu_state.ea_seg);
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FSTOR();
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return cpu_state.abrt;
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}
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@ -134,6 +135,7 @@ static int opFSTOR_a32(uint32_t fetchdat)
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{
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FP_ENTER();
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fetch_ea_32(fetchdat);
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SEG_CHECK_READ(cpu_state.ea_seg);
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FSTOR();
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return cpu_state.abrt;
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}
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@ -287,6 +289,7 @@ static int opFSAVE_a16(uint32_t fetchdat)
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{
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FP_ENTER();
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fetch_ea_16(fetchdat);
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SEG_CHECK_WRITE(cpu_state.ea_seg);
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FSAVE();
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return cpu_state.abrt;
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}
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@ -294,6 +297,7 @@ static int opFSAVE_a32(uint32_t fetchdat)
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{
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FP_ENTER();
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fetch_ea_32(fetchdat);
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SEG_CHECK_WRITE(cpu_state.ea_seg);
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FSAVE();
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return cpu_state.abrt;
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}
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@ -302,6 +306,7 @@ static int opFSTSW_a16(uint32_t fetchdat)
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{
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FP_ENTER();
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fetch_ea_16(fetchdat);
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SEG_CHECK_WRITE(cpu_state.ea_seg);
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if (fplog) pclog("FSTSW %08X:%08X\n", easeg, cpu_state.eaaddr);
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seteaw((cpu_state.npxs & 0xC7FF) | (cpu_state.TOP << 11));
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CLOCK_CYCLES(3);
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@ -311,6 +316,7 @@ static int opFSTSW_a32(uint32_t fetchdat)
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{
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FP_ENTER();
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fetch_ea_32(fetchdat);
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SEG_CHECK_WRITE(cpu_state.ea_seg);
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if (fplog) pclog("FSTSW %08X:%08X\n", easeg, cpu_state.eaaddr);
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seteaw((cpu_state.npxs & 0xC7FF) | (cpu_state.TOP << 11));
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CLOCK_CYCLES(3);
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@ -698,6 +704,7 @@ static int opFLDENV_a16(uint32_t fetchdat)
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{
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FP_ENTER();
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fetch_ea_16(fetchdat);
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SEG_CHECK_READ(cpu_state.ea_seg);
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FLDENV();
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return cpu_state.abrt;
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}
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@ -705,6 +712,7 @@ static int opFLDENV_a32(uint32_t fetchdat)
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{
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FP_ENTER();
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fetch_ea_32(fetchdat);
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SEG_CHECK_READ(cpu_state.ea_seg);
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FLDENV();
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return cpu_state.abrt;
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}
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@ -714,6 +722,7 @@ static int opFLDCW_a16(uint32_t fetchdat)
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uint16_t tempw;
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FP_ENTER();
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fetch_ea_16(fetchdat);
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SEG_CHECK_READ(cpu_state.ea_seg);
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if (fplog) pclog("FLDCW %08X:%08X\n", easeg, cpu_state.eaaddr);
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tempw = geteaw();
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if (cpu_state.abrt) return 1;
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@ -727,6 +736,7 @@ static int opFLDCW_a32(uint32_t fetchdat)
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uint16_t tempw;
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FP_ENTER();
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fetch_ea_32(fetchdat);
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SEG_CHECK_READ(cpu_state.ea_seg);
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if (fplog) pclog("FLDCW %08X:%08X\n", easeg, cpu_state.eaaddr);
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tempw = geteaw();
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if (cpu_state.abrt) return 1;
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@ -784,6 +794,7 @@ static int opFSTENV_a16(uint32_t fetchdat)
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{
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FP_ENTER();
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fetch_ea_16(fetchdat);
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SEG_CHECK_WRITE(cpu_state.ea_seg);
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FSTENV();
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return cpu_state.abrt;
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}
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@ -791,6 +802,7 @@ static int opFSTENV_a32(uint32_t fetchdat)
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{
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FP_ENTER();
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fetch_ea_32(fetchdat);
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SEG_CHECK_WRITE(cpu_state.ea_seg);
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FSTENV();
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return cpu_state.abrt;
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}
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@ -799,6 +811,7 @@ static int opFSTCW_a16(uint32_t fetchdat)
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{
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FP_ENTER();
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fetch_ea_16(fetchdat);
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SEG_CHECK_WRITE(cpu_state.ea_seg);
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if (fplog) pclog("FSTCW %08X:%08X\n", easeg, cpu_state.eaaddr);
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seteaw(cpu_state.npxc);
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CLOCK_CYCLES(3);
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@ -808,6 +821,7 @@ static int opFSTCW_a32(uint32_t fetchdat)
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{
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FP_ENTER();
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fetch_ea_32(fetchdat);
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SEG_CHECK_WRITE(cpu_state.ea_seg);
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if (fplog) pclog("FSTCW %08X:%08X\n", easeg, cpu_state.eaaddr);
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seteaw(cpu_state.npxc);
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CLOCK_CYCLES(3);
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