Perform NULL segment checks upfront in opcode handlers, rather than on every memory access.
This removes the need to pass the segment to readmem*l()/writemem*l().
This commit is contained in:
SarahW
parent
648aa0e3e8
commit
0f0a1c3223
31 changed files with 976 additions and 325 deletions
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@ -9,7 +9,8 @@ static int opREP_INSB_ ## size(uint32_t fetchdat)
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{ \
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uint8_t temp; \
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\
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check_io_perm(DX); \
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SEG_CHECK_WRITE(&_es); \
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check_io_perm(DX); \
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temp = inb(DX); \
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writememb(es, DEST_REG, temp); if (cpu_state.abrt) return 1; \
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\
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@ -36,6 +37,7 @@ static int opREP_INSW_ ## size(uint32_t fetchdat)
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{ \
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uint16_t temp; \
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\
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SEG_CHECK_WRITE(&_es); \
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check_io_perm(DX); \
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check_io_perm(DX+1); \
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temp = inw(DX); \
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@ -64,6 +66,7 @@ static int opREP_INSL_ ## size(uint32_t fetchdat)
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{ \
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uint32_t temp; \
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\
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SEG_CHECK_WRITE(&_es); \
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check_io_perm(DX); \
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check_io_perm(DX+1); \
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check_io_perm(DX+2); \
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@ -93,7 +96,9 @@ static int opREP_OUTSB_ ## size(uint32_t fetchdat)
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\
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if (CNT_REG > 0) \
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{ \
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uint8_t temp = readmemb(cpu_state.ea_seg->base, SRC_REG); if (cpu_state.abrt) return 1; \
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uint8_t temp; \
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SEG_CHECK_READ(cpu_state.ea_seg); \
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temp = readmemb(cpu_state.ea_seg->base, SRC_REG); if (cpu_state.abrt) return 1; \
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check_io_perm(DX); \
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outb(DX, temp); \
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if (flags & D_FLAG) SRC_REG--; \
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@ -117,7 +122,9 @@ static int opREP_OUTSW_ ## size(uint32_t fetchdat)
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\
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if (CNT_REG > 0) \
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{ \
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uint16_t temp = readmemw(cpu_state.ea_seg->base, SRC_REG); if (cpu_state.abrt) return 1; \
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uint16_t temp; \
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SEG_CHECK_READ(cpu_state.ea_seg); \
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temp = readmemw(cpu_state.ea_seg->base, SRC_REG); if (cpu_state.abrt) return 1; \
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check_io_perm(DX); \
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check_io_perm(DX+1); \
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outw(DX, temp); \
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@ -142,7 +149,9 @@ static int opREP_OUTSL_ ## size(uint32_t fetchdat)
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\
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if (CNT_REG > 0) \
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{ \
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uint32_t temp = readmeml(cpu_state.ea_seg->base, SRC_REG); if (cpu_state.abrt) return 1; \
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uint32_t temp; \
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SEG_CHECK_READ(cpu_state.ea_seg); \
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temp = readmeml(cpu_state.ea_seg->base, SRC_REG); if (cpu_state.abrt) return 1; \
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check_io_perm(DX); \
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check_io_perm(DX+1); \
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check_io_perm(DX+2); \
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@ -170,6 +179,11 @@ static int opREP_MOVSB_ ## size(uint32_t fetchdat)
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int cycles_end = cycles - ((is386 && cpu_use_dynarec) ? 1000 : 100); \
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if (trap) \
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cycles_end = cycles+1; /*Force the instruction to end after only one iteration when trap flag set*/ \
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if (CNT_REG > 0) \
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{ \
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SEG_CHECK_READ(cpu_state.ea_seg); \
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SEG_CHECK_WRITE(&_es); \
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} \
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while (CNT_REG > 0) \
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{ \
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uint8_t temp; \
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@ -203,6 +217,11 @@ static int opREP_MOVSW_ ## size(uint32_t fetchdat)
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int cycles_end = cycles - ((is386 && cpu_use_dynarec) ? 1000 : 100); \
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if (trap) \
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cycles_end = cycles+1; /*Force the instruction to end after only one iteration when trap flag set*/ \
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if (CNT_REG > 0) \
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{ \
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SEG_CHECK_READ(cpu_state.ea_seg); \
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SEG_CHECK_WRITE(&_es); \
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} \
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while (CNT_REG > 0) \
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{ \
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uint16_t temp; \
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@ -236,6 +255,11 @@ static int opREP_MOVSL_ ## size(uint32_t fetchdat)
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int cycles_end = cycles - ((is386 && cpu_use_dynarec) ? 1000 : 100); \
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if (trap) \
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cycles_end = cycles+1; /*Force the instruction to end after only one iteration when trap flag set*/ \
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if (CNT_REG > 0) \
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{ \
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SEG_CHECK_READ(cpu_state.ea_seg); \
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SEG_CHECK_WRITE(&_es); \
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} \
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while (CNT_REG > 0) \
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{ \
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uint32_t temp; \
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@ -271,6 +295,8 @@ static int opREP_STOSB_ ## size(uint32_t fetchdat)
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int cycles_end = cycles - ((is386 && cpu_use_dynarec) ? 1000 : 100); \
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if (trap) \
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cycles_end = cycles+1; /*Force the instruction to end after only one iteration when trap flag set*/ \
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if (CNT_REG > 0) \
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SEG_CHECK_WRITE(&_es); \
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while (CNT_REG > 0) \
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{ \
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CHECK_WRITE_REP(&_es, DEST_REG, DEST_REG); \
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@ -299,6 +325,8 @@ static int opREP_STOSW_ ## size(uint32_t fetchdat)
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int cycles_end = cycles - ((is386 && cpu_use_dynarec) ? 1000 : 100); \
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if (trap) \
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cycles_end = cycles+1; /*Force the instruction to end after only one iteration when trap flag set*/ \
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if (CNT_REG > 0) \
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SEG_CHECK_WRITE(&_es); \
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while (CNT_REG > 0) \
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{ \
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CHECK_WRITE_REP(&_es, DEST_REG, DEST_REG+1); \
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@ -327,6 +355,8 @@ static int opREP_STOSL_ ## size(uint32_t fetchdat)
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int cycles_end = cycles - ((is386 && cpu_use_dynarec) ? 1000 : 100); \
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if (trap) \
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cycles_end = cycles+1; /*Force the instruction to end after only one iteration when trap flag set*/ \
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if (CNT_REG > 0) \
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SEG_CHECK_WRITE(&_es); \
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while (CNT_REG > 0) \
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{ \
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CHECK_WRITE_REP(&_es, DEST_REG, DEST_REG+3); \
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@ -356,6 +386,8 @@ static int opREP_LODSB_ ## size(uint32_t fetchdat)
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int cycles_end = cycles - ((is386 && cpu_use_dynarec) ? 1000 : 100); \
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if (trap) \
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cycles_end = cycles+1; /*Force the instruction to end after only one iteration when trap flag set*/ \
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if (CNT_REG > 0) \
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SEG_CHECK_READ(cpu_state.ea_seg); \
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while (CNT_REG > 0) \
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{ \
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AL = readmemb(cpu_state.ea_seg->base, SRC_REG); if (cpu_state.abrt) return 1; \
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@ -383,6 +415,8 @@ static int opREP_LODSW_ ## size(uint32_t fetchdat)
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int cycles_end = cycles - ((is386 && cpu_use_dynarec) ? 1000 : 100); \
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if (trap) \
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cycles_end = cycles+1; /*Force the instruction to end after only one iteration when trap flag set*/ \
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if (CNT_REG > 0) \
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SEG_CHECK_READ(cpu_state.ea_seg); \
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while (CNT_REG > 0) \
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{ \
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AX = readmemw(cpu_state.ea_seg->base, SRC_REG); if (cpu_state.abrt) return 1; \
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@ -410,6 +444,8 @@ static int opREP_LODSL_ ## size(uint32_t fetchdat)
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int cycles_end = cycles - ((is386 && cpu_use_dynarec) ? 1000 : 100); \
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if (trap) \
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cycles_end = cycles+1; /*Force the instruction to end after only one iteration when trap flag set*/ \
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if (CNT_REG > 0) \
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SEG_CHECK_READ(cpu_state.ea_seg); \
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while (CNT_REG > 0) \
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{ \
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EAX = readmeml(cpu_state.ea_seg->base, SRC_REG); if (cpu_state.abrt) return 1; \
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@ -441,8 +477,11 @@ static int opREP_CMPSB_ ## size(uint32_t fetchdat)
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tempz = FV; \
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if ((CNT_REG > 0) && (FV == tempz)) \
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{ \
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uint8_t temp = readmemb(cpu_state.ea_seg->base, SRC_REG); \
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uint8_t temp2 = readmemb(es, DEST_REG); if (cpu_state.abrt) return 1; \
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uint8_t temp, temp2; \
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SEG_CHECK_READ(cpu_state.ea_seg); \
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SEG_CHECK_READ(&_es); \
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temp = readmemb(cpu_state.ea_seg->base, SRC_REG); \
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temp2 = readmemb(es, DEST_REG); if (cpu_state.abrt) return 1; \
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\
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if (flags & D_FLAG) { DEST_REG--; SRC_REG--; } \
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else { DEST_REG++; SRC_REG++; } \
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@ -468,8 +507,11 @@ static int opREP_CMPSW_ ## size(uint32_t fetchdat)
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tempz = FV; \
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if ((CNT_REG > 0) && (FV == tempz)) \
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{ \
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uint16_t temp = readmemw(cpu_state.ea_seg->base, SRC_REG); \
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uint16_t temp2 = readmemw(es, DEST_REG); if (cpu_state.abrt) return 1; \
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uint16_t temp, temp2; \
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SEG_CHECK_READ(cpu_state.ea_seg); \
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SEG_CHECK_READ(&_es); \
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temp = readmemw(cpu_state.ea_seg->base, SRC_REG); \
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temp2 = readmemw(es, DEST_REG); if (cpu_state.abrt) return 1; \
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\
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if (flags & D_FLAG) { DEST_REG -= 2; SRC_REG -= 2; } \
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else { DEST_REG += 2; SRC_REG += 2; } \
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@ -495,8 +537,11 @@ static int opREP_CMPSL_ ## size(uint32_t fetchdat)
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tempz = FV; \
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if ((CNT_REG > 0) && (FV == tempz)) \
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{ \
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uint32_t temp = readmeml(cpu_state.ea_seg->base, SRC_REG); \
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uint32_t temp2 = readmeml(es, DEST_REG); if (cpu_state.abrt) return 1; \
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uint32_t temp, temp2; \
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SEG_CHECK_READ(cpu_state.ea_seg); \
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SEG_CHECK_READ(&_es); \
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temp = readmeml(cpu_state.ea_seg->base, SRC_REG); \
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temp2 = readmeml(es, DEST_REG); if (cpu_state.abrt) return 1; \
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\
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if (flags & D_FLAG) { DEST_REG -= 4; SRC_REG -= 4; } \
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else { DEST_REG += 4; SRC_REG += 4; } \
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@ -523,6 +568,8 @@ static int opREP_SCASB_ ## size(uint32_t fetchdat)
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if (trap) \
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cycles_end = cycles+1; /*Force the instruction to end after only one iteration when trap flag set*/ \
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tempz = FV; \
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if ((CNT_REG > 0) && (FV == tempz)) \
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SEG_CHECK_READ(&_es); \
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while ((CNT_REG > 0) && (FV == tempz)) \
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{ \
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uint8_t temp = readmemb(es, DEST_REG); if (cpu_state.abrt) break;\
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@ -554,6 +601,8 @@ static int opREP_SCASW_ ## size(uint32_t fetchdat)
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if (trap) \
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cycles_end = cycles+1; /*Force the instruction to end after only one iteration when trap flag set*/ \
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tempz = FV; \
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if ((CNT_REG > 0) && (FV == tempz)) \
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SEG_CHECK_READ(&_es); \
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while ((CNT_REG > 0) && (FV == tempz)) \
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{ \
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uint16_t temp = readmemw(es, DEST_REG); if (cpu_state.abrt) break;\
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@ -585,6 +634,8 @@ static int opREP_SCASL_ ## size(uint32_t fetchdat)
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if (trap) \
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cycles_end = cycles+1; /*Force the instruction to end after only one iteration when trap flag set*/ \
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tempz = FV; \
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if ((CNT_REG > 0) && (FV == tempz)) \
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SEG_CHECK_READ(&_es); \
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while ((CNT_REG > 0) && (FV == tempz)) \
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{ \
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uint32_t temp = readmeml(es, DEST_REG); if (cpu_state.abrt) break;\
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