Perform NULL segment checks upfront in opcode handlers, rather than on every memory access.
This removes the need to pass the segment to readmem*l()/writemem*l().
This commit is contained in:
SarahW
parent
648aa0e3e8
commit
0f0a1c3223
31 changed files with 976 additions and 325 deletions
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@ -14,9 +14,11 @@
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} \
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else \
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{ \
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uint8_t dst = geteab(); if (cpu_state.abrt) return 1; \
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uint8_t dst; \
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SEG_CHECK_WRITE(cpu_state.ea_seg); \
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dst = geteab(); if (cpu_state.abrt) return 1; \
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uint8_t src = getr8(cpu_reg); \
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seteab(operation); if (cpu_state.abrt) return 1; \
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seteab(operation); if (cpu_state.abrt) return 1; \
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setflags ## 8 flagops; \
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CLOCK_CYCLES(timing_mr); \
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PREFETCH_RUN(timing_mr, 2, rmdat, 1,0,1,0, 0); \
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@ -38,7 +40,9 @@
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} \
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else \
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{ \
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uint8_t dst = geteab(); if (cpu_state.abrt) return 1; \
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uint8_t dst; \
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SEG_CHECK_WRITE(cpu_state.ea_seg); \
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dst = geteab(); if (cpu_state.abrt) return 1; \
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uint8_t src = getr8(cpu_reg); \
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seteab(operation); if (cpu_state.abrt) return 1; \
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setflags ## 8 flagops; \
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@ -63,7 +67,9 @@
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} \
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else \
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{ \
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uint16_t dst = geteaw(); if (cpu_state.abrt) return 1; \
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uint16_t dst; \
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SEG_CHECK_WRITE(cpu_state.ea_seg); \
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dst = geteaw(); if (cpu_state.abrt) return 1; \
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uint16_t src = cpu_state.regs[cpu_reg].w; \
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seteaw(operation); if (cpu_state.abrt) return 1; \
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setflags ## 16 flagops; \
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@ -87,7 +93,9 @@
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} \
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else \
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{ \
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uint16_t dst = geteaw(); if (cpu_state.abrt) return 1; \
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uint16_t dst; \
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SEG_CHECK_WRITE(cpu_state.ea_seg); \
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dst = geteaw(); if (cpu_state.abrt) return 1; \
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uint16_t src = cpu_state.regs[cpu_reg].w; \
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seteaw(operation); if (cpu_state.abrt) return 1; \
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setflags ## 16 flagops; \
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@ -112,7 +120,9 @@
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} \
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else \
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{ \
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uint32_t dst = geteal(); if (cpu_state.abrt) return 1; \
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uint32_t dst; \
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SEG_CHECK_WRITE(cpu_state.ea_seg); \
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dst = geteal(); if (cpu_state.abrt) return 1; \
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uint32_t src = cpu_state.regs[cpu_reg].l; \
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seteal(operation); if (cpu_state.abrt) return 1; \
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setflags ## 32 flagops; \
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@ -136,7 +146,9 @@
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} \
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else \
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{ \
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uint32_t dst = geteal(); if (cpu_state.abrt) return 1; \
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uint32_t dst; \
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SEG_CHECK_WRITE(cpu_state.ea_seg); \
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dst = geteal(); if (cpu_state.abrt) return 1; \
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uint32_t src = cpu_state.regs[cpu_reg].l; \
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seteal(operation); if (cpu_state.abrt) return 1; \
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setflags ## 32 flagops; \
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@ -151,6 +163,8 @@
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uint8_t dst, src; \
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if (gettempc) tempc = CF_SET() ? 1 : 0; \
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fetch_ea_16(fetchdat); \
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if (cpu_mod != 3) \
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SEG_CHECK_READ(cpu_state.ea_seg); \
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dst = getr8(cpu_reg); \
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src = geteab(); if (cpu_state.abrt) return 1; \
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setflags ## 8 flagops; \
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@ -164,6 +178,8 @@
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uint8_t dst, src; \
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if (gettempc) tempc = CF_SET() ? 1 : 0; \
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fetch_ea_32(fetchdat); \
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if (cpu_mod != 3) \
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SEG_CHECK_READ(cpu_state.ea_seg); \
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dst = getr8(cpu_reg); \
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src = geteab(); if (cpu_state.abrt) return 1; \
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setflags ## 8 flagops; \
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@ -178,6 +194,8 @@
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uint16_t dst, src; \
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if (gettempc) tempc = CF_SET() ? 1 : 0; \
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fetch_ea_16(fetchdat); \
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if (cpu_mod != 3) \
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SEG_CHECK_READ(cpu_state.ea_seg); \
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dst = cpu_state.regs[cpu_reg].w; \
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src = geteaw(); if (cpu_state.abrt) return 1; \
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setflags ## 16 flagops; \
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@ -191,6 +209,8 @@
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uint16_t dst, src; \
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if (gettempc) tempc = CF_SET() ? 1 : 0; \
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fetch_ea_32(fetchdat); \
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if (cpu_mod != 3) \
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SEG_CHECK_READ(cpu_state.ea_seg); \
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dst = cpu_state.regs[cpu_reg].w; \
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src = geteaw(); if (cpu_state.abrt) return 1; \
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setflags ## 16 flagops; \
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@ -205,6 +225,8 @@
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uint32_t dst, src; \
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if (gettempc) tempc = CF_SET() ? 1 : 0; \
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fetch_ea_16(fetchdat); \
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if (cpu_mod != 3) \
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SEG_CHECK_READ(cpu_state.ea_seg); \
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dst = cpu_state.regs[cpu_reg].l; \
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src = geteal(); if (cpu_state.abrt) return 1; \
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setflags ## 32 flagops; \
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@ -218,6 +240,8 @@
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uint32_t dst, src; \
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if (gettempc) tempc = CF_SET() ? 1 : 0; \
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fetch_ea_32(fetchdat); \
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if (cpu_mod != 3) \
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SEG_CHECK_READ(cpu_state.ea_seg); \
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dst = cpu_state.regs[cpu_reg].l; \
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src = geteal(); if (cpu_state.abrt) return 1; \
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setflags ## 32 flagops; \
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@ -275,6 +299,8 @@ static int opCMP_b_rmw_a16(uint32_t fetchdat)
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{
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uint8_t dst;
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fetch_ea_16(fetchdat);
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if (cpu_mod != 3)
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SEG_CHECK_READ(cpu_state.ea_seg);
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dst = geteab(); if (cpu_state.abrt) return 1;
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setsub8(dst, getr8(cpu_reg));
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if (is486) CLOCK_CYCLES((cpu_mod == 3) ? 1 : 2);
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@ -286,6 +312,8 @@ static int opCMP_b_rmw_a32(uint32_t fetchdat)
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{
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uint8_t dst;
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fetch_ea_32(fetchdat);
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if (cpu_mod != 3)
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SEG_CHECK_READ(cpu_state.ea_seg);
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dst = geteab(); if (cpu_state.abrt) return 1;
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setsub8(dst, getr8(cpu_reg));
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if (is486) CLOCK_CYCLES((cpu_mod == 3) ? 1 : 2);
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@ -298,6 +326,8 @@ static int opCMP_w_rmw_a16(uint32_t fetchdat)
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{
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uint16_t dst;
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fetch_ea_16(fetchdat);
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if (cpu_mod != 3)
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SEG_CHECK_READ(cpu_state.ea_seg);
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dst = geteaw(); if (cpu_state.abrt) return 1;
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setsub16(dst, cpu_state.regs[cpu_reg].w);
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if (is486) CLOCK_CYCLES((cpu_mod == 3) ? 1 : 2);
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@ -309,6 +339,8 @@ static int opCMP_w_rmw_a32(uint32_t fetchdat)
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{
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uint16_t dst;
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fetch_ea_32(fetchdat);
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if (cpu_mod != 3)
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SEG_CHECK_READ(cpu_state.ea_seg);
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dst = geteaw(); if (cpu_state.abrt) return 1;
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setsub16(dst, cpu_state.regs[cpu_reg].w);
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if (is486) CLOCK_CYCLES((cpu_mod == 3) ? 1 : 2);
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@ -321,6 +353,8 @@ static int opCMP_l_rmw_a16(uint32_t fetchdat)
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{
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uint32_t dst;
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fetch_ea_16(fetchdat);
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if (cpu_mod != 3)
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SEG_CHECK_READ(cpu_state.ea_seg);
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dst = geteal(); if (cpu_state.abrt) return 1;
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setsub32(dst, cpu_state.regs[cpu_reg].l);
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if (is486) CLOCK_CYCLES((cpu_mod == 3) ? 1 : 2);
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@ -332,6 +366,8 @@ static int opCMP_l_rmw_a32(uint32_t fetchdat)
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{
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uint32_t dst;
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fetch_ea_32(fetchdat);
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if (cpu_mod != 3)
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SEG_CHECK_READ(cpu_state.ea_seg);
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dst = geteal(); if (cpu_state.abrt) return 1;
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setsub32(dst, cpu_state.regs[cpu_reg].l);
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if (is486) CLOCK_CYCLES((cpu_mod == 3) ? 1 : 2);
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@ -344,7 +380,9 @@ static int opCMP_b_rm_a16(uint32_t fetchdat)
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{
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uint8_t src;
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fetch_ea_16(fetchdat);
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src = geteab(); if (cpu_state.abrt) return 1;
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if (cpu_mod != 3)
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SEG_CHECK_READ(cpu_state.ea_seg);
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src = geteab(); if (cpu_state.abrt) return 1;
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setsub8(getr8(cpu_reg), src);
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CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_rm);
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PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_rm, 2, rmdat, (cpu_mod == 3) ? 0 : 1,0,0,0, 0);
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@ -354,7 +392,9 @@ static int opCMP_b_rm_a32(uint32_t fetchdat)
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{
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uint8_t src;
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fetch_ea_32(fetchdat);
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src = geteab(); if (cpu_state.abrt) return 1;
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if (cpu_mod != 3)
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SEG_CHECK_READ(cpu_state.ea_seg);
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src = geteab(); if (cpu_state.abrt) return 1;
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setsub8(getr8(cpu_reg), src);
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CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_rm);
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PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_rm, 2, rmdat, (cpu_mod == 3) ? 0 : 1,0,0,0, 1);
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@ -365,7 +405,9 @@ static int opCMP_w_rm_a16(uint32_t fetchdat)
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{
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uint16_t src;
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fetch_ea_16(fetchdat);
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src = geteaw(); if (cpu_state.abrt) return 1;
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if (cpu_mod != 3)
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SEG_CHECK_READ(cpu_state.ea_seg);
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src = geteaw(); if (cpu_state.abrt) return 1;
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setsub16(cpu_state.regs[cpu_reg].w, src);
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CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_rm);
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PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_rm, 2, rmdat, (cpu_mod == 3) ? 0 : 1,0,0,0, 0);
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@ -375,7 +417,9 @@ static int opCMP_w_rm_a32(uint32_t fetchdat)
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{
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uint16_t src;
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fetch_ea_32(fetchdat);
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src = geteaw(); if (cpu_state.abrt) return 1;
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if (cpu_mod != 3)
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SEG_CHECK_READ(cpu_state.ea_seg);
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src = geteaw(); if (cpu_state.abrt) return 1;
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setsub16(cpu_state.regs[cpu_reg].w, src);
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CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_rm);
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PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_rm, 2, rmdat, (cpu_mod == 3) ? 0 : 1,0,0,0, 1);
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@ -386,7 +430,9 @@ static int opCMP_l_rm_a16(uint32_t fetchdat)
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{
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uint32_t src;
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fetch_ea_16(fetchdat);
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src = geteal(); if (cpu_state.abrt) return 1;
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if (cpu_mod != 3)
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SEG_CHECK_READ(cpu_state.ea_seg);
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src = geteal(); if (cpu_state.abrt) return 1;
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setsub32(cpu_state.regs[cpu_reg].l, src);
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CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_rml);
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PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_rm, 2, rmdat, 0, (cpu_mod == 3) ? 0 : 1,0,0, 0);
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@ -396,7 +442,9 @@ static int opCMP_l_rm_a32(uint32_t fetchdat)
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{
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uint32_t src;
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fetch_ea_32(fetchdat);
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src = geteal(); if (cpu_state.abrt) return 1;
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if (cpu_mod != 3)
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SEG_CHECK_READ(cpu_state.ea_seg);
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src = geteal(); if (cpu_state.abrt) return 1;
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setsub32(cpu_state.regs[cpu_reg].l, src);
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CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_rml);
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PREFETCH_RUN((cpu_mod == 3) ? timing_rr : timing_rm, 2, rmdat, 0, (cpu_mod == 3) ? 0 : 1,0,0, 1);
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@ -434,6 +482,8 @@ static int opTEST_b_a16(uint32_t fetchdat)
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{
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uint8_t temp, temp2;
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fetch_ea_16(fetchdat);
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if (cpu_mod != 3)
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SEG_CHECK_READ(cpu_state.ea_seg);
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temp = geteab(); if (cpu_state.abrt) return 1;
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temp2 = getr8(cpu_reg);
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setznp8(temp & temp2);
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@ -446,6 +496,8 @@ static int opTEST_b_a32(uint32_t fetchdat)
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{
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uint8_t temp, temp2;
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fetch_ea_32(fetchdat);
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if (cpu_mod != 3)
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SEG_CHECK_READ(cpu_state.ea_seg);
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temp = geteab(); if (cpu_state.abrt) return 1;
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temp2 = getr8(cpu_reg);
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setznp8(temp & temp2);
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@ -459,6 +511,8 @@ static int opTEST_w_a16(uint32_t fetchdat)
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{
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uint16_t temp, temp2;
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fetch_ea_16(fetchdat);
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if (cpu_mod != 3)
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SEG_CHECK_READ(cpu_state.ea_seg);
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temp = geteaw(); if (cpu_state.abrt) return 1;
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temp2 = cpu_state.regs[cpu_reg].w;
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setznp16(temp & temp2);
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@ -471,6 +525,8 @@ static int opTEST_w_a32(uint32_t fetchdat)
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{
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uint16_t temp, temp2;
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fetch_ea_32(fetchdat);
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if (cpu_mod != 3)
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SEG_CHECK_READ(cpu_state.ea_seg);
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temp = geteaw(); if (cpu_state.abrt) return 1;
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temp2 = cpu_state.regs[cpu_reg].w;
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setznp16(temp & temp2);
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@ -484,6 +540,8 @@ static int opTEST_l_a16(uint32_t fetchdat)
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{
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uint32_t temp, temp2;
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fetch_ea_16(fetchdat);
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if (cpu_mod != 3)
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SEG_CHECK_READ(cpu_state.ea_seg);
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temp = geteal(); if (cpu_state.abrt) return 1;
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temp2 = cpu_state.regs[cpu_reg].l;
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setznp32(temp & temp2);
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@ -496,6 +554,8 @@ static int opTEST_l_a32(uint32_t fetchdat)
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{
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uint32_t temp, temp2;
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fetch_ea_32(fetchdat);
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if (cpu_mod != 3)
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SEG_CHECK_READ(cpu_state.ea_seg);
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temp = geteal(); if (cpu_state.abrt) return 1;
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temp2 = cpu_state.regs[cpu_reg].l;
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setznp32(temp & temp2);
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@ -588,6 +648,8 @@ static int op80_a16(uint32_t fetchdat)
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uint8_t src, dst;
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fetch_ea_16(fetchdat);
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if (cpu_mod != 3)
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SEG_CHECK_WRITE(cpu_state.ea_seg);
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src = getbyte(); if (cpu_state.abrt) return 1;
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ARITH_MULTI(b, 8);
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if ((rmdat & 0x38) == 0x38)
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@ -602,6 +664,8 @@ static int op80_a32(uint32_t fetchdat)
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uint8_t src, dst;
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fetch_ea_32(fetchdat);
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if (cpu_mod != 3)
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SEG_CHECK_WRITE(cpu_state.ea_seg);
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src = getbyte(); if (cpu_state.abrt) return 1;
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ARITH_MULTI(b, 8);
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if ((rmdat & 0x38) == 0x38)
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@ -616,6 +680,8 @@ static int op81_w_a16(uint32_t fetchdat)
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uint16_t src, dst;
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fetch_ea_16(fetchdat);
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if (cpu_mod != 3)
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SEG_CHECK_WRITE(cpu_state.ea_seg);
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src = getword(); if (cpu_state.abrt) return 1;
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ARITH_MULTI(w, 16);
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if ((rmdat & 0x38) == 0x38)
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@ -630,6 +696,8 @@ static int op81_w_a32(uint32_t fetchdat)
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uint16_t src, dst;
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fetch_ea_32(fetchdat);
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if (cpu_mod != 3)
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SEG_CHECK_WRITE(cpu_state.ea_seg);
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src = getword(); if (cpu_state.abrt) return 1;
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ARITH_MULTI(w, 16);
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if ((rmdat & 0x38) == 0x38)
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@ -644,6 +712,8 @@ static int op81_l_a16(uint32_t fetchdat)
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uint32_t src, dst;
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fetch_ea_16(fetchdat);
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if (cpu_mod != 3)
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SEG_CHECK_WRITE(cpu_state.ea_seg);
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src = getlong(); if (cpu_state.abrt) return 1;
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ARITH_MULTI(l, 32);
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if ((rmdat & 0x38) == 0x38)
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@ -658,6 +728,8 @@ static int op81_l_a32(uint32_t fetchdat)
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uint32_t src, dst;
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fetch_ea_32(fetchdat);
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if (cpu_mod != 3)
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SEG_CHECK_WRITE(cpu_state.ea_seg);
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src = getlong(); if (cpu_state.abrt) return 1;
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ARITH_MULTI(l, 32);
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if ((rmdat & 0x38) == 0x38)
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@ -673,6 +745,8 @@ static int op83_w_a16(uint32_t fetchdat)
|
|||
uint16_t src, dst;
|
||||
|
||||
fetch_ea_16(fetchdat);
|
||||
if (cpu_mod != 3)
|
||||
SEG_CHECK_WRITE(cpu_state.ea_seg);
|
||||
src = getbyte(); if (cpu_state.abrt) return 1;
|
||||
if (src & 0x80) src |= 0xff00;
|
||||
ARITH_MULTI(w, 16);
|
||||
|
|
@ -688,6 +762,8 @@ static int op83_w_a32(uint32_t fetchdat)
|
|||
uint16_t src, dst;
|
||||
|
||||
fetch_ea_32(fetchdat);
|
||||
if (cpu_mod != 3)
|
||||
SEG_CHECK_WRITE(cpu_state.ea_seg);
|
||||
src = getbyte(); if (cpu_state.abrt) return 1;
|
||||
if (src & 0x80) src |= 0xff00;
|
||||
ARITH_MULTI(w, 16);
|
||||
|
|
@ -704,6 +780,8 @@ static int op83_l_a16(uint32_t fetchdat)
|
|||
uint32_t src, dst;
|
||||
|
||||
fetch_ea_16(fetchdat);
|
||||
if (cpu_mod != 3)
|
||||
SEG_CHECK_WRITE(cpu_state.ea_seg);
|
||||
src = getbyte(); if (cpu_state.abrt) return 1;
|
||||
if (src & 0x80) src |= 0xffffff00;
|
||||
ARITH_MULTI(l, 32);
|
||||
|
|
@ -719,6 +797,8 @@ static int op83_l_a32(uint32_t fetchdat)
|
|||
uint32_t src, dst;
|
||||
|
||||
fetch_ea_32(fetchdat);
|
||||
if (cpu_mod != 3)
|
||||
SEG_CHECK_WRITE(cpu_state.ea_seg);
|
||||
src = getbyte(); if (cpu_state.abrt) return 1;
|
||||
if (src & 0x80) src |= 0xffffff00;
|
||||
ARITH_MULTI(l, 32);
|
||||
|
|
|
|||
Loading…
Reference in a new issue