Add emulation of System Management Mode.
This commit is contained in:
parent
70ab938439
commit
0cbbd22c88
8 changed files with 295 additions and 38 deletions
|
|
@ -5,6 +5,8 @@ static int opIN_AL_imm(uint32_t fetchdat)
|
|||
AL = inb(port);
|
||||
CLOCK_CYCLES(12);
|
||||
PREFETCH_RUN(12, 2, -1, 1,0,0,0, 0);
|
||||
if (cpu_state.smi_pending)
|
||||
return 1;
|
||||
if (nmi && nmi_enable && nmi_mask)
|
||||
return 1;
|
||||
return 0;
|
||||
|
|
@ -17,6 +19,8 @@ static int opIN_AX_imm(uint32_t fetchdat)
|
|||
AX = inw(port);
|
||||
CLOCK_CYCLES(12);
|
||||
PREFETCH_RUN(12, 2, -1, 1,0,0,0, 0);
|
||||
if (cpu_state.smi_pending)
|
||||
return 1;
|
||||
if (nmi && nmi_enable && nmi_mask)
|
||||
return 1;
|
||||
return 0;
|
||||
|
|
@ -31,6 +35,8 @@ static int opIN_EAX_imm(uint32_t fetchdat)
|
|||
EAX = inl(port);
|
||||
CLOCK_CYCLES(12);
|
||||
PREFETCH_RUN(12, 2, -1, 0,1,0,0, 0);
|
||||
if (cpu_state.smi_pending)
|
||||
return 1;
|
||||
if (nmi && nmi_enable && nmi_mask)
|
||||
return 1;
|
||||
return 0;
|
||||
|
|
@ -43,10 +49,12 @@ static int opOUT_AL_imm(uint32_t fetchdat)
|
|||
outb(port, AL);
|
||||
CLOCK_CYCLES(10);
|
||||
PREFETCH_RUN(10, 2, -1, 0,0,1,0, 0);
|
||||
if (port == 0x64)
|
||||
return x86_was_reset;
|
||||
if (cpu_state.smi_pending)
|
||||
return 1;
|
||||
if (nmi && nmi_enable && nmi_mask)
|
||||
return 1;
|
||||
if (port == 0x64)
|
||||
return x86_was_reset;
|
||||
return 0;
|
||||
}
|
||||
static int opOUT_AX_imm(uint32_t fetchdat)
|
||||
|
|
@ -57,6 +65,8 @@ static int opOUT_AX_imm(uint32_t fetchdat)
|
|||
outw(port, AX);
|
||||
CLOCK_CYCLES(10);
|
||||
PREFETCH_RUN(10, 2, -1, 0,0,1,0, 0);
|
||||
if (cpu_state.smi_pending)
|
||||
return 1;
|
||||
if (nmi && nmi_enable && nmi_mask)
|
||||
return 1;
|
||||
return 0;
|
||||
|
|
@ -71,6 +81,8 @@ static int opOUT_EAX_imm(uint32_t fetchdat)
|
|||
outl(port, EAX);
|
||||
CLOCK_CYCLES(10);
|
||||
PREFETCH_RUN(10, 2, -1, 0,0,0,1, 0);
|
||||
if (cpu_state.smi_pending)
|
||||
return 1;
|
||||
if (nmi && nmi_enable && nmi_mask)
|
||||
return 1;
|
||||
return 0;
|
||||
|
|
@ -82,6 +94,8 @@ static int opIN_AL_DX(uint32_t fetchdat)
|
|||
AL = inb(DX);
|
||||
CLOCK_CYCLES(12);
|
||||
PREFETCH_RUN(12, 1, -1, 1,0,0,0, 0);
|
||||
if (cpu_state.smi_pending)
|
||||
return 1;
|
||||
if (nmi && nmi_enable && nmi_mask)
|
||||
return 1;
|
||||
return 0;
|
||||
|
|
@ -93,6 +107,8 @@ static int opIN_AX_DX(uint32_t fetchdat)
|
|||
AX = inw(DX);
|
||||
CLOCK_CYCLES(12);
|
||||
PREFETCH_RUN(12, 1, -1, 1,0,0,0, 0);
|
||||
if (cpu_state.smi_pending)
|
||||
return 1;
|
||||
if (nmi && nmi_enable && nmi_mask)
|
||||
return 1;
|
||||
return 0;
|
||||
|
|
@ -106,6 +122,8 @@ static int opIN_EAX_DX(uint32_t fetchdat)
|
|||
EAX = inl(DX);
|
||||
CLOCK_CYCLES(12);
|
||||
PREFETCH_RUN(12, 1, -1, 0,1,0,0, 0);
|
||||
if (cpu_state.smi_pending)
|
||||
return 1;
|
||||
if (nmi && nmi_enable && nmi_mask)
|
||||
return 1;
|
||||
return 0;
|
||||
|
|
@ -117,6 +135,8 @@ static int opOUT_AL_DX(uint32_t fetchdat)
|
|||
outb(DX, AL);
|
||||
CLOCK_CYCLES(11);
|
||||
PREFETCH_RUN(11, 1, -1, 0,0,1,0, 0);
|
||||
if (cpu_state.smi_pending)
|
||||
return 1;
|
||||
if (nmi && nmi_enable && nmi_mask)
|
||||
return 1;
|
||||
return x86_was_reset;
|
||||
|
|
@ -129,6 +149,8 @@ static int opOUT_AX_DX(uint32_t fetchdat)
|
|||
outw(DX, AX);
|
||||
CLOCK_CYCLES(11);
|
||||
PREFETCH_RUN(11, 1, -1, 0,0,1,0, 0);
|
||||
if (cpu_state.smi_pending)
|
||||
return 1;
|
||||
if (nmi && nmi_enable && nmi_mask)
|
||||
return 1;
|
||||
return 0;
|
||||
|
|
@ -141,6 +163,8 @@ static int opOUT_EAX_DX(uint32_t fetchdat)
|
|||
check_io_perm(DX + 3);
|
||||
outl(DX, EAX);
|
||||
PREFETCH_RUN(11, 1, -1, 0,0,0,1, 0);
|
||||
if (cpu_state.smi_pending)
|
||||
return 1;
|
||||
if (nmi && nmi_enable && nmi_mask)
|
||||
return 1;
|
||||
return 0;
|
||||
|
|
|
|||
Loading…
Reference in a new issue