Add FDC37C932FR SuperIO for Epox P55-VA.
This commit is contained in:
SarahW
parent
846103d310
commit
0b57135b3c
6 changed files with 259 additions and 4 deletions
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@ -32,7 +32,7 @@ codegen_ops_mmx_logic.c codegen_ops_mmx_pack.c codegen_ops_mmx_shift.c codegen_o
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codegen_ops_logic.c codegen_ops_shift.c codegen_ops_misc.c codegen_ops_mov.c codegen_ops_stack.c codegen_reg.c \
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codegen_timing_486.c codegen_timing_686.c codegen_timing_common.c codegen_timing_k6.c codegen_timing_pentium.c \
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codegen_timing_winchip.c codegen_timing_winchip2.c compaq.c config.c cpu.c cpu_tables.c dells200.c device.c disc.c \
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disc_fdi.c disc_img.c disc_sector.c dma.c esdi_at.c fdc.c fdc37c665.c fdd.c fdi2raw.c gameport.c hdd.c hdd_esdi.c \
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disc_fdi.c disc_img.c disc_sector.c dma.c esdi_at.c fdc.c fdc37c665.c fdc37c93x.c fdd.c fdi2raw.c gameport.c hdd.c hdd_esdi.c \
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hdd_file.c headland.c i430lx.c i430fx.c i430hx.c i430vx.c ide.c ide_atapi.c ide_sff8038i.c intel.c intel_flash.c io.c \
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jim.c joystick_ch_flightstick_pro.c joystick_standard.c joystick_sw_pad.c joystick_tm_fcs.c keyboard.c \
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keyboard_amstrad.c keyboard_at.c keyboard_olim24.c keyboard_pcjr.c keyboard_xt.c laserxt.c lpt.c lpt_dac.c lpt_dss.c \
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@ -17,7 +17,7 @@ OBJ = 386.o 386_common.o 386_dynarec.o 386_dynarec_ops.o 808x.o 82091aa.o acc203
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codegen_ops_mov.o codegen_ops_shift.o codegen_ops_stack.o codegen_reg.o codegen_timing_486.o \
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codegen_timing_686.o codegen_timing_common.o codegen_timing_k6.o codegen_timing_pentium.o \
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codegen_timing_winchip.o codegen_timing_winchip2.o compaq.o config.o cpu.o cpu_tables.o device.o \
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dells200.o disc.o disc_fdi.o disc_img.o disc_sector.o dma.o esdi_at.o fdc.o fdc37c665.o fdd.o \
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dells200.o disc.o disc_fdi.o disc_img.o disc_sector.o dma.o esdi_at.o fdc.o fdc37c665.o fdc37c93x.o fdd.o \
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fdi2raw.o gameport.o hdd.o hdd_esdi.o hdd_file.o headland.o i430hx.o i430lx.o i430fx.o i430vx.o ide.o \
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ide_atapi.o ide_sff8038i.o intel.o intel_flash.o io.o jim.o joystick_ch_flightstick_pro.o \
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joystick_standard.o joystick_sw_pad.o joystick_tm_fcs.o keyboard.o keyboard_amstrad.o keyboard_at.o \
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@ -17,7 +17,7 @@ OBJ = 386.o 386_common.o 386_dynarec.o 386_dynarec_ops.o 808x.o 82091aa.o acc203
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codegen_ops_mov.o codegen_ops_shift.o codegen_ops_stack.o codegen_reg.o codegen_timing_486.o \
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codegen_timing_686.o codegen_timing_common.o codegen_timing_k6.o codegen_timing_pentium.o \
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codegen_timing_winchip.o codegen_timing_winchip2.o compaq.o config.o cpu.o cpu_tables.o device.o \
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dells200.o disc.o disc_fdi.o disc_img.o disc_sector.o dma.o esdi_at.o fdc.o fdc37c665.o fdd.o \
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dells200.o disc.o disc_fdi.o disc_img.o disc_sector.o dma.o esdi_at.o fdc.o fdc37c665.o fdc37c93x.o fdd.o \
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fdi2raw.o gameport.o hdd.o hdd_esdi.o hdd_file.o headland.o i430hx.o i430lx.o i430fx.o i430vx.o ide.o \
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ide_atapi.o ide_sff8038i.o intel.o intel_flash.o io.o jim.o joystick_ch_flightstick_pro.o \
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joystick_standard.o joystick_sw_pad.o joystick_tm_fcs.o keyboard.o keyboard_amstrad.o keyboard_at.o \
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253
src/fdc37c93x.c
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253
src/fdc37c93x.c
Normal file
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@ -0,0 +1,253 @@
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#include "ibm.h"
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#include "fdc.h"
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#include "fdd.h"
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#include "io.h"
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#include "lpt.h"
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#include "serial.h"
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#include "fdc37c93x.h"
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typedef struct fdc37c93x_t
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{
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int index;
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uint8_t global_regs[0x30];
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uint8_t fdc_regs[0x100];
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uint8_t ide1_regs[0x100];
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uint8_t ide2_regs[0x100];
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uint8_t lpt_regs[0x100];
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uint8_t com1_regs[0x100];
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uint8_t com2_regs[0x100];
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uint8_t rtc_regs[0x100];
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uint8_t kbd_regs[0x100];
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uint8_t auxio_regs[0x100];
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uint8_t accessbus_regs[0x100];
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uint8_t lock[2];
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} fdc37c93x_t;
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static fdc37c93x_t fdc37c93x_global;
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static void write_lock(fdc37c93x_t *fdc37c93x, uint8_t val)
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{
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if (val == 0x55 && fdc37c93x->lock[1] == 0x55)
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fdc_3f1_enable(0);
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if (fdc37c93x->lock[0] == 0x55 && fdc37c93x->lock[1] == 0x55 && val != 0x55)
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fdc_3f1_enable(1);
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fdc37c93x->lock[0] = fdc37c93x->lock[1];
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fdc37c93x->lock[1] = val;
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}
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void fdc37c93x_write(uint16_t port, uint8_t val, void *p)
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{
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fdc37c93x_t *fdc37c93x = (fdc37c93x_t *)p;
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// pclog("Write SuperIO %04x %02x\n", port, val);
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if (fdc37c93x->lock[0] == 0x55 && fdc37c93x->lock[1] == 0x55)
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{
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if (port == 0x3f0)
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{
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if (val == 0xaa)
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write_lock(fdc37c93x, val);
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else
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fdc37c93x->index = val;
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}
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else
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{
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uint16_t addr;
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int irq;
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// pclog("fdc37c93x_write: index=%02x dev=%i val=%02x\n", fdc37c93x->index, fdc37c93x->global_regs[7], val);
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if (fdc37c93x->index < 0x30)
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{
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if (fdc37c93x->index != 0x20 && fdc37c93x->index != 0x21)
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fdc37c93x->global_regs[fdc37c93x->index] = val;
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}
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else switch (fdc37c93x->global_regs[7])
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{
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case 0:
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fdc37c93x->fdc_regs[fdc37c93x->index] = val;
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break;
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case 1:
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fdc37c93x->ide1_regs[fdc37c93x->index] = val;
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break;
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case 2:
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fdc37c93x->ide2_regs[fdc37c93x->index] = val;
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break;
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case 3:
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fdc37c93x->lpt_regs[fdc37c93x->index] = val;
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break;
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case 4:
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fdc37c93x->com1_regs[fdc37c93x->index] = val;
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break;
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case 5:
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fdc37c93x->com2_regs[fdc37c93x->index] = val;
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break;
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case 6:
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fdc37c93x->rtc_regs[fdc37c93x->index] = val;
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break;
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case 7:
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fdc37c93x->kbd_regs[fdc37c93x->index] = val;
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break;
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case 8:
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fdc37c93x->auxio_regs[fdc37c93x->index] = val;
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break;
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case 9:
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fdc37c93x->accessbus_regs[fdc37c93x->index] = val;
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break;
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}
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fdc_remove();
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if ((fdc37c93x->global_regs[0x22] & 0x01) && (fdc37c93x->fdc_regs[0x30] & 0x01))
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{
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// pclog("FDC enabled\n");
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fdc_add();
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}
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/* else
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pclog("FDC disabled\n");*/
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lpt1_remove();
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lpt2_remove();
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addr = (fdc37c93x->lpt_regs[0x61] & 0xfc) | ((fdc37c93x->lpt_regs[0x60] & 3) << 8);
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if ((fdc37c93x->global_regs[0x22] & (1 << 3)) && (fdc37c93x->lpt_regs[0x30] & 0x01))
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{
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// pclog("LPT addr = %04x\n", addr);
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lpt1_init(addr);
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}
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/* else
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pclog("LPT disabled\n");*/
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serial1_remove();
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addr = (fdc37c93x->com1_regs[0x61] & 0xf8) | ((fdc37c93x->com1_regs[0x60] & 3) << 8);
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irq = fdc37c93x->com1_regs[0x70] & 0xf;
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if ((fdc37c93x->global_regs[0x22] & (1 << 4)) && (fdc37c93x->com1_regs[0x30] & 0x01))
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{
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// pclog("COM1 addr = %04x, IRQ = %i\n", addr, irq);
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serial1_set(addr, irq);
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}
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/* else
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pclog("COM1 disabled\n");*/
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serial2_remove();
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addr = (fdc37c93x->com2_regs[0x61] & 0xf8) | ((fdc37c93x->com2_regs[0x60] & 3) << 8);
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irq = fdc37c93x->com2_regs[0x70] & 0xf;
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if ((fdc37c93x->global_regs[0x22] & (1 << 5)) && (fdc37c93x->com2_regs[0x30] & 0x01))
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{
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// pclog("COM2 addr = %04x, IRQ = %i\n", addr, irq);
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serial2_set(addr, irq);
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}
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/* else
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pclog("COM2 disabled\n");*/
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fdc_update_enh_mode(fdc37c93x->fdc_regs[0xf0] & 1);
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fdc_update_densel_force((fdc37c93x->fdc_regs[0xf1] & 0x0c) >> 2);
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fdd_swap = (fdc37c93x->fdc_regs[0xf0] & (1 << 4)) ? 1 : 0;
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}
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}
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else
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{
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if (port == 0x3f0)
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write_lock(fdc37c93x, val);
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}
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}
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uint8_t fdc37c93x_read(uint16_t port, void *p)
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{
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fdc37c93x_t *fdc37c93x = (fdc37c93x_t *)p;
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// pclog("Read SuperIO %04x %02x\n", port, fdc37c665_curreg);
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if (fdc37c93x->lock[0] == 0x55 && fdc37c93x->lock[1] == 0x55)
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{
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if (port == 0x3f1)
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{
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if (fdc37c93x->index < 0x30)
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return fdc37c93x->global_regs[fdc37c93x->index];
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else switch (fdc37c93x->global_regs[7])
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{
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case 0:
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return fdc37c93x->fdc_regs[fdc37c93x->index];
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case 1:
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return fdc37c93x->ide1_regs[fdc37c93x->index];
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case 2:
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return fdc37c93x->ide2_regs[fdc37c93x->index];
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case 3:
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return fdc37c93x->lpt_regs[fdc37c93x->index];
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case 4:
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return fdc37c93x->com1_regs[fdc37c93x->index];
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case 5:
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return fdc37c93x->com2_regs[fdc37c93x->index];
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case 6:
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return fdc37c93x->rtc_regs[fdc37c93x->index];
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case 7:
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return fdc37c93x->kbd_regs[fdc37c93x->index];
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case 8:
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return fdc37c93x->auxio_regs[fdc37c93x->index];
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case 9:
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return fdc37c93x->accessbus_regs[fdc37c93x->index];
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}
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}
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}
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return 0xff;
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}
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void fdc37c932fr_init()
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{
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fdc37c93x_t *fdc37c93x = &fdc37c93x_global;
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int c;
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io_sethandler(0x03f0, 0x0002, fdc37c93x_read, NULL, NULL, fdc37c93x_write, NULL, NULL, fdc37c93x);
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fdc_update_is_nsc(0);
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memset(&fdc37c93x_global, 0, sizeof(fdc37c93x_global));
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fdc37c93x->global_regs[0x03] = 0x03;
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fdc37c93x->global_regs[0x20] = 0x03;
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fdc37c93x->global_regs[0x21] = 0x01;
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fdc37c93x->global_regs[0x24] = 0x04;
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fdc37c93x->global_regs[0x26] = 0xf0;
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fdc37c93x->global_regs[0x27] = 0x03;
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fdc37c93x->fdc_regs[0x60] = 0x03;
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fdc37c93x->fdc_regs[0x61] = 0xf0;
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fdc37c93x->fdc_regs[0x70] = 0x06;
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fdc37c93x->fdc_regs[0x74] = 0x02;
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fdc37c93x->fdc_regs[0xf0] = 0x0e;
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fdc37c93x->fdc_regs[0xf2] = 0xff;
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fdc37c93x->ide1_regs[0x60] = 0x01;
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fdc37c93x->ide1_regs[0x61] = 0xf0;
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fdc37c93x->ide1_regs[0x62] = 0x03;
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fdc37c93x->ide1_regs[0x63] = 0xf6;
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fdc37c93x->ide1_regs[0x70] = 0x0e;
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fdc37c93x->ide1_regs[0xf0] = 0x0c;
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fdc37c93x->ide1_regs[0xf1] = 0x0d;
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fdc37c93x->lpt_regs[0x74] = 0x04;
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fdc37c93x->lpt_regs[0xf0] = 0x3c;
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fdc37c93x->com2_regs[0x74] = 0x04;
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fdc37c93x->com2_regs[0xf1] = 0x02;
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fdc37c93x->com2_regs[0xf2] = 0x03;
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fdc37c93x->rtc_regs[0x63] = 0x70;
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fdc37c93x->rtc_regs[0xf4] = 0x03;
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fdc37c93x->auxio_regs[0xb1] = 0x80;
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fdc37c93x->auxio_regs[0xc0] = 0x01;
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fdc37c93x->auxio_regs[0xc1] = 0x01;
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fdc37c93x->auxio_regs[0xc5] = 0x01;
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fdc37c93x->auxio_regs[0xc6] = 0x01;
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fdc37c93x->auxio_regs[0xc7] = 0x01;
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fdc37c93x->auxio_regs[0xc8] = 0x01;
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fdc37c93x->auxio_regs[0xc9] = 0x80;
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for (c = 0xcb; c < 0xee; c++)
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fdc37c93x->auxio_regs[c] = 0x01;
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fdc_update_densel_polarity(1);
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fdc_update_densel_force(0);
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fdd_swap = 0;
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}
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1
src/fdc37c93x.h
Normal file
1
src/fdc37c93x.h
Normal file
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@ -0,0 +1 @@
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extern void fdc37c932fr_init();
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@ -20,6 +20,7 @@
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#include "dma.h"
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#include "fdc.h"
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#include "fdc37c665.h"
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#include "fdc37c93x.h"
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#include "gameport.h"
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#include "headland.h"
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#include "i430fx.h"
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@ -716,7 +717,7 @@ void at_p55va_init()
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pci_slot(0x0B);
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i430vx_init();
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piix_init(7, 0x08, 0x09, 0x0A, 0x0B);
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um8669f_init();
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fdc37c932fr_init();
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device_add(&intel_flash_bxt_device);
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}
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