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Reorganised FPU emulation.

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TomW 2014-11-09 14:07:03 +00:00
commit 087f412d3f
12 changed files with 2670 additions and 1436 deletions
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343
src/x87_ops_arith.h Normal file
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#define opFPU(name, optype, a_size, load_var, get, use_var) \
static int opFADD ## name ## _a ## a_size(uint32_t fetchdat) \
{ \
optype t; \
FP_ENTER(); \
fetch_ea_ ## a_size(fetchdat); \
load_var = get(); if (abrt) return 1; \
ST(0) += use_var; \
cycles -= 8; \
} \
static int opFCOM ## name ## _a ## a_size(uint32_t fetchdat) \
{ \
optype t; \
FP_ENTER(); \
fetch_ea_ ## a_size(fetchdat); \
load_var = get(); if (abrt) return 1; \
npxs &= ~(C0|C2|C3); \
if (ST(0) == use_var) npxs |= C3; \
else if (ST(0) < use_var) npxs |= C0; \
cycles -= 4; \
} \
static int opFCOMP ## name ## _a ## a_size(uint32_t fetchdat) \
{ \
optype t; \
FP_ENTER(); \
fetch_ea_ ## a_size(fetchdat); \
load_var = get(); if (abrt) return 1; \
npxs &= ~(C0|C2|C3); \
if (ST(0) == use_var) npxs |= C3; \
else if (ST(0) < use_var) npxs |= C0; \
x87_pop(); \
cycles -= 4; \
} \
static int opFDIV ## name ## _a ## a_size(uint32_t fetchdat) \
{ \
optype t; \
FP_ENTER(); \
fetch_ea_ ## a_size(fetchdat); \
load_var = get(); if (abrt) return 1; \
x87_div(ST(0), ST(0), use_var); \
cycles -= 73; \
} \
static int opFDIVR ## name ## _a ## a_size(uint32_t fetchdat) \
{ \
optype t; \
FP_ENTER(); \
fetch_ea_ ## a_size(fetchdat); \
load_var = get(); if (abrt) return 1; \
x87_div(ST(0), use_var, ST(0)); \
cycles -= 73; \
} \
static int opFMUL ## name ## _a ## a_size(uint32_t fetchdat) \
{ \
optype t; \
FP_ENTER(); \
fetch_ea_ ## a_size(fetchdat); \
load_var = get(); if (abrt) return 1; \
ST(0) *= use_var; \
cycles -= 11; \
} \
static int opFSUB ## name ## _a ## a_size(uint32_t fetchdat) \
{ \
optype t; \
FP_ENTER(); \
fetch_ea_ ## a_size(fetchdat); \
load_var = get(); if (abrt) return 1; \
ST(0) -= use_var; \
cycles -= 8; \
} \
static int opFSUBR ## name ## _a ## a_size(uint32_t fetchdat) \
{ \
optype t; \
FP_ENTER(); \
fetch_ea_ ## a_size(fetchdat); \
load_var = get(); if (abrt) return 1; \
ST(0) = use_var - ST(0); \
cycles -= 8; \
}
opFPU(s, x87_ts, 16, t.i, geteal, t.s)
opFPU(s, x87_ts, 32, t.i, geteal, t.s)
opFPU(d, x87_td, 16, t.i, geteaq, t.d)
opFPU(d, x87_td, 32, t.i, geteaq, t.d)
opFPU(iw, uint16_t, 16, t, geteaw, (double)(int16_t)t)
opFPU(iw, uint16_t, 32, t, geteaw, (double)(int16_t)t)
opFPU(il, uint32_t, 16, t, geteal, (double)(int32_t)t)
opFPU(il, uint32_t, 32, t, geteal, (double)(int32_t)t)
static int opFADD(uint32_t fetchdat)
{
FP_ENTER();
pc++;
if (fplog) pclog("FADD\n");
ST(0) = ST(0) + ST(fetchdat & 7);
cycles -= 8;
return 0;
}
static int opFADDr(uint32_t fetchdat)
{
FP_ENTER();
pc++;
if (fplog) pclog("FADD\n");
ST(fetchdat & 7) = ST(fetchdat & 7) + ST(0);
cycles -= 8;
return 0;
}
static int opFADDP(uint32_t fetchdat)
{
FP_ENTER();
pc++;
if (fplog) pclog("FADDP\n");
ST(fetchdat & 7) = ST(fetchdat & 7) + ST(0);
x87_pop();
cycles -= 8;
return 0;
}
static int opFCOM(uint32_t fetchdat)
{
FP_ENTER();
pc++;
if (fplog) pclog("FCOM\n");
npxs &= ~(C0|C2|C3);
if (ST(0) == ST(fetchdat & 7)) npxs |= C3;
else if (ST(0) < ST(fetchdat & 7)) npxs |= C0;
cycles -= 4;
return 0;
}
static int opFCOMP(uint32_t fetchdat)
{
FP_ENTER();
pc++;
if (fplog) pclog("FCOMP\n");
npxs &= ~(C0|C2|C3);
if (ST(0) == ST(fetchdat & 7)) npxs |= C3;
else if (ST(0) < ST(fetchdat & 7)) npxs |= C0;
x87_pop();
cycles -= 4;
return 0;
}
static int opFCOMPP(uint32_t fetchdat)
{
FP_ENTER();
pc++;
if (fplog) pclog("FCOMPP\n");
npxs &= ~(C0|C2|C3);
if (ST(0) == ST(1)) npxs |= C3;
else if (ST(0) < ST(1)) npxs |= C0;
x87_pop();
x87_pop();
cycles -= 4;
return 0;
}
static int opFUCOMPP(uint32_t fetchdat)
{
FP_ENTER();
pc++;
if (fplog) pclog("FUCOMPP\n", easeg, eaaddr);
npxs &= ~(C0|C2|C3);
if (ST(0) == ST(1)) npxs |= C3;
else if (ST(0) < ST(1)) npxs |= C0;
x87_pop();
x87_pop();
cycles -= 5;
return 0;
}
static int opFDIV(uint32_t fetchdat)
{
FP_ENTER();
pc++;
if (fplog) pclog("FDIV\n");
x87_div(ST(0), ST(0), ST(fetchdat & 7));
cycles -= 73;
return 0;
}
static int opFDIVr(uint32_t fetchdat)
{
FP_ENTER();
pc++;
if (fplog) pclog("FDIV\n");
x87_div(ST(fetchdat & 7), ST(fetchdat & 7), ST(0));
cycles -= 73;
return 0;
}
static int opFDIVP(uint32_t fetchdat)
{
FP_ENTER();
pc++;
if (fplog) pclog("FDIVP\n");
x87_div(ST(fetchdat & 7), ST(fetchdat & 7), ST(0));
x87_pop();
cycles -= 73;
return 0;
}
static int opFDIVR(uint32_t fetchdat)
{
FP_ENTER();
pc++;
if (fplog) pclog("FDIVR\n");
x87_div(ST(0), ST(fetchdat&7), ST(0));
cycles -= 73;
return 0;
}
static int opFDIVRr(uint32_t fetchdat)
{
FP_ENTER();
pc++;
if (fplog) pclog("FDIVR\n");
x87_div(ST(fetchdat & 7), ST(0), ST(fetchdat & 7));
cycles -= 73;
return 0;
}
static int opFDIVRP(uint32_t fetchdat)
{
FP_ENTER();
pc++;
if (fplog) pclog("FDIVR\n");
x87_div(ST(fetchdat & 7), ST(0), ST(fetchdat & 7));
x87_pop();
cycles -= 73;
return 0;
}
static int opFMUL(uint32_t fetchdat)
{
FP_ENTER();
pc++;
if (fplog) pclog("FMUL\n");
ST(0) = ST(0) * ST(fetchdat & 7);
cycles -= 16;
return 0;
}
static int opFMULr(uint32_t fetchdat)
{
FP_ENTER();
pc++;
if (fplog) pclog("FMUL\n");
ST(fetchdat & 7) = ST(0) * ST(fetchdat & 7);
cycles -= 16;
return 0;
}
static int opFMULP(uint32_t fetchdat)
{
FP_ENTER();
pc++;
if (fplog) pclog("FMULP\n");
ST(fetchdat & 7) = ST(0) * ST(fetchdat & 7);
x87_pop();
cycles -= 16;
return 0;
}
static int opFSUB(uint32_t fetchdat)
{
FP_ENTER();
pc++;
if (fplog) pclog("FSUB\n");
ST(0) = ST(0) - ST(fetchdat & 7);
cycles -= 8;
return 0;
}
static int opFSUBr(uint32_t fetchdat)
{
FP_ENTER();
pc++;
if (fplog) pclog("FSUB\n");
ST(fetchdat & 7) = ST(fetchdat & 7) - ST(0);
cycles -= 8;
return 0;
}
static int opFSUBP(uint32_t fetchdat)
{
FP_ENTER();
pc++;
if (fplog) pclog("FSUBP\n");
ST(fetchdat & 7) = ST(fetchdat & 7) - ST(0);
x87_pop();
cycles -= 8;
return 0;
}
static int opFSUBR(uint32_t fetchdat)
{
FP_ENTER();
pc++;
if (fplog) pclog("FSUBR\n");
ST(0) = ST(fetchdat & 7) - ST(0);
cycles -= 8;
return 0;
}
static int opFSUBRr(uint32_t fetchdat)
{
FP_ENTER();
pc++;
if (fplog) pclog("FSUBR\n");
ST(fetchdat & 7) = ST(0) - ST(fetchdat & 7);
cycles -= 8;
return 0;
}
static int opFSUBRP(uint32_t fetchdat)
{
FP_ENTER();
pc++;
if (fplog) pclog("FSUBRP\n");
ST(fetchdat & 7) = ST(0) - ST(fetchdat & 7);
x87_pop();
cycles -= 8;
return 0;
}
static int opFUCOM(uint32_t fetchdat)
{
FP_ENTER();
pc++;
if (fplog) pclog("FUCOM\n");
npxs &= ~(C0|C2|C3);
if (ST(0) == ST(fetchdat&7)) npxs |= C3;
else if (ST(0) < ST(fetchdat&7)) npxs |= C0;
cycles -= 4;
return 0;
}
static int opFUCOMP(uint32_t fetchdat)
{
FP_ENTER();
pc++;
if (fplog) pclog("FUCOMP\n");
npxs &= ~(C0|C2|C3);
if (ST(0) == ST(fetchdat&7)) npxs |= C3;
else if (ST(0) < ST(fetchdat&7)) npxs |= C0;
x87_pop();
cycles -= 4;
return 0;
}