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Show correct CPU speeds in Advanced/ZP CMOS Setup. Patch from EluanCM.

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This commit is contained in:
SarahW 2020-03-07 14:17:40 +00:00
commit 07b2574279
2 changed files with 38 additions and 2 deletions
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38
src/intel.c
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@ -2,6 +2,7 @@
#include "cpu.h" #include "cpu.h"
#include "io.h" #include "io.h"
#include "mem.h" #include "mem.h"
#include "model.h"
#include "pit.h" #include "pit.h"
#include "timer.h" #include "timer.h"
#include "x86.h" #include "x86.h"
@ -103,11 +104,46 @@ void intel_endeavor_init()
static uint8_t zappa_brdconfig(uint16_t port, void *p) static uint8_t zappa_brdconfig(uint16_t port, void *p)
{ {
uint8_t temp;
CPU *cpu_s = &models[model].cpu[cpu_manufacturer].cpus[cpu];
// pclog("zappa_brdconfig read port=%04x\n", port); // pclog("zappa_brdconfig read port=%04x\n", port);
switch (port) switch (port)
{ {
case 0x79: case 0x79:
return 0xff; // Bit # | Description | Bit = 1 | Bit = 0
// 0 | Internal CPU Clock Freq. (Switch 6) | 3/2x | 2x (Manual has these swapped in one place?)
// 1 | No Connect | |
// 2 | No Connect | |
// 3 | External CPU clock (Switch 7) | |
// 4 | External CPU clock (Switch 8) | |
// 5 | Setup Disable (Switch 5) | Enable access | Disable access
// 6 | Clear CMOS (Switch 4) | Keep values | Clear values
// 7 | Password Clear (Switch 3) | Keep password | Clear password
// Bus Speed | Switch 7 | Switch 8
// 50 MHz | Off | Off
// 60 Mhz | On | Off
// 66 MHz | Off | On
// Multiplier for each supported processor-
// -The 3/2 setting is used for 75 MHz, 90 MHz, and 100 MHz processors
// -The 2 times setting is used for 120 MHz processors.
if (cpu_s->rspeed == 75000000 && cpu_s->pci_speed == 25000000)
temp = 0x01;
else if (cpu_s->rspeed == 90000000 && cpu_s->pci_speed == 30000000)
temp = 0x01 | 0x08;
else if (cpu_s->rspeed == 100000000 && cpu_s->pci_speed == 25000000)
temp = 0x00;
else if (cpu_s->rspeed == 100000000 && cpu_s->pci_speed == 33333333)
temp = 0x01 | 0x10;
else if (cpu_s->rspeed == 120000000 && cpu_s->pci_speed == 30000000)
temp = 0x08;
else if (cpu_s->rspeed == 133333333 && cpu_s->pci_speed == 33333333)
temp = 0x10;
else
temp = 0x10; // TODO: how are the overdrive processors configured?
return 0xe0 | temp;
} }
return 0; return 0;
} }

2
src/pc87306.c
View file

@ -200,6 +200,6 @@ void pc87306_init(uint16_t port)
pc87306_global.regs[REG_FAR] = 0x10; pc87306_global.regs[REG_FAR] = 0x10;
pc87306_global.regs[REG_GPBA] = 0x78 >> 2; pc87306_global.regs[REG_GPBA] = 0x78 >> 2;
pc87306_global.regs[REG_SCF0] = 0x30; pc87306_global.regs[REG_SCF0] = 0x30;
pc87306_global.gpio_2 = 0xfa; pc87306_global.gpio_2 = 0xff; // this is a mask only, output will be defined by zappa_brdconfig and endeavor_brdconfig in intel.c
io_sethandler(0x0078, 0x0002, pc87306_gpio_read, NULL, NULL, pc87306_gpio_write, NULL, NULL, &pc87306_global); io_sethandler(0x0078, 0x0002, pc87306_gpio_read, NULL, NULL, pc87306_gpio_write, NULL, NULL, &pc87306_global);
} }