Reset internal cache status correctly on soft CPU reset. Fixes CPU speed detection on Elonex PC-425X.
This commit is contained in:
parent
3d388564c1
commit
056eefb196
1 changed files with 6 additions and 1 deletions
|
|
@ -679,7 +679,12 @@ void softresetx86()
|
||||||
// i86_Reset();
|
// i86_Reset();
|
||||||
// cs=0xFFFF0;
|
// cs=0xFFFF0;
|
||||||
msw=0;
|
msw=0;
|
||||||
cr0=0;
|
if (is486)
|
||||||
|
cr0 = 1 << 30;
|
||||||
|
else
|
||||||
|
cr0 = 0;
|
||||||
|
cpu_cache_int_enabled = 0;
|
||||||
|
cpu_update_waitstates();
|
||||||
cr4 = 0;
|
cr4 = 0;
|
||||||
eflags=0;
|
eflags=0;
|
||||||
cgate32=0;
|
cgate32=0;
|
||||||
|
|
|
||||||
Loading…
Reference in a new issue