168 lines
9.6 KiB
HTML
168 lines
9.6 KiB
HTML
<HTML>
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<HEAD>
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<META name=vsisbn content="1576101746">
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<META name=vstitle content="Michael Abrash's Graphics Programming Black Book, Special Edition">
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<META name=vsauthor content="Michael Abrash">
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<META name=vspublisher content="The Coriolis Group">
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<META name=vspubdate content="07/01/97">
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<META name=vscategory content="Web and Software Development: Game Development,Web and Software Development: Graphics and Multimedia Development">
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<TITLE>Michael Abrash's Graphics Programming Black Book Special Edition: Bones and Sinew</TITLE>
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<!-- HEADER -->
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<!-- Empty Reference Subhead -->
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<!--ISBN=1576101746//-->
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<!--TITLE=Michael Abrash's Graphics Programming Black Book Special Edition//-->
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<!--AUTHOR=Michael Abrash//-->
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<!--PUBLISHER=The Coriolis Group, Inc.//-->
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<!--CHAPTER=23//-->
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<!--PAGES=427-430//-->
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<!--UNASSIGNED1//-->
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<!--UNASSIGNED2//--></HEAD><BODY LINK=#0000FF ALINK=#000099 VLINK=#0000FF BGCOLOR=#FFFFFF>
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<CENTER>
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<TABLE BORDER>
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<TR>
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<TD><A HREF="23-01.html">Previous</A></TD>
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<TD><A HREF="index.html">Table of Contents</A></TD>
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<TD><A HREF="23-03.html">Next</A></TD>
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</TR>
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</TABLE>
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</CENTER>
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<P><BR></P>
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<H3><A NAME="Heading5"></A><FONT COLOR="#000077">At the Core</FONT></H3>
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<P>A little background is necessary before we’re ready to examine Listing 23.1. The VGA is built around four functional blocks, named the CRT Controller (CRTC), the Sequence Controller (SC), the Attribute Controller (AC), and the Graphics Controller (GC). The single-chip VGA could have been designed to treat the registers for all the blocks as one large set, addressed at one pair of I/O ports, but in the EGA, each of these blocks was a separate chip, and the legacy of EGA compatibility is why each of these blocks has a separate set of registers and is addressed at different I/O ports in the VGA.
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</P>
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<P>Each of these blocks has a sizable complement of registers. It is not particularly important that you understand why a given block has a given register; all the registers together make up the programming interface, and it is the entire interface that is of interest to the VGA programmer. However, the means by which most VGA registers are addressed makes it necessary for you to remember which registers are in which blocks.</P>
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<P>Most VGA registers are addressed as <I>internally indexed</I> registers. The internal address of the register is written to a given block’s Index register, and then the data for that register is written to the block’s Data register. For example, GC register 8, the Bit Mask register, is set to 0FFH by writing 8 to port 3CEH, the GC Index register, and then writing 0FFH to port 3CFH, the GC Data register. Internal indexing makes it possible to address the 9 GC registers through only two ports, and allows the entire VGA programming interface to be squeezed into fewer than a dozen ports. The downside is that two I/O operations are required to access most VGA registers.</P>
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<P>The ports used to control the VGA are shown in Table 23.1. The CRTC, SC, and GC Data registers are located at the addresses of their respective Index registers plus one. However, the AC Index and Data registers are located at the same address, 3C0H. The function of this port toggles on every <B>OUT</B> to 3C0H, and resets to Index mode (in which the Index register is programmed by the next <B>OUT</B> to 3C0H) on every read from the Input Status 1 register (3DAH when the VGA is in a color mode,</P>
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<TABLE WIDTH="75%"><TR>
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<TD COLSPAN="2"><HR>
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<TR>
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<TH WIDTH="45%" ALIGN="LEFT" VALIGN="TOP">Register
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<TH WIDTH="30%" VALIGN="TOP" ALIGN="LEFT">Address
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<TR>
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<TD COLSPAN="2"><HR>
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<TR>
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<TD VALIGN="TOP" ALIGN="LEFT">AC Index/Data register
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<TD VALIGN="TOP" ALIGN="LEFT">3C0H (write with toggle)
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<TR>
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<TD VALIGN="TOP" ALIGN="LEFT">AC Index register
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<TD VALIGN="TOP" ALIGN="LEFT">3C0H (read)
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<TR>
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<TD VALIGN="TOP" ALIGN="LEFT">AC Data register
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<TD VALIGN="TOP" ALIGN="LEFT">3C1H (read)
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<TR>
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<TD VALIGN="TOP" ALIGN="LEFT">Miscellaneous Output register
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<TD VALIGN="TOP" ALIGN="LEFT">3C2H (write)
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<TR>
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<TD VALIGN="TOP" ALIGN="LEFT">
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<TD VALIGN="TOP" ALIGN="LEFT">3CCH (read)
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<TR>
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<TD VALIGN="TOP" ALIGN="LEFT">Input Status 0 register
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<TD VALIGN="TOP" ALIGN="LEFT">3C2H (read)
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<TR>
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<TD VALIGN="TOP" ALIGN="LEFT">SC Index register
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<TD VALIGN="TOP" ALIGN="LEFT">3C4H (read/write)
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<TR>
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<TD VALIGN="TOP" ALIGN="LEFT">SC Data register
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<TD VALIGN="TOP" ALIGN="LEFT">3C5H (read/write)
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<TR>
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<TD VALIGN="TOP" ALIGN="LEFT">GC Index register
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<TD VALIGN="TOP" ALIGN="LEFT">3CEH (read/write)
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<TR>
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<TD VALIGN="TOP" ALIGN="LEFT">GC Data register
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<TD VALIGN="TOP" ALIGN="LEFT">3CFH (read/write)
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<TR>
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<TD VALIGN="TOP" ALIGN="LEFT">CRTC Index register
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<TD VALIGN="TOP" ALIGN="LEFT">3B4H/3D4H (read/write)
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<TR>
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<TD VALIGN="TOP" ALIGN="LEFT">CRTC Data register
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<TD VALIGN="TOP" ALIGN="LEFT">3B5H/3D5H (read/write)
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<TR>
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<TD VALIGN="TOP" ALIGN="LEFT">Input Status 1 register/
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<TD VALIGN="TOP" ALIGN="LEFT">
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<TR>
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<TD VALIGN="TOP" ALIGN="LEFT">AC Index/Data reset
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<TD VALIGN="TOP" ALIGN="LEFT">3 BAH/3DAH (read)
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<TR>
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<TD VALIGN="TOP" ALIGN="LEFT">Feature Control
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<TD VALIGN="TOP" ALIGN="LEFT">3BAH/3DAH (write)
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<TR>
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<TD VALIGN="TOP" ALIGN="LEFT">
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<TD VALIGN="TOP" ALIGN="LEFT">3CAH (read)
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<TR>
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<TH CAPTION ALIGN="LEFT" COLSPAN="2">Table 1.1 The Ports through which the VGA is controlled.
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<TR>
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<TD COLSPAN="2"><HR>
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</TABLE>
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<P>3BAH in monochrome modes). Note that all CRTC registers are addressed at either 3DXH or 3BXH, the former in color modes and the latter in monochrome modes. This provides compatibility with the register addressing of the now-vanished Color/Graphics Adapter and Monochrome Display Adapter.
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</P>
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<P>The method used in the VGA BIOS to set registers is to point DX to the desired Index register, load AL with the index, perform a byte <B>OUT</B>, increment DX to point to the Data register (except in the case of the AC, where DX remains the same), load AL with the desired data, and perform a byte <B>OUT</B>. A handy shortcut is to point DX to the desired Index register, load AL with the index, load AH with the data, and perform a word <B>OUT</B>. Since the high byte of the <B>OUT</B> value goes to port DX+1, this is equivalent to the first method but is faster. However, this technique does not work for programming the AC Index and Data registers; both AC registers are addressed at 3C0H, so two separate byte <B>OUT</B>s must be used to program the AC. (Actually, word <B>OUT</B>s to the AC do work in the EGA, but not in the VGA, so they shouldn’t be used.) As mentioned above, you must be sure which mode—Index or Data—the AC is in before you do an <B>OUT</B> to 3C0H; you can read the Input Status 1 register at any time to force the AC to Index mode.</P>
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<P>How safe is the word-<B>OUT</B> method of addressing VGA registers? I have, in the past, run into adapter/computer combinations that had trouble with word <B>OUT</B>s; however, all such problems I am aware of have been fixed. Moreover, a great deal of graphics software now uses word <B>OUT</B>s, so any computer or VGA that doesn’t properly support word <B>OUT</B>s could scarcely be considered a clone at all.</P>
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<TABLE WIDTH="100%"><TD WIDTH="5%" VALIGN="TOP"><IMG SRC="images/23-01i.jpg"><TD WIDTH="95%" VALIGN="TOP"><SMALL><I>A speed tip: The setting of each chip’s Index register remains the same until it is reprogrammed. This means that in cases where you are setting the same internal register repeatedly, you can set the Index register to point to that internal register once, then write to the Data register multiple times. For example, the Bit Mask register (GC register 8) is often set repeatedly inside a loop when drawing lines. The standard code for this is:</I></SMALL>
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</TABLE>
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<!-- CODE SNIP //-->
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<PRE>
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MOV DX,03CEH ;point to GC Index register
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MOV AL,8 ;internal index of Bit Mask register
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OUT DX,AX ;AH contains Bit Mask register setting
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</PRE>
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<!-- END CODE SNIP //-->
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<TABLE WIDTH="100%">
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<TD WIDTH="5%" VALIGN="TOP">
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<TD WIDTH="95%" VALIGN="TOP"><SMALL><I>Alternatively, the GC Index register could initially be set to point to the Bit Mask register with</I></SMALL>
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</TABLE>
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<!-- CODE SNIP //-->
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<PRE>
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MOV DX,03CEH ;point to GC Index register
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MOV AL,8 ;internal index of Bit Mask register
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OUT DX,AL ;set GC Index register
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INC DX ;point to GC Data register
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</PRE>
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<!-- END CODE SNIP //-->
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<TABLE WIDTH="100%">
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<TD WIDTH="5%" VALIGN="TOP">
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<TD WIDTH="95%" VALIGN="TOP"><SMALL><I>and then the Bit Mask register could be set repeatedly with the byte-size <B>OUT</B> instruction</I></SMALL>
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</TABLE>
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<!-- CODE SNIP //-->
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<PRE>
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OUT DX,AL ;AL contains Bit Mask register setting
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</PRE>
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<!-- END CODE SNIP //-->
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<TABLE WIDTH="100%">
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<TD WIDTH="5%" VALIGN="TOP">
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<TD WIDTH="95%" VALIGN="TOP"><SMALL><I>which is generally faster (and never slower) than a word-sized <B>OUT</B>, and which does not require AH to be set, freeing up a register. Of course, this method only works if the GC Index register remains unchanged throughout the loop.</I></SMALL>
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</TABLE>
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<P><BR></P>
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<CENTER>
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<TABLE BORDER>
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<TR>
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<TD><A HREF="23-01.html">Previous</A></TD>
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<TD><A HREF="index.html">Table of Contents</A></TD>
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<TD><A HREF="23-03.html">Next</A></TD>
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</TR>
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</TABLE>
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</CENTER>
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<hr width="90%" size="1" noshade>
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<div align="center">
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<font face="Verdana,sans-serif" size="1">Graphics Programming Black Book © 2001 Michael Abrash</font>
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