Use backtick code blocks for syntax highlighting

20-03.md

@@ -79,23 +79,29 @@ the same values for address
 bits 2, 3, and 4 (fall in the same bank) in tight loops, and you should
 also avoid sequences like
 
-    mov  bl,[esi]
-    mov  bh,[esi+1]
+```nasm
+mov  bl,[esi]
+mov  bh,[esi+1]
+```
 
 because both operands will generally be in the same bank. An alternative
 is to place another instruction between the two instructions that access
 the same bank, as in this sequence:
 
-    mov  bl,[esi]
-    mov  edi,edx
-    mov  bh,[esi+1]
+```nasm
+mov  bl,[esi]
+mov  edi,edx
+mov  bh,[esi+1]
+```
 
 By the way, the reason a code sequence that takes two instructions to
 load a single word is attractive in a 32-bit segment is because it takes
 only one cycle when the two instructions can be paired with other
 instructions; by contrast, the obvious way of loading BX
 
-    mov bx,[esi]
+```nasm
+mov bx,[esi]
+```
 
 takes 1.5 to two cycles because the size prefix can't pair, as described
 below. This is yet another example of how different Pentium optimization
@@ -116,5 +122,7 @@ but that turns out to not always be the case. Two two-cycle instructions
 execute in two cycles, so it's okay to pair two instructions such as
 these:
 
-    add esi,[SourceSkip]        ;U-pipe cycles 1 and 2
-    add edi,[DestinationSkip]   ;V-pipe cycles 1 and 2
+```nasm
+add esi,[SourceSkip]        ;U-pipe cycles 1 and 2
+add edi,[DestinationSkip]   ;V-pipe cycles 1 and 2
+```