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12-04.md

@@ -24,9 +24,11 @@ This, the last of this chapter's rules, is the strangest of the lot. If
 any byte register is loaded, and then two cycles later any register is
 used to point to memory, one cycle is lost. So, for example, this code
 
-    mov    al,bl
-    mov    cx,dx
-    mov    si,[di]
+```nasm
+mov    al,bl
+mov    cx,dx
+mov    si,[di]
+```
 
 takes four rather than the expected three cycles to execute. Note that
 it is *not* required that the byte register be part of the register used
@@ -35,17 +37,20 @@ to address memory; any byte register will do the trick.
 Worse still, loading byte registers both one and two cycles before a
 register is used to address memory costs two cycles, as in
 
-    mov    bl,al
-    mov    cl,3
-    mov    bx,[si]
-
+```nasm
+mov    bl,al
+mov    cl,3
+mov    bx,[si]
+```
 which takes five rather than three cycles to run. However, there is *no*
 penalty if a byte register is loaded one cycle but not two cycles before
 a register is used to address memory. Therefore,
 
-    mov    cx,3
-    mov    dl,al
-    mov    si,[bx]
+```nasm
+mov    cx,3
+mov    dl,al
+mov    si,[bx]
+```
 
 runs in the expected three cycles.
 
@@ -57,9 +62,11 @@ its interaction with the other rules—could lead to considerable
 performance loss in seemingly air-tight code. For instance, a casual
 observer would expect the following code to run in 3 cycles:
 
-    mov    bx,offset MemVar
-    mov    cl,al
-    mov    ax,[bx]
+```nasm
+mov    bx,offset MemVar
+mov    cl,al
+mov    ax,[bx]
+```
 
 A more sophisticated programmer would expect to lose one cycle, because
 BX is loaded two cycles before being used to address memory. In fact,
@@ -97,43 +104,47 @@ addressing memory.
 
 **LISTING 12.1 LST12-1.ASM**
 
-    ; Measures the effect of loading a byte register 2 cycles before
-    ; using a register to address memory.
-        mov    bp,2    ;run the test code twice to make sure
-                       ; it's cached
-        sub    bx,bx
-    CacheFillLoop:
-        call    ZTimerOn ;start timing
-        rept    1000
-        mov     dl,cl
-        nop
-        mov     ax,[bx]
-        endm
-        call    ZTimerOff ;stop timing
-        dec     bp
-        jz      Done
-        jmp     CacheFillLoop
-    Done:
+```nasm
+; Measures the effect of loading a byte register 2 cycles before
+; using a register to address memory.
+    mov    bp,2    ;run the test code twice to make sure
+                   ; it's cached
+    sub    bx,bx
+CacheFillLoop:
+    call    ZTimerOn ;start timing
+    rept    1000
+    mov     dl,cl
+    nop
+    mov     ax,[bx]
+    endm
+    call    ZTimerOff ;stop timing
+    dec     bp
+    jz      Done
+    jmp     CacheFillLoop
+Done:
+```
 
 **LISTING 12.2 LST12-2.ASM**
 
-    ; Measures the effect of loading a byte register 1 cycle before
-    ; using a register to address memory.
-        mov    bp,2   ;run the test code twice to make sure
-                      ; it's cached
-        sub    bx,bx
-    CacheFillLoop:
-        call   ZTimerOn ;start timing
-        rept   1000
-        nop
-        mov    dl,cl
-        mov    ax,[bx]
-        endm
-        call   ZTimerOff ;stop timing
-        dec    bp
-        jz     Done
-        jmp    CacheFillLoop
-    Done:
+```nasm
+; Measures the effect of loading a byte register 1 cycle before
+; using a register to address memory.
+    mov    bp,2   ;run the test code twice to make sure
+                  ; it's cached
+    sub    bx,bx
+CacheFillLoop:
+    call   ZTimerOn ;start timing
+    rept   1000
+    nop
+    mov    dl,cl
+    mov    ax,[bx]
+    endm
+    call   ZTimerOff ;stop timing
+    dec    bp
+    jz     Done
+    jmp    CacheFillLoop
+Done:
+```
 
 Note that Listings 12.1 and 12.2 each repeat the timing of the code
 under test a second time, to make sure that the instructions are in the