Use backtick code blocks for syntax highlighting

12-02.md

@@ -58,8 +58,10 @@ isn't known until the instruction starts, and that's exactly the case
 when the preceding instruction modifies one of the target instruction's
 addressing registers. For example, in the code
 
-    MOV  BX,OFFSET MemVar
-    MOV  AX,[BX]
+```nasm
+MOV  BX,OFFSET MemVar
+MOV  AX,[BX]
+```
 
 there's no way that the 486 can calculate the address referenced by
 **MOV AX,[BX]** until **MOV BX,OFFSET MemVar** finishes, so pipelining
@@ -68,19 +70,23 @@ rearranging your code so that at least one instruction lies between the
 loading of the memory pointer and its use. For example,
 postdecrementing, as in the following
 
-    LoopTop:
-        add    ax,[si]
-        add    si,2
-        dec    cx
-        jnz    LoopTop
+```nasm
+LoopTop:
+    add    ax,[si]
+    add    si,2
+    dec    cx
+    jnz    LoopTop
+```
 
 is faster than preincrementing, as in:
 
-    LoopTop:
-        add    si,2
-        add    ax,[SI]
-        dec    cx
-        jnz    LoopTop
+```nasm
+LoopTop:
+    add    si,2
+    add    ax,[SI]
+    dec    cx
+    jnz    LoopTop
+```
 
 Now that we understand what Intel means by this rule, let me make a very
 important comment: My observations indicate that for real-mode code, the
@@ -108,28 +114,34 @@ instructions, but, because some 486 instructions take more than 1 cycle,
 the 2 are not always equivalent) before it's used to point to memory, 1
 cycle is lost. Therefore, whereas this code
 
-    mov    bx,offset MemVar
-    mov    ax,[bx]
-    inc    dx
-    dec    cx
-    jnz    LoopTop
+```nasm
+mov    bx,offset MemVar
+mov    ax,[bx]
+inc    dx
+dec    cx
+jnz    LoopTop
+```
 
 loses two cycles from interrupting the address calculation pipeline,
 this code
 
-    mov    bx,offset MemVar
-    inc    dx
-    mov    ax,[bx]
-    dec    cx
-    jnz    LoopTop
+```nasm
+mov    bx,offset MemVar
+inc    dx
+mov    ax,[bx]
+dec    cx
+jnz    LoopTop
+```
 
 loses only one cycle, and this code
 
-    mov    bx,offset MemVar
-    inc    dx
-    dec    cx
-    mov    ax,[bx]
-    jnz    LoopTop
+```nasm
+mov    bx,offset MemVar
+inc    dx
+dec    cx
+mov    ax,[bx]
+jnz    LoopTop
+```
 
 loses no cycles at all. Apparently, the 486's addressing calculation
 pipeline actually starts 2 cycles ahead, as shown in Figure 12.2. (In