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<!--UNASSIGNED2//--></HEAD><BODY LINK=#0000FF ALINK=#000099 VLINK=#0000FF BGCOLOR=#FFFFFF>
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<!--UNASSIGNED2//--></HEAD><body>
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</TABLE>
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<P><BR></P>
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<H2><A NAME="Heading1"></A><FONT COLOR="#000077">Chapter 25<BR>VGA Data Machinery
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</FONT></H2>
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<H3><A NAME="Heading2"></A><FONT COLOR="#000077">The Barrel Shifter, Bit Mask, and Set/Reset Mechanisms</FONT></H3>
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<H2><A NAME="Heading1"></A>Chapter 25<BR>VGA Data Machinery</H2>
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<H3><A NAME="Heading2"></A>The Barrel Shifter, Bit Mask, and Set/Reset Mechanisms</H3>
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<P>In the last chapter, we examined a simplified model of data flow within the GC portion of the VGA, featuring the latches and ALUs. Now we’re ready to expand that model to include the barrel shifter, bit mask, and the set/reset capabilities, leaving only the write modes to be explored over the next few chapters.
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</P>
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<H3><A NAME="Heading3"></A><FONT COLOR="#000077">VGA Data Rotation</FONT></H3>
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<H3><A NAME="Heading3"></A>VGA Data Rotation</H3>
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<P>Figure 25.1 shows an expanded model of GC data flow, featuring the barrel shifter and bit mask circuitry. Let’s look at the barrel shifter first. A barrel shifter is circuitry capable of shifting—or rotating, in the VGA’s case—data an arbitrary number of bits in a single operation, as opposed to being able to shift only one bit position at a time. The barrel shifter in the VGA can rotate incoming CPU data up to seven bits to the right (toward the least significant bit), with bit 0 wrapping back to bit 7, after which the VGA continues processing the rotated byte just as it normally processes unrotated CPU data. Thanks to the nature of barrel shifters, this rotation requires no extra processing time over unrotated VGA operations. The number of bits by which CPU data is shifted is controlled by bits 2-0 of GC register 3, the Data Rotate register, which also contains the ALU function select bits (data unmodified, AND, OR, and XOR) that we looked at in the last chapter.
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</P>
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<P><A NAME="Fig1"><!-- </A><A HREF="javascript:displayWindow('images/25-01.jpg',408,237 )"> --><IMG SRC="images/25-01.jpg"><BR><!-- </A>
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<BR><A HREF="javascript:displayWindow('images/25-01.jpg',408,237)"> --><FONT COLOR="#000077"><B>Figure 25.1</B></FONT></A> <I>Data flow through the Graphics Controller.</I>
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<BR><A HREF="javascript:displayWindow('images/25-01.jpg',408,237)"> --><B>Figure 25.1</B></A> <I>Data flow through the Graphics Controller.</I>
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</P>
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<P>The barrel shifter is powerful, but (as sometimes happens in this business) it sounds more useful than it really is. This is because the GC can only rotate CPU data, a task that the CPU itself is perfectly capable of performing. Two <B>OUT</B>s are needed to select a given rotation: one to set the GC Index register, and one to set the Data Rotate register. However, with careful programming it’s sometimes possible to leave the GC Index always pointing to the Data Rotate register, so only one <B>OUT</B> is needed. Even so, it’s often easier and/or faster to simply have the CPU rotate the data of interest CL times than to set the Data Rotate register. (Bear in mind that a single <B>OUT</B> takes from 11 to 31 cycles on a 486—and longer if the VGA is sluggish at responding to OUTs, as many VGAs are.) If only the VGA could rotate <I>latched</I> data, then there would be all sorts of useful applications for rotation, but, sadly, only CPU data can be rotated.</P>
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<P>The drawing of bit-mapped text is one use for the barrel shifter, and I’ll demonstrate that application below. In general, though, don’t knock yourself out trying to figure out how to work data rotation into your programs—it just isn’t all that useful in most cases.</P>
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<H3><A NAME="Heading4"></A><FONT COLOR="#000077">The Bit Mask</FONT></H3>
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<H3><A NAME="Heading4"></A>The Bit Mask</H3>
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<P>The VGA has bit mask circuitry for each of the four memory planes. The four bit masks operate in parallel and are all driven by the same mask data for each operation, so they’re generally referred to in the singular, as “the bit mask.” Figure 25.2 illustrates the operation of one bit of the bit mask for one plane. This circuitry occurs eight times in the bit mask for a given plane, once for each bit of the byte written to display memory. Briefly, the bit mask determines on a bit-by-bit basis whether the source for each byte written to display memory is the ALU for that plane or the latch for that plane.
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</P>
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<P><A NAME="Fig2"><!-- </A><A HREF="javascript:displayWindow('images/25-02.jpg',408,197 )"> --><IMG SRC="images/25-02.jpg"><BR><!-- </A>
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<BR><A HREF="javascript:displayWindow('images/25-02.jpg',408,197)"> --><FONT COLOR="#000077"><B>Figure 25.2</B></FONT></A> <I>Bit mask operation.</I>
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<BR><A HREF="javascript:displayWindow('images/25-02.jpg',408,197)"> --><B>Figure 25.2</B></A> <I>Bit mask operation.</I>
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</P>
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<P>The bit mask is controlled by GC register 8, the Bit Mask register. If a given bit of the Bit Mask register is 1, then the corresponding bit of data from the ALUs is written to display memory for all four planes, while if that bit is 0, then the corresponding bit of data from the latches for the four planes is written to display memory unchanged. (In write mode 3, the actual bit mask that’s applied to data written to display memory is the logical AND of the contents of the Bit Mask register and the data written by the CPU, as we’ll see in Chapter 26.)
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</P>
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<hr width="90%" size="1" noshade>
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<div align="center">
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<font face="Verdana,sans-serif" size="1">Graphics Programming Black Book © 2001 Michael Abrash</font>
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Graphics Programming Black Book © 2001 Michael Abrash
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</div>
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