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-<H4 ALIGN="LEFT"><A NAME="Heading5"></A><FONT COLOR="#000077">The Zen Timer Is a Means, Not an End</FONT></H4>
+<H4 ALIGN="LEFT"><A NAME="Heading5"></A>The Zen Timer Is a Means, Not an End</H4>
 <P>We&rsquo;re going to spend the rest of this chapter seeing what the Zen timer can do, examining how it works, and learning how to use it. I&rsquo;ll be using the Zen timer again and again over the course of this book, so it&rsquo;s essential that you learn what the Zen timer can do and how to use it. On the other hand, it is by no means essential that you understand exactly how the Zen timer works. (Interesting, yes; essential, no.)
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 <P>In other words, the Zen timer isn&rsquo;t really part of the knowledge we seek; rather, it&rsquo;s one tool with which we&rsquo;ll acquire that knowledge. Consequently, you shouldn&rsquo;t worry if you don&rsquo;t fully grasp the inner workings of the Zen timer. Instead, focus on learning how to <I>use</I> it, and you&rsquo;ll be on the right road.</P>
-<H4 ALIGN="LEFT"><A NAME="Heading6"></A><FONT COLOR="#000077">Starting the Zen Timer</FONT></H4>
+<H4 ALIGN="LEFT"><A NAME="Heading6"></A>Starting the Zen Timer</H4>
 <P><B>ZTimerOn</B> is called at the start of a segment of code to be timed. <B>ZTimerOn</B> saves the context of the calling code, disables interrupts, sets timer 0 of the 8253 to mode 2 (divide-by-N mode), sets the initial timer count to 0, restores the context of the calling code, and returns. (I&rsquo;d like to note that while Intel&rsquo;s documentation for the 8253 seems to indicate that a timer won&rsquo;t reset to 0 until it finishes counting down, in actual practice, timers seem to reset to 0 as soon as they&rsquo;re loaded.)</P>
 <P>Two aspects of <B>ZTimerOn</B> are worth discussing further. One point of interest is that <B>ZTimerOn</B> disables interrupts. (<B>ZTimerOff</B> later restores interrupts to the state they were in when <B>ZTimerOn</B> was called.) Were interrupts not disabled by <B>ZTimerOn</B>, keyboard, mouse, timer, and other interrupts could occur during the timing interval, and the time required to service those interrupts would incorrectly and erratically appear to be part of the execution time of the code being measured. As a result, code timed with the Zen timer should not expect any hardware interrupts to occur during the interval between any call to <B>ZTimerOn</B> and the corresponding call to <B>ZTimerOff</B>, and should not enable interrupts during that time.</P>
-<H3><A NAME="Heading7"></A><FONT COLOR="#000077">Time and the PC</FONT></H3>
+<H3><A NAME="Heading7"></A>Time and the PC</H3>
 <P>A second interesting point about <B>ZTimerOn</B> is that it may introduce some small inaccuracy into the system clock time whenever it is called. To understand why this is so, we need to examine the way in which both the 8253 and the PC&rsquo;s system clock (which keeps the current time) work.</P>
 <P>The 8253 actually contains three timers, as shown in Figure 3.1. All three timers are driven by the system board&rsquo;s 14.31818 MHz crystal, divided by 12 to yield a 1.19318 MHz clock to the timers, so the timers count once every 838.1 ns. Each of the three timers counts down in a programmable way, generating a signal on its output pin when it counts down to 0. Each timer is capable of being halted at any time via a 0 level on its gate input; when a timer&rsquo;s gate input is 1, that timer counts constantly. All in all, the 8253&rsquo;s timers are inherently very flexible timing devices; unfortunately, much of that flexibility depends on how the timers are connected to external circuitry, and in the PC the timers are connected with specific purposes in mind.</P>
 <P>Timer 2 drives the speaker, although it can be used for other timing purposes when the speaker is not in use. As shown in Figure 3.1, timer 2 is the only timer with a programmable gate input in the PC; that is, timer 2 is the only timer that can be started and stopped under program control in the manner specified by Intel. On the other hand, the <I>output</I> of timer 2 is connected to nothing other than the speaker. In particular, timer 2 cannot generate an interrupt to get the 8088&rsquo;s attention.</P>
 <P>Timer 1 is dedicated to providing dynamic RAM refresh, and should not be tampered with lest system crashes result.</P>
 <P><A NAME="Fig1"><!-- </A><A HREF="javascript:displayWindow('images/03-01.jpg',410,243 )"> --><IMG SRC="images/03-01.jpg"><BR><!-- </A>
-<BR><A HREF="javascript:displayWindow('images/03-01.jpg',410,243)"> --><FONT COLOR="#000077"><B>Figure 3.1</B></FONT></A>&nbsp;&nbsp;<I>The configuration of the 8253 timer chip in the PC.</I>
+<BR><A HREF="javascript:displayWindow('images/03-01.jpg',410,243)"> --><B>Figure 3.1</B></A>&nbsp;&nbsp;<I>The configuration of the 8253 timer chip in the PC.</I>
 </P>
 <P>Finally, timer 0 is used to drive the system clock. As programmed by the BIOS at power-up, every 65,536 (64K) counts, or 54.925 milliseconds, timer 0 generates a rising edge on its output line. (A millisecond is one-thousandth of a second, and is abbreviated ms.) This line is connected to the hardware interrupt 0 (IRQ0) line on the system board, so every 54.925 ms, timer 0 causes hardware interrupt 0 to occur.
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@@ -70,7 +70,7 @@
 
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-<font face="Verdana,sans-serif" size="1">Graphics Programming Black Book &copy; 2001 Michael Abrash</font>
+Graphics Programming Black Book &copy; 2001 Michael Abrash
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