Retidy, removing align=left from headings and empty paragraphs
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362 changed files with 8472 additions and 5040 deletions
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47-03.html
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47-03.html
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@ -1,5 +1,4 @@
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<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN"
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"http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
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<!DOCTYPE html>
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<html xmlns="http://www.w3.org/1999/xhtml">
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<head>
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@ -19,17 +18,21 @@
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<center>
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<table border="1">
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<tr>
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<td><a href="47-02.html">Previous</a></td>
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<td>
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<a href="47-02.html">Previous</a>
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</td>
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<td><a href="index.html">Table of Contents</a></td>
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<td>
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<a href="index.html">Table of Contents</a>
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</td>
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<td><a href="47-04.html">Next</a></td>
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<td>
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<a href="47-04.html">Next</a>
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</td>
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</tr>
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</table>
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</center>
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<p><br /></p>
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<p>After setting up mode 13H, Listing 47.1 alters the vertical counts and timings to select 480 visible scan lines. (There’s no need to alter any horizontal values, because mode 13H and Mode X both have 320-pixel horizontal resolutions.) The Maximum Scan Line register is programmed to double scan each line (that is, repeat each scan line twice), however, so we get an effective vertical resolution of 240 scan lines. It is, in fact, possible to get 400 or 480 independent scan lines in 256-color mode, as discussed in Chapter 31 and 32; however, 400-scan-line modes lack square pixels and can’t support simultaneous off-screen memory and page flipping. Furthermore, 480-scan-line modes lack page flipping altogether, due to memory constraints.</p>
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<p>At the same time, Listing 47.1 programs the VGA’s bitmap to a planar organization that is similar to that used by the 16-color modes, and utterly different from the linear bitmap of mode 13H. The bizarre bitmap organization of Mode X is shown in Figure 47.1. The first pixel (the pixel at the upper left corner of the screen) is controlled by the byte at offset 0 in plane 0. (The one thing that Mode X blessedly has in common with mode 13H is that each pixel is controlled by a single byte, eliminating the need to mask out individual bits of display memory.) The second pixel, immediately to the right of the first pixel, is controlled by the byte at offset 0 in plane 1. The third pixel comes from offset 0 in plane 2, and the fourth pixel from offset 0 in plane 3. Then, the fifth pixel is controlled by the byte at offset 1 in plane 0, and that cycle continues, with each group of four pixels spread across the four planes at the same address. The offset M of pixel N in display memory is M = N/4, and the plane P of pixel N is P = N mod 4. For display memory writes, the plane is selected by setting bit P of the Map Mask register (Sequence Controller register 2) to 1 and all other bits to 0; for display memory reads, the plane is selected by setting the Read Map register (Graphics Controller register 4) to P.</p>
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@ -150,16 +153,20 @@ _ReadPixelX endp
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end
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</pre>
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<p><br /></p>
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<center>
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<table border="1">
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<tr>
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<td><a href="47-02.html">Previous</a></td>
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<td>
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<a href="47-02.html">Previous</a>
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</td>
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<td><a href="index.html">Table of Contents</a></td>
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<td>
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<a href="index.html">Table of Contents</a>
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</td>
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<td><a href="47-04.html">Next</a></td>
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<td>
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<a href="47-04.html">Next</a>
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</td>
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</tr>
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</table>
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</center>
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